From patchwork Mon Jun 7 12:33:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1488626 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=Tlmrp/Lx; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FzCTd2s7Gz9sWX for ; Mon, 7 Jun 2021 22:33:41 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230412AbhFGMfb (ORCPT ); Mon, 7 Jun 2021 08:35:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230331AbhFGMfa (ORCPT ); Mon, 7 Jun 2021 08:35:30 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89AA0C061787 for ; Mon, 7 Jun 2021 05:33:25 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id ho18so15400390ejc.8 for ; Mon, 07 Jun 2021 05:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=s1McyNikPeBkyMCxJJKhjGXbmzHmFRGVfiDXNrONCTw=; b=Tlmrp/Lx1rETQeuEkLjcveKpE8NsDZh8QzPT4p3h4hUhxqjaccqSnzx+/PHSH5esO5 XINlc86HFGLDMTtYWAJARJYsvJ7T9lfbWKIOHIvKhyysmPSymmI1cBqMbj56XfWB+VDe mtI2oq30yKsRxr7Cm134ccAzHlKvAA4RKezpbId4VLWTG4dMr+NRJ/Tdw7yheXYtOJAd BHop/MGWI454lK9IeTas5NM/skSNcRIyyV8FL2YH8+TAKgJCpDmf+GvkCmHlhIZn3ylp LdAmtMvQbDV+qTT1TTvc/KuGCa3qCpvtfQmY6jQqugLPOUjAHj9PIcemDforVBeLbzI5 dRmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=s1McyNikPeBkyMCxJJKhjGXbmzHmFRGVfiDXNrONCTw=; b=JKxaUTRdl0zQvBPtQ+8201tLT9PzD9p/ChIgedEdawYJLtY5Dfkx8KBVmiuceLi0E8 jyCLGe7Z3ggJiHqsiUZoerXu0p5c9FYqBnefcx5Wkw7gseu+HChAzR0arR4KwS7/RS0h krkocBPhwpWRtoihcsjt5aL2/lCrykdEPAxY3q+nBNFrOtFF0nJMR2CAGUhB7/muU+/j oao7sVS0/j++2hj9HAPgsZPiKhi3h2GexYKPzZyoryGC73hRrmr9tJ0y3y93uv698Fay qX+LyDWPt/kUPjdnKAqkYNu8DrrfLiLavwsrbuB6PsgdwlwdUzGcZZk3nlW3Z0LOKEHd S3tw== X-Gm-Message-State: AOAM532INENRr633jk650pqGSLQmd44iygHTucDdZtYgBlaS75LlPMj7 GoJIFF5NXel3C0jrD/XYTY2yYg== X-Google-Smtp-Source: ABdhPJyx9+fVGPQO13neftlKAK7lNRGKMnjjOGyvp7SqnC0fIqlkQaJhv43Ypu8J0r8Ze57YVS7hVA== X-Received: by 2002:a17:906:3485:: with SMTP id g5mr17369204ejb.174.1623069204108; Mon, 07 Jun 2021 05:33:24 -0700 (PDT) Received: from localhost.localdomain (dh207-96-76.xnet.hr. [88.207.96.76]) by smtp.googlemail.com with ESMTPSA id f18sm6471000ejz.119.2021.06.07.05.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 05:33:23 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v6 1/6] mfd: simple-mfd-i2c: Add Delta TN48M CPLD support Date: Mon, 7 Jun 2021 14:33:12 +0200 Message-Id: <20210607123317.3242031-1-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M switches have a Lattice CPLD that serves multiple purposes including being a GPIO expander. So, lets use the simple I2C MFD driver to provide the MFD core. Also add a virtual symbol which pulls in the simple-mfd-i2c driver and provide a common symbol on which the subdevice drivers can depend on. Signed-off-by: Robert Marko Acked-for-MFD-by: Lee Jones --- Changes in v2: * Drop the custom MFD driver and header * Use simple I2C MFD driver drivers/mfd/Kconfig | 10 ++++++++++ drivers/mfd/simple-mfd-i2c.c | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b74efa469e90..733c2f9adb15 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -297,6 +297,16 @@ config MFD_ASIC3 This driver supports the ASIC3 multifunction chip found on many PDAs (mainly iPAQ and HTC based ones) +config MFD_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD driver" + depends on I2C + select MFD_SIMPLE_MFD_I2C + help + Select this option to enable support for Delta Networks TN48M switch + CPLD. It consists of reset and GPIO drivers. CPLD provides GPIOS-s + for the SFP slots as well as power supply related information. + SFP support depends on the GPIO driver being selected. + config PMIC_DA903X bool "Dialog Semiconductor DA9030/DA9034 PMIC Support" depends on I2C=y diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 87f684cff9a1..af8e91781417 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -39,6 +39,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c) static const struct of_device_id simple_mfd_i2c_of_match[] = { { .compatible = "kontron,sl28cpld" }, + { .compatible = "delta,tn48m-cpld" }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); From patchwork Mon Jun 7 12:33:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1488631 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=MmuLlDq2; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FzCVt2xdpz9t14 for ; Mon, 7 Jun 2021 22:34:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231163AbhFGMgf (ORCPT ); Mon, 7 Jun 2021 08:36:35 -0400 Received: from mail-ed1-f45.google.com ([209.85.208.45]:45049 "EHLO mail-ed1-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230324AbhFGMge (ORCPT ); Mon, 7 Jun 2021 08:36:34 -0400 Received: by mail-ed1-f45.google.com with SMTP id u24so20110259edy.11 for ; Mon, 07 Jun 2021 05:34:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lGX0JNuG31D7qcZgJCbDC1QXAo75ucOQHTYj8s/w3Tk=; b=MmuLlDq2V4KmdjVVafyc0Q9KsXRJdG8yNpliR5wm/1W8tW3lib3Ds5v/LHfdcW33+Z q8JL/IUn0Wu1Nyrh16IKs73bWd2h7G1NMUl58Fg0CvWnccWBBFP1PaCONNC2B/Ar+HJd atfq3xc7L8QAksb5gcdibFtrSZciUam44WRqiYljp9iMApr7mm4AF0ERG1c2Ti2dmAI5 3tNgnfUSW3Ui0G9rBLlsExr9qSpUJI4xuLx6lv0XcAYPvOumkkaS8nw/cbKPr7iIPTun vy4bs+sK88EEA+BVFHFI++Bz6UGtdGbbisI4YUaK/uhA9B91x+Y32VlnA68mctzvZGMa 4Mdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lGX0JNuG31D7qcZgJCbDC1QXAo75ucOQHTYj8s/w3Tk=; b=lOOcUa7rjqG5WJpcA9PrYfNYfKJc9VQb+JF7focW8xdszsTg3xM5DCMbCp4BRZFj8R MI3j4POJnrsh5Q69nQm2JtI0XvRo9g9Q+BxfWOZj5Q7t9S8fa+6vztt+Hy+2w5gQcyAJ wEDBHithISnsYBG3gl4yWuuaUKviKUdbUKPokdfUzNoo99bdNq75DTk0xGsjoFnMrSyu 7NLwxn9PQD0/olbZ5QE+SWtks0hmjcJI8Rq9jiCuTN/Kom7DW/spiW3dn7mFCyAf1j0G yRLM7CiJPeAFfu4TDvyk/dCBhWZ3TN7chOq8/aWxGCT2GChzy8dp1kVUC11r09+7jq4K gDKQ== X-Gm-Message-State: AOAM533YlMvcRcJ/RHskfaDZKm9REtMdvF65IveUqzKfCDOZ75X4290v 3CVT4FTkmguxIJLIAg5UYBZgOg== X-Google-Smtp-Source: ABdhPJwBkuM9a1lFjS6uETXxtGLxH0bl5hZtHfMKTl7at5o+kdVktFHXtKudt9rIsEgSg6K9xu2oHQ== X-Received: by 2002:aa7:c4d0:: with SMTP id p16mr20379672edr.150.1623069206234; Mon, 07 Jun 2021 05:33:26 -0700 (PDT) Received: from localhost.localdomain (dh207-96-76.xnet.hr. [88.207.96.76]) by smtp.googlemail.com with ESMTPSA id f18sm6471000ejz.119.2021.06.07.05.33.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 05:33:25 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko , Andy Shevchenko Subject: [PATCH v6 2/6] gpio: Add Delta TN48M CPLD GPIO driver Date: Mon, 7 Jun 2021 14:33:13 +0200 Message-Id: <20210607123317.3242031-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210607123317.3242031-1-robert.marko@sartura.hr> References: <20210607123317.3242031-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M CPLD is used as a GPIO expander for the SFP GPIOs. It is a mix of input only and output only pins. Signed-off-by: Robert Marko Reviewed-by: Andy Shevchenko Acked-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- Changes in v6: * Drop unused header * Return the return value of device_property_read_u32() instead of a hardcoded return Changes in v2: * Rewrite to use simple I2C MFD and GPIO regmap * Drop DT bindings for pin numbering drivers/gpio/Kconfig | 12 ++++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-tn48m.c | 88 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 101 insertions(+) create mode 100644 drivers/gpio/gpio-tn48m.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e3607ec4c2e8..472f7764508e 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1310,6 +1310,18 @@ config GPIO_TIMBERDALE help Add support for the GPIO IP in the timberdale FPGA. +config GPIO_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD GPIO driver" + depends on MFD_TN48M_CPLD + select GPIO_REGMAP + help + This enables support for the GPIOs found on the Delta + Networks TN48M switch CPLD. + They are used for inputs and outputs on the SFP slots. + + This driver can also be built as a module. If so, the + module will be called gpio-tn48m. + config GPIO_TPS65086 tristate "TI TPS65086 GPO" depends on MFD_TPS65086 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index c58a90a3c3b1..271fb806475e 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -145,6 +145,7 @@ obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o obj-$(CONFIG_GPIO_THUNDERX) += gpio-thunderx.o obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o +obj-$(CONFIG_GPIO_TN48M_CPLD) += gpio-tn48m.o obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o diff --git a/drivers/gpio/gpio-tn48m.c b/drivers/gpio/gpio-tn48m.c new file mode 100644 index 000000000000..b12a6b4bc4b3 --- /dev/null +++ b/drivers/gpio/gpio-tn48m.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include + +enum tn48m_gpio_type { + TN48M_SFP_TX_DISABLE = 1, + TN48M_SFP_PRESENT, + TN48M_SFP_LOS, +}; + +static int tn48m_gpio_probe(struct platform_device *pdev) +{ + struct gpio_regmap_config config = {0}; + enum tn48m_gpio_type type; + struct regmap *regmap; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + type = (uintptr_t)device_get_match_data(&pdev->dev); + if (!type) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return ret; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio = 4; + + switch (type) { + case TN48M_SFP_TX_DISABLE: + config.reg_set_base = base; + break; + case TN48M_SFP_PRESENT: + config.reg_dat_base = base; + break; + case TN48M_SFP_LOS: + config.reg_dat_base = base; + break; + default: + dev_err(&pdev->dev, "unknown type %d\n", type); + return -ENODEV; + } + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id tn48m_gpio_of_match[] = { + { .compatible = "delta,tn48m-gpio-sfp-tx-disable", .data = (void *)TN48M_SFP_TX_DISABLE }, + { .compatible = "delta,tn48m-gpio-sfp-present", .data = (void *)TN48M_SFP_PRESENT }, + { .compatible = "delta,tn48m-gpio-sfp-los", .data = (void *)TN48M_SFP_LOS }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_gpio_of_match); + +static struct platform_driver tn48m_gpio_driver = { + .driver = { + .name = "delta-tn48m-gpio", + .of_match_table = tn48m_gpio_of_match, + }, + .probe = tn48m_gpio_probe, +}; +module_platform_driver(tn48m_gpio_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Jun 7 12:33:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1488632 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=OQYSaQqX; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FzCVt6wmXz9t18 for ; Mon, 7 Jun 2021 22:34:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230324AbhFGMgg (ORCPT ); Mon, 7 Jun 2021 08:36:36 -0400 Received: from mail-ej1-f42.google.com ([209.85.218.42]:44553 "EHLO mail-ej1-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230517AbhFGMgf (ORCPT ); Mon, 7 Jun 2021 08:36:35 -0400 Received: by mail-ej1-f42.google.com with SMTP id c10so26331112eja.11 for ; Mon, 07 Jun 2021 05:34:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qNm0L7495enYGVyN6i9GOiHWW+ICwARAIgvoyqcqdYI=; b=OQYSaQqXwFwjBs/3D1EGSetIjOBwMOch38hL0WOEMJ6jZG//28XSRM07Fb6G0Q86Rx zS5Qt7BACU+QNav2yGnX0Pn03X3vKT16PhJRxjNdWRMUBoaE1l2XFBlnAhjg/jA5Ue7D ciS8urjfpFjumqHFQeRpNqeXKKhJr9QaAvSjXIncczqcTjvDeub3ronZMiT/drto0r4K sfT9kho4nQ/bItMXrVWxzjvUl6qn/GBR/moOItP0k+dyPXnSy93LxDkKFZW2/m18OYNU G3AtoFRKyImxi/pwgDCy88vm3lWsRiIGn/1qAkquKDrDCG/v9GvjePKPvPmjxCoNQTIc kibg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qNm0L7495enYGVyN6i9GOiHWW+ICwARAIgvoyqcqdYI=; b=sAqcIuCh0EUwZn7soWbc+fTskUHnQLzF6Qks9CdUe0qFT1EgYZ8eMEoCozm5nYCGp5 +k0zSWTBQ2+dKZedK8cwQEtoV6pIC8D19yNN18hKHl6uF3wK/AvhPiCKNrXgTy/qCWfI h/EaDvBHiwerKx6toL6uTkV3n46M1M2jjRvi2fqKE9oRBLxeVFiITPjV74ZLWmq3cqX8 DlSku3WR7qha9T+EaX+sFQeW1vcGkBb3IueTKSpABT8XhOWwIkSXjjg+wAwO4uggK644 kykzEliA6vNGTUW3FQjPjfPrNlJWcnabu8z01NzivcgH75Qs/fvILXqZw26TiBjXPRsx vArw== X-Gm-Message-State: AOAM533r0txOinXGCsh3rmyudkOiUj7EkyaTs3BKbhdHsFkawDJewAzb AYXnSieqzC6BNjnW0PgkDsADeg== X-Google-Smtp-Source: ABdhPJylM2rQyHmH0zgPyfXgBHvJ17EGUPAYdH2/t597V80COMGmmaizPlRbMRvvZR0iwp+ru0Qv+w== X-Received: by 2002:a17:906:4ad2:: with SMTP id u18mr2946329ejt.197.1623069210322; Mon, 07 Jun 2021 05:33:30 -0700 (PDT) Received: from localhost.localdomain (dh207-96-76.xnet.hr. [88.207.96.76]) by smtp.googlemail.com with ESMTPSA id f18sm6471000ejz.119.2021.06.07.05.33.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 05:33:28 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v6 3/6] dt-bindings: reset: Add Delta TN48M Date: Mon, 7 Jun 2021 14:33:14 +0200 Message-Id: <20210607123317.3242031-3-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210607123317.3242031-1-robert.marko@sartura.hr> References: <20210607123317.3242031-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add header for the Delta TN48M CPLD provided resets. Signed-off-by: Robert Marko --- include/dt-bindings/reset/delta,tn48m-reset.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/reset/delta,tn48m-reset.h diff --git a/include/dt-bindings/reset/delta,tn48m-reset.h b/include/dt-bindings/reset/delta,tn48m-reset.h new file mode 100644 index 000000000000..d4e9ed12de3e --- /dev/null +++ b/include/dt-bindings/reset/delta,tn48m-reset.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#ifndef _DT_BINDINGS_RESET_TN48M_H +#define _DT_BINDINGS_RESET_TN48M_H + +#define CPU_88F7040_RESET 0 +#define CPU_88F6820_RESET 1 +#define MAC_98DX3265_RESET 2 +#define PHY_88E1680_RESET 3 +#define PHY_88E1512_RESET 4 +#define POE_RESET 5 + +#endif /* _DT_BINDINGS_RESET_TN48M_H */ From patchwork Mon Jun 7 12:33:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1488629 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=qyOX7iX9; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FzCVk4NsJz9sjJ for ; Mon, 7 Jun 2021 22:34:38 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230453AbhFGMg2 (ORCPT ); Mon, 7 Jun 2021 08:36:28 -0400 Received: from mail-ej1-f41.google.com ([209.85.218.41]:40766 "EHLO mail-ej1-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230420AbhFGMgZ (ORCPT ); Mon, 7 Jun 2021 08:36:25 -0400 Received: by mail-ej1-f41.google.com with SMTP id my49so9677030ejc.7 for ; Mon, 07 Jun 2021 05:34:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ubkzp8oMlVoCN0+6YS6gJRfyqm3niotWvm/jH5v0C/U=; b=qyOX7iX92Fo9ZWekPtOCYGiPSIhzZFGY+w2RfOwJhR47zEE+giL0zmNP/CG059/Bsg r5WceXxID9RI9n/3CX0Q+YGuPisTe0BKecX24rI3yE4yCgoHwRQOPjruiKR9YU/lmlYT BFuCDw6pMSxyd99IJFy8l1Kc0kTrF1V/hTn08TOV1ULmLwcVUe/lkDoEJkgjfdzpmy3+ 2Cxubwa1Xl0OPvwQiwFRQMkI8J/6wQaMCeQKFtanDdKO6eIqdS58CJLdx9wRYbVr62BF NjtBdx0CYfSr+S0TBdlNPwSWEtqXRhDEarW5nS0e8Ftq4IgsTMAfyROyibUuQWxiicJS WhSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ubkzp8oMlVoCN0+6YS6gJRfyqm3niotWvm/jH5v0C/U=; b=YfGoYTRaLkvIxxXT0qEyGtLRlK042l5UkMpH0MhfH3sy7STiudXOWseJs5GweRTwGZ 3pNcAWjpbqreQCQFHAcPfQidNYXr8O94pxQcgDHLIv7Gp1dS1VSf2donbJNq2JAXRuPl GupErk80b15GSN0V13exy4PrdzpLl6MhZW81wHKAW7WzPF3IyAglY7BlOQ2MdcQneg4y R88cYjsVfgzlldH4GJfa/wjQrrWs8nBGLCIx6QjOE7D/vcU6bfXDZdvlgPYrQ9aXns3T IrfCdPEbwtUD7VHjIN+Cr8m0LR8Law3KKNqFkD+18rpthj9CYICFuJ/fK17fP6pJKn0I OOow== X-Gm-Message-State: AOAM530mzujS/UcnA2Nv0r0NHR0jwU8ChOPr73pbr04NrTE0kHVQOH85 qnqmIRU4IbLyNrxaxSJ7N8xZFw== X-Google-Smtp-Source: ABdhPJyA52r8qHxTz8D70XLWQ225ctT6ran2p67gn6SnWXTy3HHDtc85TvQiSwyfsbcpbQRBDeWrdg== X-Received: by 2002:a17:906:5210:: with SMTP id g16mr17587259ejm.116.1623069213383; Mon, 07 Jun 2021 05:33:33 -0700 (PDT) Received: from localhost.localdomain (dh207-96-76.xnet.hr. [88.207.96.76]) by smtp.googlemail.com with ESMTPSA id f18sm6471000ejz.119.2021.06.07.05.33.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 05:33:31 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v6 4/6] reset: Add Delta TN48M CPLD reset controller Date: Mon, 7 Jun 2021 14:33:15 +0200 Message-Id: <20210607123317.3242031-4-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210607123317.3242031-1-robert.marko@sartura.hr> References: <20210607123317.3242031-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M CPLD exposes resets for the following: * 88F7040 SoC * 88F6820 SoC * 98DX3265 switch MAC-s * 88E1680 PHY-s * 88E1512 PHY * PoE PSE controller Controller supports only self clearing resets. Signed-off-by: Robert Marko Reviewed-by: Philipp Zabel --- Changes in v5: * Allow COMPILE_TEST as well * Default to MFD_TN48M_CPLD Changes in v4: * Drop assert and deassert as only self-clearing resets are support by the HW * Make sure that reset is cleared before returning from reset. drivers/reset/Kconfig | 10 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-tn48m.c | 128 ++++++++++++++++++++++++++++++++++++ 3 files changed, 139 insertions(+) create mode 100644 drivers/reset/reset-tn48m.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 4171c6f76385..b647bb945597 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -237,6 +237,16 @@ config RESET_TI_SYSCON you wish to use the reset framework for such memory-mapped devices, say Y here. Otherwise, say N. +config RESET_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD reset controller" + depends on MFD_TN48M_CPLD || COMPILE_TEST + default MFD_TN48M_CPLD + help + This enables the reset controller driver for the Delta TN48M CPLD. + It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X + switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and + Microchip PD69200 PoE PSE controller. + config RESET_UNIPHIER tristate "Reset controller driver for UniPhier SoCs" depends on ARCH_UNIPHIER || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 65a118a91b27..d048498e6566 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o +obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o diff --git a/drivers/reset/reset-tn48m.c b/drivers/reset/reset-tn48m.c new file mode 100644 index 000000000000..8b58685f4043 --- /dev/null +++ b/drivers/reset/reset-tn48m.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD reset driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#define TN48M_RESET_REG 0x10 + +#define TN48M_RESET_TIMEOUT 125000 +#define TN48M_RESET_SLEEP 10 + +struct tn48_reset_map { + u8 bit; +}; + +struct tn48_reset_data { + struct reset_controller_dev rcdev; + struct regmap *regmap; +}; + +static const struct tn48_reset_map tn48m_resets[] = { + [CPU_88F7040_RESET] = {0}, + [CPU_88F6820_RESET] = {1}, + [MAC_98DX3265_RESET] = {2}, + [PHY_88E1680_RESET] = {4}, + [PHY_88E1512_RESET] = {6}, + [POE_RESET] = {7}, +}; + +static inline struct tn48_reset_data *to_tn48_reset_data( + struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct tn48_reset_data, rcdev); +} + +static int tn48m_control_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int val; + + regmap_update_bits(data->regmap, TN48M_RESET_REG, + BIT(tn48m_resets[id].bit), 0); + + return regmap_read_poll_timeout(data->regmap, + TN48M_RESET_REG, + val, + val & BIT(tn48m_resets[id].bit), + TN48M_RESET_SLEEP, + TN48M_RESET_TIMEOUT); +} + +static int tn48m_control_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int regval; + int ret; + + ret = regmap_read(data->regmap, TN48M_RESET_REG, ®val); + if (ret < 0) + return ret; + + if (BIT(tn48m_resets[id].bit) & regval) + return 0; + else + return 1; +} + +static const struct reset_control_ops tn48_reset_ops = { + .reset = tn48m_control_reset, + .status = tn48m_control_status, +}; + +static int tn48m_reset_probe(struct platform_device *pdev) +{ + struct tn48_reset_data *data; + struct regmap *regmap; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = regmap; + + data->rcdev.owner = THIS_MODULE; + data->rcdev.ops = &tn48_reset_ops; + data->rcdev.nr_resets = ARRAY_SIZE(tn48m_resets); + data->rcdev.of_node = pdev->dev.of_node; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +} + +static const struct of_device_id tn48m_reset_of_match[] = { + { .compatible = "delta,tn48m-reset", }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_reset_of_match); + +static struct platform_driver tn48m_reset_driver = { + .driver = { + .name = "delta-tn48m-reset", + .of_match_table = tn48m_reset_of_match, + }, + .probe = tn48m_reset_probe, +}; +module_platform_driver(tn48m_reset_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD reset driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Jun 7 12:33:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1488627 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=TgI4Cu5S; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FzCTd5JDWz9sjJ for ; Mon, 7 Jun 2021 22:33:41 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230331AbhFGMfb (ORCPT ); Mon, 7 Jun 2021 08:35:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230382AbhFGMfb (ORCPT ); Mon, 7 Jun 2021 08:35:31 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13A4CC0617A6 for ; Mon, 7 Jun 2021 05:33:37 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id g8so26416144ejx.1 for ; Mon, 07 Jun 2021 05:33:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XZ6xGzQ1fYucC28Sy5XBR8mgxxxOu3bU8otSn6/V0po=; b=TgI4Cu5SPON4WNs1EmHW+248N49eyi9oRJH4ZlIuxlG//5BDF4jZq5zfVX1kOohkhM 3TDpk0w5A3yDci5wci2Ku5lC7SZ9gYLd+AcMDjmmvT/bgVURerVXfGycHyz0aBFDHVtR T45m4BSgaI+uW9vAEOzchPgd3kvbE1nEzC/Y/+uja56reSfAtZTf97+dyEH/lykjZAqQ GPL6bPHfc09riFRm4BkQDNHHtF4TyUvkGGcGGE+hKhixazHamt5BQGjFFAxNLYahmmUF 4+rQsenN6lMd5SmLDqW6Ay9ajIAT0cvHbLIHL70AwP1zqXitIxtw4HhfezZhhqafGuIc 2S9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XZ6xGzQ1fYucC28Sy5XBR8mgxxxOu3bU8otSn6/V0po=; b=A5LBwc1Om6eV/46OAvGvLIUvU4oy0ubMnd3fv4flUdIW6PaEhV/XHy6YJGkcZ7f0T+ 4OpL+4NWV1GEHia1CiyHi6LZQW0/em+C5Gpqnpg70SW1iu6UVO4b07DutRgpB9Ak9H41 Zk5ola38enewQNeSVV1+Nq+usbQDE01QapMS44yCFGGNQXR8WN1wIzkiJZ8BNESSeiaL ZdWfs5XHVwzMbDQhN7blx3vit1hUsuDFsv0q8IqLKwakBGojMMfEtU5QbdJ8Q1Ix4+nT XHHVMldIYo8R6NW7hvrZ03cEy1Yfhgt4AdcMPeDGBwdIZOeF3iSZ3eddTD8ei+FivxWV 0+LA== X-Gm-Message-State: AOAM532Ey5QAky+9V+VijM6tYAsBoD1QNo1Scz5iOoFr/sNPV8NSepF5 BBbgefPtrJKWzf+DAVFV3/fZOQ== X-Google-Smtp-Source: ABdhPJy0qKoM8onF2du/9N/B1Bf2a42GUvc5I6XkDfEHIusaDxHNzd+/wr9IrGdeGr267mtTA/hAkw== X-Received: by 2002:a17:906:318b:: with SMTP id 11mr17400125ejy.395.1623069215603; Mon, 07 Jun 2021 05:33:35 -0700 (PDT) Received: from localhost.localdomain (dh207-96-76.xnet.hr. [88.207.96.76]) by smtp.googlemail.com with ESMTPSA id f18sm6471000ejz.119.2021.06.07.05.33.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 05:33:35 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v6 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers bindings Date: Mon, 7 Jun 2021 14:33:16 +0200 Message-Id: <20210607123317.3242031-5-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210607123317.3242031-1-robert.marko@sartura.hr> References: <20210607123317.3242031-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add binding documents for the Delta TN48M CPLD drivers. Signed-off-by: Robert Marko --- Changes in v3: * Include bindings for reset driver Changes in v2: * Implement MFD as a simple I2C MFD * Add GPIO bindings as separate .../bindings/gpio/delta,tn48m-gpio.yaml | 42 +++++++++ .../bindings/mfd/delta,tn48m-cpld.yaml | 90 +++++++++++++++++++ .../bindings/reset/delta,tn48m-reset.yaml | 35 ++++++++ 3 files changed, 167 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml create mode 100644 Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml create mode 100644 Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml diff --git a/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml new file mode 100644 index 000000000000..aca646aecb12 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/delta,tn48m-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD GPIO controller + +maintainers: + - Robert Marko + +description: | + This module is part of the Delta TN48M multi-function device. For more + details see ../mfd/delta,tn48m-cpld.yaml. + + GPIO controller module provides GPIO-s for the SFP slots. + It is split into 3 controllers, one output only for the SFP TX disable + pins, one input only for the SFP present pins and one input only for + the SFP LOS pins. + +properties: + compatible: + enum: + - delta,tn48m-gpio-sfp-tx-disable + - delta,tn48m-gpio-sfp-present + - delta,tn48m-gpio-sfp-los + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml new file mode 100644 index 000000000000..2c6e2adf73ca --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD controller + +maintainers: + - Robert Marko + +description: | + Lattice CPLD onboard the TN48M switches is used for system + management. + + It provides information about the hardware model, revision, + PSU status etc. + + It is also being used as a GPIO expander for the SFP slots and + reset controller for the switch MAC-s and other peripherals. + +properties: + compatible: + const: delta,tn48m-cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: ../gpio/delta,tn48m-gpio.yaml + + "^reset-controller?$": + $ref: ../reset/delta,tn48m-reset.yaml + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cpld@41 { + compatible = "delta,tn48m-cpld"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + gpio@31 { + compatible = "delta,tn48m-gpio-sfp-tx-disable"; + reg = <0x31>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@3a { + compatible = "delta,tn48m-gpio-sfp-present"; + reg = <0x3a>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@40 { + compatible = "delta,tn48m-gpio-sfp-los"; + reg = <0x40>; + gpio-controller; + #gpio-cells = <2>; + }; + + reset-controller { + compatible = "delta,tn48m-reset"; + #reset-cells = <1>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml new file mode 100644 index 000000000000..0e5ee8decc0d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/delta,tn48m-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD reset controller + +maintainers: + - Robert Marko + +description: | + This module is part of the Delta TN48M multi-function device. For more + details see ../mfd/delta,tn48m-cpld.yaml. + + Reset controller modules provides resets for the following: + * 88F7040 SoC + * 88F6820 SoC + * 98DX3265 switch MAC-s + * 88E1680 PHY-s + * 88E1512 PHY + * PoE PSE controller + +properties: + compatible: + const: delta,tn48m-reset + + "#reset-cells": + const: 1 + +required: + - compatible + - "#reset-cells" + +additionalProperties: false From patchwork Mon Jun 7 12:33:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1488633 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=LRXwdOLx; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FzCW62vdKz9t0p for ; Mon, 7 Jun 2021 22:34:57 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231186AbhFGMgr (ORCPT ); Mon, 7 Jun 2021 08:36:47 -0400 Received: from mail-ej1-f52.google.com ([209.85.218.52]:36694 "EHLO mail-ej1-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231192AbhFGMgp (ORCPT ); Mon, 7 Jun 2021 08:36:45 -0400 Received: by mail-ej1-f52.google.com with SMTP id a11so25665393ejf.3 for ; Mon, 07 Jun 2021 05:34:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2o3lod6/tQHJli1HMNUrlxY009C4XIUm342TOsfm420=; b=LRXwdOLxb4x7g7xhsp9PBEKGxP4DmnE5Qj0csPwhaXSmxv4oBBVzcPcnS8wT3iGaEO reBH6BO45k7qMLKWgzs/pLiCcDgdH2W2LZB0IG+ELCry1k0wy+vAjTn8fTg4uCP+mNy3 ywSRgxhypVz0oPAgeX26xLw2pV88b4AvuDhFGeR1t/BVnKoXOuis8k6jB15BVpkNuTss KXZrhePsdfvI3i8eVbW08KumrrUiWHePNNTk2ct3uulB1QRtee8ttvNjE+DLYVUWEsS9 Kku6lMCSXSTlt+L142TDnSU7uNkgPKvZmB3gbD+DzyW4Ovt7F+Q46jSIcDzIZV78rycn JSLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2o3lod6/tQHJli1HMNUrlxY009C4XIUm342TOsfm420=; b=fTIhGJHHDJTCaX6P9tPsTNFYCTvGtiFRBP5ccAotG0rnKH+P6rH7VZS+W1i/C1XNeo CpBZM1ge/6kc4fLvrakFjESACU+PQXoWfAkOGqLMJVJ9vK03/C2VJGi4Fw6gQnM29QWt rofq+/W763kIdkOY/WXoPhdnrcOEFL1HviUb/IMm7ihn3NSOe2FbgLHDXeQQLDGLQcDf Z5vifdr/q45ZH+j+IQ3xOAPOPsVjlwprIT7WPzAMEkBXXTNWbmiVuMrbov0x9unPu/zO 6gYKyyeosoCI+YXau7PXJQ/AYVaJion/qCvzMwz/senULoN9b8oWJBje+WYa+FPkMOar xjbQ== X-Gm-Message-State: AOAM532lvbUPOdfadL2fNMZR+l7CsRXPWTvVTfMihg+SDV+QGLgA/kHD UdYxZFv8EDzetxkGcnQe6lK0Zw== X-Google-Smtp-Source: ABdhPJz/Hr+gO9MAPM9PRNPEay7RzqTJpJntQ+xo57MOxVAOjknOseGXUJ6OHBDpV3H6B+Sllz8ylg== X-Received: by 2002:a17:907:770a:: with SMTP id kw10mr17723655ejc.213.1623069217160; Mon, 07 Jun 2021 05:33:37 -0700 (PDT) Received: from localhost.localdomain (dh207-96-76.xnet.hr. [88.207.96.76]) by smtp.googlemail.com with ESMTPSA id f18sm6471000ejz.119.2021.06.07.05.33.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 05:33:36 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v6 6/6] MAINTAINERS: Add Delta Networks TN48M CPLD drivers Date: Mon, 7 Jun 2021 14:33:17 +0200 Message-Id: <20210607123317.3242031-6-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210607123317.3242031-1-robert.marko@sartura.hr> References: <20210607123317.3242031-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add maintainers entry for the Delta Networks TN48M CPLD MFD drivers. Signed-off-by: Robert Marko --- Changes in v3: * Add reset driver documentation Changes in v2: * Drop no more existing files MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9450e052f1b1..82d9c2943c34 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5096,6 +5096,15 @@ W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git F: drivers/media/platform/sti/delta +DELTA NETWORKS TN48M CPLD DRIVERS +M: Robert Marko +S: Maintained +F: Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml +F: Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml +F: Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml +F: drivers/gpio/gpio-tn48m.c +F: include/dt-bindings/reset/delta,tn48m-reset.h + DENALI NAND DRIVER L: linux-mtd@lists.infradead.org S: Orphan