From patchwork Sun May 16 13:55:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1479066 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=cETlc+/q; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FjkLV0pRPz9sVb for ; Sun, 16 May 2021 23:55:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233811AbhEPN45 (ORCPT ); Sun, 16 May 2021 09:56:57 -0400 Received: from smtp-35.italiaonline.it ([213.209.10.35]:59877 "EHLO libero.it" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S233878AbhEPN44 (ORCPT ); Sun, 16 May 2021 09:56:56 -0400 Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id iHEzl2tgYpK9wiHF6lOWlC; Sun, 16 May 2021 15:55:40 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1621173340; bh=zRRW2ttSL8uuImcnrVzFadJTPoeeMyvOaD+cD7FnfQE=; h=From; b=cETlc+/qtTz5iDUemKDnyEZLRwJx25L2R9Ir1/mCVV5oBPBLVsOaILRUFfdpQu8dN 8zbif3+Cmx3rN/PkwWrIwgPWX8f+28j+VwMpfs75eBuk0kk+o5+B8IJk+s+5rg3A7f eUfSGlxbfXUgQSOa3EYAi3SJ5tBV1ptkIK/+p82r1stENiOUhTT5Bk2KaGU6wENLQa xI8GIujwIHOk5zBbXNaOR/KRyydpCjlH1z3p9yTC78Yj+NNP1yBSHfM1j6/qkv2DcG A3bXu14pBVYYDz1/hqlBgzQQGEw0C8yBBlkV8V3jA67fkylROtbiNzc20Wj/8Pn2zm 4H929yjDBHdhQ== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=60a1245c cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=iV3ucFmErjs7te-rZ_sA:9 From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Dario Binacchi , Linus Walleij , linux-gpio@vger.kernel.org Subject: [PATCH 1/2] pinctrl: core: configure pinmux from pins debug file Date: Sun, 16 May 2021 15:55:30 +0200 Message-Id: <20210516135531.2203-2-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210516135531.2203-1-dariobin@libero.it> References: <20210516135531.2203-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfEKWdtsMz3AlqfPzmdLuq2ferYiAGGKj4HFvxV4liFxTxx/nYFiPaqz06WDUTeS1WHZhhCKr8poXl/NXOGleEErb2k0x7cSxCjg29j2w2RMa+NjPO2u4 4EeIN4kBy38uJ1FV0leHLw675ujxfKFMtTJMJ2adb33iCj3iExzUJ8mZjrHi4U1tl4P9AM4I8A6hyuNP9jUagvq78OKJHJwlIwhEy1nkjEU3Z/HW04F4co5c fSMFGnMUaJIVnyAiWXEdE3k6SishEjHpVlxFoePR4QqCPqmteytdzeZeJbDcXu6L1JPULWEFoYlZaFXSjn2E/JhY54YxULqx6GQrakFiq+6u4wKF5oxVyHiD B86K/0hy Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The MPUs of some architectures (e.g AM335x) must be in privileged operating mode to write on the pinmux registers. In such cases, where writes will not work from user space, now it can be done from the pins debug file if the platform driver exports the pin_dbg_set() helper among the registered operations. Signed-off-by: Dario Binacchi --- drivers/pinctrl/core.c | 56 +++++++++++++++++++++++++++++++-- include/linux/pinctrl/pinctrl.h | 2 ++ 2 files changed, 56 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index a4ac87c8b4f8..f5c9a7d44039 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -1620,6 +1620,46 @@ EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); #ifdef CONFIG_DEBUG_FS +static ssize_t pinctrl_pins_write(struct file *file, + const char __user *user_buf, size_t count, + loff_t *ppos) +{ + struct seq_file *s = file->private_data; + struct pinctrl_dev *pctldev = s->private; + const struct pinctrl_ops *ops = pctldev->desc->pctlops; + char buf[32]; + char *c = &buf[0]; + char *token; + int ret, buf_size; + unsigned int i, pin; + + if (!ops->pin_dbg_set) + return -EFAULT; + + /* Get userspace string and assure termination */ + buf_size = min(count, sizeof(buf) - 1); + if (copy_from_user(buf, user_buf, buf_size)) + return -EFAULT; + + buf[buf_size] = 0; + token = strsep(&c, " "); + if (kstrtouint(token, 0, &pin)) + return -EINVAL; + + for (i = 0; i < pctldev->desc->npins; i++) { + if (pin != pctldev->desc->pins[i].number) + continue; + + ret = ops->pin_dbg_set(pctldev, pin, c); + if (ret) + return ret; + + return count; + } + + return -EINVAL; +} + static int pinctrl_pins_show(struct seq_file *s, void *what) { struct pinctrl_dev *pctldev = s->private; @@ -1677,7 +1717,11 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) return 0; } -DEFINE_SHOW_ATTRIBUTE(pinctrl_pins); + +static int pinctrl_pins_open(struct inode *inode, struct file *file) +{ + return single_open(file, pinctrl_pins_show, inode->i_private); +} static int pinctrl_groups_show(struct seq_file *s, void *what) { @@ -1886,6 +1930,14 @@ static int pinctrl_show(struct seq_file *s, void *what) } DEFINE_SHOW_ATTRIBUTE(pinctrl); +static const struct file_operations pinctrl_pins_fops = { + .open = pinctrl_pins_open, + .read = seq_read, + .write = pinctrl_pins_write, + .llseek = seq_lseek, + .release = single_release, +}; + static struct dentry *debugfs_root; static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) @@ -1915,7 +1967,7 @@ static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) dev_name(pctldev->dev)); return; } - debugfs_create_file("pins", 0444, + debugfs_create_file("pins", 0644, device_root, pctldev, &pinctrl_pins_fops); debugfs_create_file("pingroups", 0444, device_root, pctldev, &pinctrl_groups_fops); diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h index 70b45d28e7a9..6db4a775f549 100644 --- a/include/linux/pinctrl/pinctrl.h +++ b/include/linux/pinctrl/pinctrl.h @@ -95,6 +95,8 @@ struct pinctrl_ops { unsigned *num_pins); void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned offset); + int (*pin_dbg_set) (struct pinctrl_dev *pctldev, unsigned int offset, + char *buf); int (*dt_node_to_map) (struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps); From patchwork Sun May 16 13:55:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1479068 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=YW5enN5a; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FjkLV3PjXz9sVt for ; Sun, 16 May 2021 23:55:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233869AbhEPN47 (ORCPT ); Sun, 16 May 2021 09:56:59 -0400 Received: from smtp-35.italiaonline.it ([213.209.10.35]:33398 "EHLO libero.it" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S233892AbhEPN45 (ORCPT ); Sun, 16 May 2021 09:56:57 -0400 Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id iHEzl2tgYpK9wiHF6lOWlZ; Sun, 16 May 2021 15:55:41 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1621173341; bh=zZLQBLl9wixM7xxtZD+7yOPbluTczTOuH82A39eRwh8=; h=From; b=YW5enN5amP39PC+aP1tW2smXXvsDSBoFeX5O+8IL2EoEi6ZbB15HvlLptBx575g5K irlACxdTpZYmGCeEWUtpDAn+JAuqHfTrmMehRROecnTpHUdmFnpuxw4pC0RMSH/grP 1TZq8Fnxj/sQAHcugz/ADZCcBirg7Qg4vbzreYLr5MduhD/kmzca4/z4Ed3kMIXCB1 RPiRnweLLJtPdkkZvqEZvbdbdpH37m/qiqSkJU3NaEndxL8kogoVxVGTsp34SyHivF H8+JogyONt2mqkYfEZJGMwrYoW3cNaUwtLj0iT2jU11KnUFXRiJqcCO3qqXwCZgyRW s7jCQcRbxppuw== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=60a1245d cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=sozttTNsAAAA:8 a=hlofsd_XEJyvNm5uEDwA:9 a=aeg5Gbbo78KNqacMgKqU:22 From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Dario Binacchi , Haojian Zhuang , Linus Walleij , Tony Lindgren , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 2/2] pinctrl: single: set pinmux from pins debug file Date: Sun, 16 May 2021 15:55:31 +0200 Message-Id: <20210516135531.2203-3-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210516135531.2203-1-dariobin@libero.it> References: <20210516135531.2203-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfJitAJ0M4XIXYHKFsdVSSJT/tz+2fn1XZyqRVv7cNGLeIY1LDkdsgw1cB9KctyKn3zYTLQ3J2o9S3lpE23G/fdUnSu6oIzDYCconWScoLDRvewSB93jK +adOMGnuKAiZD1fbVuhdaCd7yGWve3r5v4if3aGJvw+HFikj9rRLvD5sGm+rZARsa3bBpCMbA089B99Bz1mQUVg9kRajMStiHcVfG4eZE/TMiHlhqclh3G82 OUaKF7qKSMSefEDISPS8cxucIndJC5exNSBZb+oSw7T1+HWTON6GY3va5Ki4871D5wtW3QLD8nmcWV1tAQ6wfa+IwX6khJ/mwbtYXd3dxzJRyhtvHxlqpNoA 6WMWOlyXZRUMw1Z5/BHpmf6eswgdvVM1vCOTSfYKe8EerB1tnI1nKBo4EXt92QunELD2IHMdHdyOeI2Dm+QdOasSN+sXKyRm3f2Lf8F4/VkAyW5kLsF8SqY4 BzES+3DmXSMrLGbOcym3p2W4CupnRGT8YBEsZA== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org As described in section 9.1 of the TI reference manual for AM335x [1], "For writing to the control module registers, the MPU will need to be in privileged mode of operation and writes will not work from user mode". By adding the pin_dbg_set helper to pcs_pinctrl_ops it will be possible to write these registers from the pins debug: cd /sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single/ echo >pins [1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf Signed-off-by: Dario Binacchi --- drivers/pinctrl/pinctrl-single.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 2c9c9835f375..cdbc2298360d 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -313,6 +313,23 @@ static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev, seq_printf(s, "%zx %08x %s ", pa, val, DRIVER_NAME); } +static int pcs_pin_dbg_set(struct pinctrl_dev *pctldev, unsigned int pin, + char *buf) +{ + struct pcs_device *pcs; + unsigned int val, mux_bytes; + + buf = skip_spaces(buf); + if (kstrtouint(buf, 0, &val)) + return -EINVAL; + + pcs = pinctrl_dev_get_drvdata(pctldev); + + mux_bytes = pcs->width / BITS_PER_BYTE; + pcs->write(val, pcs->base + pin * mux_bytes); + return 0; +} + static void pcs_dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map, unsigned num_maps) { @@ -331,6 +348,9 @@ static const struct pinctrl_ops pcs_pinctrl_ops = { .get_group_name = pinctrl_generic_get_group_name, .get_group_pins = pinctrl_generic_get_group_pins, .pin_dbg_show = pcs_pin_dbg_show, +#if IS_ENABLED(CONFIG_DEVMEM) && IS_ENABLED(CONFIG_SOC_AM33XX) + .pin_dbg_set = pcs_pin_dbg_set, +#endif .dt_node_to_map = pcs_dt_node_to_map, .dt_free_map = pcs_dt_free_map, };