From patchwork Mon May 10 14:45:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1476493 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=XvTMGYg2; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff3lG1XwBz9sV5 for ; Tue, 11 May 2021 00:46:00 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8A364396B40E; Mon, 10 May 2021 14:45:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8A364396B40E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1620657957; bh=EOlwhbJrCEwnzA+Nmv93Iqf3WqtT2bHWqd1bbHfOp1g=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=XvTMGYg21wlkgFYEhDhSvSlLDMUIoCG+4gY6I1xmg4Qdh5PasH7SUNyI8AZs6tw1J bGAG+dq/O02AbLO91YAyRp+yDGz+xGV8oRr3Ia6bKadZk1//Lq/QiNMA7oQuWrg9Lk 078l31qvYlRnbEef4RkyM7uM92eYTkPZCmxOwVBs= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by sourceware.org (Postfix) with ESMTPS id 0A621385740B for ; Mon, 10 May 2021 14:45:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0A621385740B Received: by mail-qk1-x72f.google.com with SMTP id 197so15503707qkl.12 for ; Mon, 10 May 2021 07:45:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=EOlwhbJrCEwnzA+Nmv93Iqf3WqtT2bHWqd1bbHfOp1g=; b=VnOPJGxJhEm61uRtfJmz/X2EmBCCV+qdXkogTDmrYa/XZrNmxSsUYAh2B5nof8QmdH vecaKG5cWvcoA4uIsrahemn/9PhoC9lEDEFhqOoqP7Din1ZEZ57/q8IlZxvaaXhXyMao dF6qDaDaHyxfTgzmKUnKyCxhyzAvS3znjLSoPCbUxgJkZuCCEZcQNRkH3kvE/7ZjZpl+ aee1a1AgYElChOJt9T/BvSGho+nla/5aBZ4DyaK/dH0XzmO8Tl2jxjKr0Jzr35rWfwl9 zwqMFZosJXOHSvYaSP7hCt6aMNupfZ8Jl9YZFJ3a58k0geJK2mg7R5B/Tj1DU9gk8ojH RU2Q== X-Gm-Message-State: AOAM532SbXLqvGaEaj3Y8upUSyHzP5SMYw3xSRjk+Dh3ZBzhXh8p5tGM rfPzfy70tlQuF6ObSKjlOkAgTiKGgejUYDrdrULNYv9P00W8YQ== X-Google-Smtp-Source: ABdhPJxrVYJBAF6yYxbaz3prb3FZmafQ17A46txWEyRvuDZYKosOezJfFcOwsLA7lLZGXmNQXf2wksh7qmWj2BWp9pc= X-Received: by 2002:ae9:e706:: with SMTP id m6mr13050206qka.74.1620657954363; Mon, 10 May 2021 07:45:54 -0700 (PDT) MIME-Version: 1.0 Date: Mon, 10 May 2021 16:45:43 +0200 Message-ID: Subject: [PATCH] i386: Force V2SI mode operands to registers in expand_sse_movcc To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" For some reason middle-end does not enforce operand predicates for vcond patterns. 2021-05-10 Uroš Bizjak gcc/ * config/i386/i386-expand.c (ix86_expand_sse_movcc) : Force op_true to register. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index e9f11bca78a..5cfde5b3d30 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -3707,6 +3707,8 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false) case E_V2SImode: if (TARGET_SSE4_1) { + op_true = force_reg (mode, op_true); + gen = gen_mmx_pblendvb; if (mode != V8QImode) d = gen_reg_rtx (V8QImode);