From patchwork Fri May 7 13:17:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1475525 X-Patchwork-Delegate: miquel.raynal@bootlin.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1:d65d:64ff:fe57:4e05; helo=desiato.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=desiato.20200630 header.b=FDicuQ73; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=xpO4Qii9; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=d4eBMXrS; dkim-atps=neutral Received: from desiato.infradead.org (desiato.infradead.org [IPv6:2001:8b0:10b:1:d65d:64ff:fe57:4e05]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Fc9yJ67fJz9sXL for ; Fri, 7 May 2021 23:19:04 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=fWo3G/NCbog+bLDyYPEYzP1FuM3LCU5g6nF+2Ko/7Gg=; b=FDicuQ73XtbQOWbAe+c6bsR09 7p37nCpMoEbsqqMlCsCHaFvOvuuWGgbH2KDsMPER4UvHyVCTJ6RccCDoTwwp8NWVC+MaNC6g6CqcB ZSe9wzHziVB3J5+BGqQRztV9ZYub4bFPo1U7AexDm67tJlLFUUpA9M1x6Jq7HYc8gSFF2Ohv8i70U +rnUhVzrXsU570geFgFCLhP3F1aSwDbPIoHF5R0yiG83QUhbCMiL/0UEwCRbfWB8chtT43uRVOGmZ /DxwNaqJ2AgGi9nPm6Assolg23xw/lYR1XOSJW7ogPZuTWzs8LE39u/KBsJuPNy8fSHcdufuWT6hI 9JRdJWMJA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N9-0079J3-LV; Fri, 07 May 2021 13:18:27 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N5-0079IG-Bj; Fri, 07 May 2021 13:18:23 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=J1kgdyPnZVAZmjhvFTZCtchyF+JveNeIja4j9TKTgUA=; b=xpO4Qii9U0ZVEjE6qYDkfPF6az 8UPmJPQtRD/IzIM+9ATvB/85FEds+2aW1LKF/CWFaHyrmM1/wJYlCaJo+0nnUfZITEoT8iJ/XHP9E kVbF8218AmDacgEcxihPDs3OqhHuWvVBWANmBWDPO1Epg4GPUhz+KszDyHU1sTC065N75WCmazoY1 hTiJIfKfPQn13XfhtU1lSFxhQLVNGYw7XFcu8gYe07tPeSF417plTH3SXhTZ8BtKnsncnY0HYtZxd J2kHcs3rRwvk/EtN3UlLWqk051nGqOke0qIdTaFZUbym8oq7ez4fNaHpAVSVfAYugsGUv8bAyIs+K pbitx+3g==; Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N2-006skr-4y; Fri, 07 May 2021 13:18:22 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 147DD5M5030751; Fri, 7 May 2021 15:18:14 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=J1kgdyPnZVAZmjhvFTZCtchyF+JveNeIja4j9TKTgUA=; b=d4eBMXrSo4PX1jE1BFuLEjKJSC3NWM6Fw5K6AqdeORQzy9t3GBlCK04m5yURQhycz8vZ IfYvU+I4RBc/lgSRF3Hx4TRCJ/76p66K3Qus0s5XGpPg6fVJ/E3OHGBaOjHPF3jalkjz PhTfoG3QonBp1DaO80QHaSqAZz2EmjxLDDJDGCAoDkeRNmUbWiUrOqop31sdzaMlEeHs h2uheWvFWnbDpBCMRvzQ6IGVkrIfCJESnhFMHqyKObwWPjQKSHhl0DPtZ7bnBo55pohR R6SOvUEzvDDgql0ae2H2GWzMfBAsYDM3m4WYoz4dGOcANuMlXbeTGg+zXySjabYv4i6i cw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 38csqbv68q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 May 2021 15:18:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BD440100034; Fri, 7 May 2021 15:18:13 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A5C68221F79; Fri, 7 May 2021 15:18:13 +0200 (CEST) Received: from localhost (10.75.127.48) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 7 May 2021 15:18:13 +0200 From: To: Mark Brown , Miquel Raynal , Vignesh Raghavendra , Boris Brezillon , , Alexandre Torgue , , , , CC: , Subject: [PATCH v2 1/3] spi: spi-mem: add automatic poll status functions Date: Fri, 7 May 2021 15:17:54 +0200 Message-ID: <20210507131756.17028-2-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507131756.17028-1-patrice.chotard@foss.st.com> References: <20210507131756.17028-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-07_04:2021-05-06, 2021-05-07 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210507_061820_512112_B2B98EF0 X-CRM114-Status: GOOD ( 25.56 ) X-Spam-Score: -0.8 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Patrice Chotard With STM32 QSPI, it is possible to poll the status register of the device. This could be done to offload the CPU during an operation (erase or program a SPI NAND for example). Content analysis details: (-0.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Patrice Chotard With STM32 QSPI, it is possible to poll the status register of the device. This could be done to offload the CPU during an operation (erase or program a SPI NAND for example). spi_mem_poll_status API has been added to handle this feature. This new function take care of the offload/non-offload cases. For the non-offload case, use read_poll_timeout() to poll the status in order to release CPU during this phase. Signed-off-by: Patrice Chotard Signed-off-by: Christophe Kerello --- Changes in v2: - Indicates the spi_mem_poll_status() timeout unit - Use 2-byte wide status register - Add spi_mem_supports_op() call in spi_mem_poll_status() - Add completion management in spi_mem_poll_status() - Add offload/non-offload case mangement in spi_mem_poll_status() - Optimize the non-offload case by using read_poll_timeout() drivers/spi/spi-mem.c | 71 +++++++++++++++++++++++++++++++++++++ include/linux/spi/spi-mem.h | 10 ++++++ 2 files changed, 81 insertions(+) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 1513553e4080..3f29c604df7d 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -6,6 +6,7 @@ * Author: Boris Brezillon */ #include +#include #include #include #include @@ -743,6 +744,75 @@ static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv) return container_of(drv, struct spi_mem_driver, spidrv.driver); } +/** + * spi_mem_finalize_op - report completion of spi_mem_op + * @ctlr: the controller reporting completion + * + * Called by SPI drivers using the spi-mem spi_mem_poll_status() + * implementation to notify it that the current spi_mem_op has + * finished. + */ +void spi_mem_finalize_op(struct spi_controller *ctlr) +{ + complete(&ctlr->xfer_completion); +} +EXPORT_SYMBOL_GPL(spi_mem_finalize_op); + +/** + * spi_mem_poll_status() - Poll memory device status + * @mem: SPI memory device + * @op: the memory operation to execute + * @mask: status bitmask to ckeck + * @match: (status & mask) expected value + * @timeout_ms: timeout in milliseconds + * + * This function send a polling status request to the controller driver + * + * Return: 0 in case of success, -ETIMEDOUT in case of error, + * -EOPNOTSUPP if not supported. + */ +int spi_mem_poll_status(struct spi_mem *mem, + const struct spi_mem_op *op, + u16 mask, u16 match, u16 timeout_ms) +{ + struct spi_controller *ctlr = mem->spi->controller; + unsigned long ms; + int ret = -EOPNOTSUPP; + int exec_op_ret; + u16 *status; + + if (!spi_mem_supports_op(mem, op)) + return ret; + + if (ctlr->mem_ops && ctlr->mem_ops->poll_status) { + ret = spi_mem_access_start(mem); + if (ret) + return ret; + + reinit_completion(&ctlr->xfer_completion); + + ret = ctlr->mem_ops->poll_status(mem, op, mask, match, + timeout_ms); + + ms = wait_for_completion_timeout(&ctlr->xfer_completion, + msecs_to_jiffies(timeout_ms)); + + spi_mem_access_end(mem); + if (!ms) + return -ETIMEDOUT; + } else { + status = (u16 *)op->data.buf.in; + ret = read_poll_timeout(spi_mem_exec_op, exec_op_ret, + ((*status) & mask) == match, 20, + timeout_ms * 1000, false, mem, op); + if (exec_op_ret) + return exec_op_ret; + } + + return ret; +} +EXPORT_SYMBOL_GPL(spi_mem_poll_status); + static int spi_mem_probe(struct spi_device *spi) { struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); @@ -763,6 +833,7 @@ static int spi_mem_probe(struct spi_device *spi) if (IS_ERR_OR_NULL(mem->name)) return PTR_ERR_OR_ZERO(mem->name); + init_completion(&ctlr->xfer_completion); spi_set_drvdata(spi, mem); return memdrv->probe(mem); diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 2b65c9edc34e..0fbf5d0a3d31 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -250,6 +250,7 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem) * the currently mapped area), and the caller of * spi_mem_dirmap_write() is responsible for calling it again in * this case. + * @poll_status: poll memory device status * * This interface should be implemented by SPI controllers providing an * high-level interface to execute SPI memory operation, which is usually the @@ -274,6 +275,9 @@ struct spi_controller_mem_ops { u64 offs, size_t len, void *buf); ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, const void *buf); + int (*poll_status)(struct spi_mem *mem, + const struct spi_mem_op *op, + u16 mask, u16 match, unsigned long timeout); }; /** @@ -369,6 +373,12 @@ devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem, void devm_spi_mem_dirmap_destroy(struct device *dev, struct spi_mem_dirmap_desc *desc); +void spi_mem_finalize_op(struct spi_controller *ctlr); + +int spi_mem_poll_status(struct spi_mem *mem, + const struct spi_mem_op *op, + u16 mask, u16 match, u16 timeout); + int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv, struct module *owner); From patchwork Fri May 7 13:17:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1475532 X-Patchwork-Delegate: miquel.raynal@bootlin.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1:d65d:64ff:fe57:4e05; helo=desiato.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Received: from desiato.infradead.org (desiato.infradead.org [IPv6:2001:8b0:10b:1:d65d:64ff:fe57:4e05]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FcB1T6fxjz9sXL for ; Fri, 7 May 2021 23:21:48 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8RhnErTk+HgUHCmtZW47v0DTVpT/lHiQXWHtMC7Q2mA=; b=bg6wIfiCVFvpsREoOVEtO4u2e pOMrELuLgyeG/YhPuyfXX4SElxMgmHT/T3DrJ6Zwaxc3P/AkedqcDEqY8/UVK3MqnRM5XnzVZOGNP xade28Rk/RBoIQyHwemHhpHyagtsdZndAhGZJVqGy97aTm8rLN7FuDdl1QMEQGjuEvuY5g9oppsEr AlaHCEdVySdKr0EeReLgbmY2h+v8GRRd86CGdKrjxBkgNljSwJE2OtYywIAd1b0a/ypyvs2RC8EzZ CkuxRVDqA24i2IY5M7S3QN4TEEAwWV3zNd4ZO+PWAnuinqQw+rUwy9syXp+tgwuvvrdvEhB5ANSDw 4ovrzl0Wg==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lf0PP-0079zs-4P; Fri, 07 May 2021 13:20:47 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N6-0079Ia-4X; Fri, 07 May 2021 13:18:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2VbaSQPKll45bb5e+nOLyoc5u0h4ohc9JIgkDyyn1+g=; b=dRM1vBvqRB0OBgN37B6UwIkYmJ logYL/nQ/KYoOqvazePKlS0ie4zuxS1478SDgrYW8nGvuRsAZ9UxPr0mjh1dJv9o5EG1XSzEbtta6 CNUwqdgAuqiMws/4KzNb+D5WdjT2KHSOvKpUFFjFyy6v2hEoKgCReNTzwvgLESMCzqYB0ChZ1sqN2 e56P1JlTY/JTku/x6SUPUzJ/Swl2qCZH0Fe5wnSD1GIC4rQ1K2mR745JpujN5nfD6BKRgzK7qaF87 z+2LgaMLcd0jWYX2AoFAPt7cZgDOYbkSXHfro86R6uOwgZOlykXL6fB675TVxR647onHZ+jYNaQ7n iaXn0GmA==; Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N2-006skt-GR; Fri, 07 May 2021 13:18:22 +0000 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 147DGNw0023853; Fri, 7 May 2021 15:18:14 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=2VbaSQPKll45bb5e+nOLyoc5u0h4ohc9JIgkDyyn1+g=; b=a+LCm4edN9xxIkKKwKCS8ESJ22G477AXAryOAOzgXIAufLzTqdUW4VVuv+mmKoMoUTgo Vv6kSXimcwKhzG6wE2ujG9c59m38L2fFrte5MlbznnIbBLVqnwkXuDum+RwqnjDCKVWq ds9NJ87ZOVfrSfs51LzRFmJftVT2jhyMfKGN1D32dx7Fl65WAusuXAVZiCKcX9+iZPZF HoVIeqJo5xKZHJS8kixc86k94ax7owSleEEZT7wVviVkPmuZj9d0DxJdGnrvVRijcbKt Zux7aJ+X6ZGSu2m2lIpFUPbXvpBzi5VRno3ReJTjbKeuUtekF4MJfUIwzvMVbalgKipB Kw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 38cspsc394-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 May 2021 15:18:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 74114100039; Fri, 7 May 2021 15:18:14 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 650C4221F78; Fri, 7 May 2021 15:18:14 +0200 (CEST) Received: from localhost (10.75.127.51) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 7 May 2021 15:18:14 +0200 From: To: Mark Brown , Miquel Raynal , Vignesh Raghavendra , Boris Brezillon , , Alexandre Torgue , , , , CC: , Subject: [PATCH v2 2/3] mtd: spinand: use the spi-mem poll status APIs Date: Fri, 7 May 2021 15:17:55 +0200 Message-ID: <20210507131756.17028-3-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507131756.17028-1-patrice.chotard@foss.st.com> References: <20210507131756.17028-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-07_04:2021-05-06, 2021-05-07 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210507_061820_866881_FC684FEB X-CRM114-Status: GOOD ( 17.41 ) X-Spam-Score: -0.8 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Patrice Chotard Make use of spi-mem poll status APIs to let advanced controllers optimize wait operations. Signed-off-by: Patrice Chotard Signed-off-by: Christophe Kerello --- Changes in v2: - non-offload case is now managed by spi_mem_poll_sta [...] Content analysis details: (-0.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [185.132.182.106 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Patrice Chotard Make use of spi-mem poll status APIs to let advanced controllers optimize wait operations. Signed-off-by: Patrice Chotard Signed-off-by: Christophe Kerello --- Changes in v2: - non-offload case is now managed by spi_mem_poll_status() drivers/mtd/nand/spi/core.c | 17 +++++++++-------- include/linux/mtd/spinand.h | 1 + 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 17f63f95f4a2..56f81c7a73a6 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -475,18 +475,19 @@ static int spinand_erase_op(struct spinand_device *spinand, static int spinand_wait(struct spinand_device *spinand, u8 *s) { - unsigned long timeo = jiffies + msecs_to_jiffies(400); + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(REG_STATUS, + spinand->scratchbuf); u8 status; int ret; - do { - ret = spinand_read_status(spinand, &status); - if (ret) - return ret; + ret = spi_mem_poll_status(spinand->spimem, &op, STATUS_BUSY, 0, + SPINAND_STATUS_TIMEOUT_MS); + if (ret) + return ret; - if (!(status & STATUS_BUSY)) - goto out; - } while (time_before(jiffies, timeo)); + status = *spinand->scratchbuf; + if (!(status & STATUS_BUSY)) + goto out; /* * Extra read, just in case the STATUS_READY bit has changed diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 6bb92f26833e..28ee481d96eb 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -170,6 +170,7 @@ struct spinand_op; struct spinand_device; #define SPINAND_MAX_ID_LEN 4 +#define SPINAND_STATUS_TIMEOUT_MS 400 /** * struct spinand_id - SPI NAND id structure From patchwork Fri May 7 13:17:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1475533 X-Patchwork-Delegate: miquel.raynal@bootlin.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1:d65d:64ff:fe57:4e05; helo=desiato.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=desiato.20200630 header.b=floyvit1; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=UCbUvqRW; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=Xh+hOdOb; dkim-atps=neutral Received: from desiato.infradead.org (desiato.infradead.org [IPv6:2001:8b0:10b:1:d65d:64ff:fe57:4e05]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FcB4L3vY0z9sXS for ; Fri, 7 May 2021 23:24:18 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ClG/3mbNYnSuQtgnqwQxfsYEskE/l2fAp5BRFJ9Nt+I=; b=floyvit16sNgNqZjsDwZUnBjq tm9h7158X4K1U4GVTD5cH9T2xvL7SJy9yCULQ7Lzz4T+i1neySricoDgQUBpR20kxE2BWpo7cAsvc TvO1OSbv0stZZxoGlu1ikIFELiHep5f4GVC1DFmbQdbP3nw/X3jOb1+8yAkQuVSRajjJnG8Rr/Qbs +L7Dqf1N+ZZCiV/j+/K76/cSPDWBT/jw7rhbLDNaXKeKxDWTbGPWIfkJPb238X41XCkRoBvoDk4ML cBvtXen12udo8mglSZoKOGAHYQlOmXPhfIeNnMx4vnqbZ1/l6mPUflf74w7wuwdvcxlwqyQHk+xB2 B42WW+SzA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lf0Rq-007AZb-3E; Fri, 07 May 2021 13:23:18 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N6-0079Io-Ir; Fri, 07 May 2021 13:18:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=/cYEGZ8A1FD8Y/XsNWkm+XqMLX85Gh4UeRag5GB2u3U=; b=UCbUvqRWYzP0U7vp0BSNlrMs35 nQbkUoLwaRIwwEsVGTVAC9qrbgsZPXtTW3zzzIJRZumq82s4B6icQnSiL0iPGGWA4o5SPprRPtTUT wkRvlXiECahGvIvG4HEsDN4dURZNVKTwQw7Q9bUi70DnGfuV0GWcTqDuTKJeFXDD8t91MRBeLxXgB qyKQIUZU+iFmdnirw2wIeEdOScmNBxkZhBhHBtM4zKXsjSDoDPGXWfNBu1NszfoLdVBNYJqHmxGe5 gAZMR+qJ0oOQKtPRtgr801pjUL6FiB4Mt1RNqPEgtw2GL4W48HdxBr3TMg/94NpmBb8btKVdGB232 Fs8nIR7w==; Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lf0N2-006sku-I6; Fri, 07 May 2021 13:18:23 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 147DDRcd030928; Fri, 7 May 2021 15:18:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=/cYEGZ8A1FD8Y/XsNWkm+XqMLX85Gh4UeRag5GB2u3U=; b=Xh+hOdObapNQIKeLeYgEa12wmMTn4Nmh1SdTajQ1ExtKq3jfpP+nPi3qHY3J7FCNBpKU HM3yFzOm4mt4EB3lh4CYVTGFVbsK/OQ3g8tP4lWrdMiB5OcJmachyX6a6aisiQT/oQFL CASksb8ij3ITUzoG6EpmV5UGJRmAaglP9Y03SaSDLy4upqOAJJNd4UEXGqJePz1P6K+l iggMUY3QlTQ7FtMFro/S4v6IC1siQSgtbPCXoyMAEJvBVG9aPpkYkmHcYECLAFaMqfJS Q53FGRAQBAJwHjsdA81l5lSi0xRXbPymCib+KJKjw5TMYZpM3nRPOqRsFYNYhh/AIxEV cA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 38csqbv68u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 May 2021 15:18:15 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2FFEB100034; Fri, 7 May 2021 15:18:15 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1E8B7221F78; Fri, 7 May 2021 15:18:15 +0200 (CEST) Received: from localhost (10.75.127.49) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 7 May 2021 15:18:14 +0200 From: To: Mark Brown , Miquel Raynal , Vignesh Raghavendra , Boris Brezillon , , Alexandre Torgue , , , , CC: , Subject: [PATCH v2 3/3] spi: stm32-qspi: add automatic poll status feature Date: Fri, 7 May 2021 15:17:56 +0200 Message-ID: <20210507131756.17028-4-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507131756.17028-1-patrice.chotard@foss.st.com> References: <20210507131756.17028-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG1NODE2.st.com (10.75.127.2) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-07_04:2021-05-06, 2021-05-07 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210507_061820_914173_C9EA47DD X-CRM114-Status: GOOD ( 28.43 ) X-Spam-Score: -0.8 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Patrice Chotard STM32 QSPI is able to automatically poll a specified register inside the memory and relieve the CPU from this task. As example, when erasing a large memory area, we got cpu load equal to 50%. This patch allows to perform the same operation with a cpu load around 2%. Content analysis details: (-0.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Patrice Chotard STM32 QSPI is able to automatically poll a specified register inside the memory and relieve the CPU from this task. As example, when erasing a large memory area, we got cpu load equal to 50%. This patch allows to perform the same operation with a cpu load around 2%. Signed-off-by: Christophe Kerello Signed-off-by: Patrice Chotard Reported-by: kernel test robot Reported-by: kernel test robot --- Changes in v2: - mask and match stm32_qspi_poll_status() parameters are 2-byte wide - Make usage of new spi_mem_finalize_op() API in stm32_qspi_wait_poll_status() drivers/spi/spi-stm32-qspi.c | 81 ++++++++++++++++++++++++++++++++---- 1 file changed, 73 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c index 7e640ccc7e77..3cb1436ff393 100644 --- a/drivers/spi/spi-stm32-qspi.c +++ b/drivers/spi/spi-stm32-qspi.c @@ -36,6 +36,7 @@ #define CR_FTIE BIT(18) #define CR_SMIE BIT(19) #define CR_TOIE BIT(20) +#define CR_APMS BIT(22) #define CR_PRESC_MASK GENMASK(31, 24) #define QSPI_DCR 0x04 @@ -53,6 +54,7 @@ #define QSPI_FCR 0x0c #define FCR_CTEF BIT(0) #define FCR_CTCF BIT(1) +#define FCR_CSMF BIT(3) #define QSPI_DLR 0x10 @@ -107,6 +109,7 @@ struct stm32_qspi { u32 clk_rate; struct stm32_qspi_flash flash[STM32_QSPI_MAX_NORCHIP]; struct completion data_completion; + struct completion match_completion; u32 fmode; struct dma_chan *dma_chtx; @@ -115,6 +118,7 @@ struct stm32_qspi { u32 cr_reg; u32 dcr_reg; + unsigned long status_timeout; /* * to protect device configuration, could be different between @@ -128,11 +132,20 @@ static irqreturn_t stm32_qspi_irq(int irq, void *dev_id) struct stm32_qspi *qspi = (struct stm32_qspi *)dev_id; u32 cr, sr; + cr = readl_relaxed(qspi->io_base + QSPI_CR); sr = readl_relaxed(qspi->io_base + QSPI_SR); + if (cr & CR_SMIE && sr & SR_SMF) { + /* disable irq */ + cr &= ~CR_SMIE; + writel_relaxed(cr, qspi->io_base + QSPI_CR); + complete(&qspi->match_completion); + + return IRQ_HANDLED; + } + if (sr & (SR_TEF | SR_TCF)) { /* disable irq */ - cr = readl_relaxed(qspi->io_base + QSPI_CR); cr &= ~CR_TCIE & ~CR_TEIE; writel_relaxed(cr, qspi->io_base + QSPI_CR); complete(&qspi->data_completion); @@ -319,6 +332,25 @@ static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi, return err; } +static int stm32_qspi_wait_poll_status(struct stm32_qspi *qspi, + const struct spi_mem_op *op) +{ + u32 cr; + + reinit_completion(&qspi->match_completion); + cr = readl_relaxed(qspi->io_base + QSPI_CR); + writel_relaxed(cr | CR_SMIE, qspi->io_base + QSPI_CR); + + if (!wait_for_completion_timeout(&qspi->match_completion, + msecs_to_jiffies(qspi->status_timeout))) + return -ETIMEDOUT; + + writel_relaxed(FCR_CSMF, qspi->io_base + QSPI_FCR); + spi_mem_finalize_op(qspi->ctrl); + + return 0; +} + static int stm32_qspi_get_mode(struct stm32_qspi *qspi, u8 buswidth) { if (buswidth == 4) @@ -332,7 +364,7 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op) struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master); struct stm32_qspi_flash *flash = &qspi->flash[mem->spi->chip_select]; u32 ccr, cr; - int timeout, err = 0; + int timeout, err = 0, err_poll_status = 0; dev_dbg(qspi->dev, "cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n", op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth, @@ -378,6 +410,9 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op) if (op->addr.nbytes && qspi->fmode != CCR_FMODE_MM) writel_relaxed(op->addr.val, qspi->io_base + QSPI_AR); + if (qspi->fmode == CCR_FMODE_APM) + err_poll_status = stm32_qspi_wait_poll_status(qspi, op); + err = stm32_qspi_tx(qspi, op); /* @@ -387,7 +422,7 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op) * byte of device (device size - fifo size). like device size is not * knows, the prefetching is always stop. */ - if (err || qspi->fmode == CCR_FMODE_MM) + if (err || err_poll_status || qspi->fmode == CCR_FMODE_MM) goto abort; /* wait end of tx in indirect mode */ @@ -406,15 +441,43 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op) cr, !(cr & CR_ABORT), 1, STM32_ABT_TIMEOUT_US); - writel_relaxed(FCR_CTCF, qspi->io_base + QSPI_FCR); + writel_relaxed(FCR_CTCF | FCR_CSMF, qspi->io_base + QSPI_FCR); - if (err || timeout) - dev_err(qspi->dev, "%s err:%d abort timeout:%d\n", - __func__, err, timeout); + if (err || err_poll_status || timeout) + dev_err(qspi->dev, "%s err:%d err_poll_status:%d abort timeout:%d\n", + __func__, err, err_poll_status, timeout); return err; } +static int stm32_qspi_poll_status(struct spi_mem *mem, const struct spi_mem_op *op, + u16 mask, u16 match, unsigned long timeout_ms) +{ + struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master); + int ret; + + ret = pm_runtime_get_sync(qspi->dev); + if (ret < 0) { + pm_runtime_put_noidle(qspi->dev); + return ret; + } + + mutex_lock(&qspi->lock); + + writel_relaxed(mask, qspi->io_base + QSPI_PSMKR); + writel_relaxed(match, qspi->io_base + QSPI_PSMAR); + qspi->fmode = CCR_FMODE_APM; + qspi->status_timeout = timeout_ms; + + ret = stm32_qspi_send(mem, op); + mutex_unlock(&qspi->lock); + + pm_runtime_mark_last_busy(qspi->dev); + pm_runtime_put_autosuspend(qspi->dev); + + return ret; +} + static int stm32_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master); @@ -527,7 +590,7 @@ static int stm32_qspi_setup(struct spi_device *spi) flash->presc = presc; mutex_lock(&qspi->lock); - qspi->cr_reg = 3 << CR_FTHRES_SHIFT | CR_SSHIFT | CR_EN; + qspi->cr_reg = CR_APMS | 3 << CR_FTHRES_SHIFT | CR_SSHIFT | CR_EN; writel_relaxed(qspi->cr_reg, qspi->io_base + QSPI_CR); /* set dcr fsize to max address */ @@ -607,6 +670,7 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = { .exec_op = stm32_qspi_exec_op, .dirmap_create = stm32_qspi_dirmap_create, .dirmap_read = stm32_qspi_dirmap_read, + .poll_status = stm32_qspi_poll_status, }; static int stm32_qspi_probe(struct platform_device *pdev) @@ -661,6 +725,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) } init_completion(&qspi->data_completion); + init_completion(&qspi->match_completion); qspi->clk = devm_clk_get(dev, NULL); if (IS_ERR(qspi->clk)) {