From patchwork Sat Apr 17 11:29:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1467493 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=UxWpkQZT; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FMrV75Bbtz9vGL for ; Sat, 17 Apr 2021 21:30:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236223AbhDQLar (ORCPT ); Sat, 17 Apr 2021 07:30:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236226AbhDQLam (ORCPT ); Sat, 17 Apr 2021 07:30:42 -0400 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5D0CC061761; Sat, 17 Apr 2021 04:30:15 -0700 (PDT) Received: by mail-ej1-x62a.google.com with SMTP id e14so45809514ejz.11; Sat, 17 Apr 2021 04:30:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TRa3Sz1jxpiHgGK3l0+BR6ViiX/+KtB8X1pc8tNr5BA=; b=UxWpkQZTVCLbvHFEZEnU0eLmU9PmJkiTiGud3ua3H5TUUuDboNjUZU1wvVA9Vauvmz q8H5nlYTFr61FSWWW+oMxCErulReHvStoHZXm4a9YimMQNaMFV2kHzEj0DTkyPXnkHAM aG8ST760j6b7rSWPCEW/NFjHWltTsW3LLfDVhXBU0pDyp5fdovYsvpe8uoOlkuOsKYDn 5VN4/KcYfAV8GAdB8nbSzQL30JFP4S3XPBZ7opVohHSabPWOGGy2gTETcOBQArrg5Mz4 HrJhLIF8Ap914URwfnlUwLrPKVbQCNh2ESV5lxZr+9uD7A4u075V+9QNAS281h4I3Zbt Qq4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TRa3Sz1jxpiHgGK3l0+BR6ViiX/+KtB8X1pc8tNr5BA=; b=swcb5NzPqFfMpSKoba9dzVVoEncey4PkMR/QQFocUfR0z+uwJMw1ALHPb8bdjgwoyv 4o3YOdm/y/ilYLMP3KtboG6eqgoLjLW/We0lMmf6bFa261dMSc6BW/+EUP/hAnAZFkMv b1T61icGrcFitGAjegMhbNGw6S8QaXTqDzJXfY9Bxjy5iWZ3DdrOf9QREYgtnMinEqji kGYcNeJsg4cKAnVUAFLtZjGYeqnuaTIHe6zTDtIG5bPnWY4cDO9IuqGCshPjaXbV5oFE 37XeP2TG/edwk8PoLEpv9DGUkVHDFjVGpA2/kfXLq/p2ykoDIDrtuOdEaws8JJzO2mGg bw0Q== X-Gm-Message-State: AOAM531qjKhDPZLvbGh4s13F8JBQUlWPnv9X5j0s0NlNDthsW4RgPaHi gO6WAOw4SVAeckC7z6Cfh9Q= X-Google-Smtp-Source: ABdhPJz/BvHl5h8iOnTT71av4QuClNlMfDbXbT/HEfeUKCP98y5JB7MZ5urAlVG9xJOe1kslFYkC9w== X-Received: by 2002:a17:906:c419:: with SMTP id u25mr13021703ejz.332.1618659014468; Sat, 17 Apr 2021 04:30:14 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id f20sm3022875ejw.36.2021.04.17.04.30.13 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Apr 2021 04:30:14 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, zhangqing@rock-chips.com, enric.balletbo@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 10/15] dt-bindings: add power-domain header for RK3568 SoCs Date: Sat, 17 Apr 2021 13:29:47 +0200 Message-Id: <20210417112952.8516-11-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210417112952.8516-1-jbx6244@gmail.com> References: <20210417112952.8516-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Elaine Zhang According to a description from TRM, add all the power domains Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker Acked-by: Rob Herring --- include/dt-bindings/power/rk3568-power.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 include/dt-bindings/power/rk3568-power.h diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h new file mode 100644 index 000000000..6cc1af1a9 --- /dev/null +++ b/include/dt-bindings/power/rk3568-power.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__ +#define __DT_BINDINGS_POWER_RK3568_POWER_H__ + +/* VD_CORE */ +#define RK3568_PD_CPU_0 0 +#define RK3568_PD_CPU_1 1 +#define RK3568_PD_CPU_2 2 +#define RK3568_PD_CPU_3 3 +#define RK3568_PD_CORE_ALIVE 4 + +/* VD_PMU */ +#define RK3568_PD_PMU 5 + +/* VD_NPU */ +#define RK3568_PD_NPU 6 + +/* VD_GPU */ +#define RK3568_PD_GPU 7 + +/* VD_LOGIC */ +#define RK3568_PD_VI 8 +#define RK3568_PD_VO 9 +#define RK3568_PD_RGA 10 +#define RK3568_PD_VPU 11 +#define RK3568_PD_CENTER 12 +#define RK3568_PD_RKVDEC 13 +#define RK3568_PD_RKVENC 14 +#define RK3568_PD_PIPE 15 +#define RK3568_PD_LOGIC_ALIVE 16 + +#endif From patchwork Sat Apr 17 11:29:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1467494 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=YS3bWQV3; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FMrVC05B3z9sVw for ; Sat, 17 Apr 2021 21:30:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236269AbhDQLau (ORCPT ); Sat, 17 Apr 2021 07:30:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236231AbhDQLan (ORCPT ); Sat, 17 Apr 2021 07:30:43 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF05BC061763; Sat, 17 Apr 2021 04:30:16 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id sd23so37191134ejb.12; Sat, 17 Apr 2021 04:30:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=y3wm7faQjf3OHfSZwDN9B47guWYbbRlys9qJW4VJCQI=; b=YS3bWQV33LBDIsf0GQbDPJwfKepFfw+Dswv6TFLEy006J1DL3ISiAOFfkFoQwQdrJ2 Htko0opDCb7zWI2nNTo6Z8Z/6uhXFtOHs8e9JTl8TMoEI7StawB2KhWTiVMD1cA0c5KB fnaZgJ96uPSQMTEeK9FptQkgMhxBqqBpHWWdFMwPgIlgzvGT/1AW9dIQLPNd1AUGkGeO NkPPBwqWo/esyfI0g40bFC7pFksQwGG0QQMom9jwQo7sejkbaaXmtvV6WESfwhEBCa/u ATHi4SMtCY0dw5J10/slRCWtBNIwz1tOsCIm8093TMgyBL9D+DsiCcEBswxTkjcmORxG FvNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y3wm7faQjf3OHfSZwDN9B47guWYbbRlys9qJW4VJCQI=; b=dkTuOTr4wOdHeO3EPuCBvXgt83fHNZwiuOqXszMClqMRdWvDRLyN0TlMcZNmxIHn1D YvlzIxdo038tybfAhWLVWk/RTx/ycHtCkT1O1rjmg/wKBiDw3tiP+U8rqG9ZjHVKSbGg EkSBiftWj+lr+V0df0vbbAJfEMLlmf0EjpP9DOGzQP/Alpzbkm0o/nJHHXmj98sSDAOv lur7o5RdDBKCoW2i31pqEfGSVZb5A7sWRGQd5Z1qAd9PVG11KyBJRqYhjG6H0elA+R7j JNvAmcnRqKQZQiGloq3xPTfmNAZT+IvVa64zM+x8nZjEagol9SrHzJBx+QXPVU3Vx2z3 YZ/g== X-Gm-Message-State: AOAM533BxGlr6747+vN8df7r3JS8o+1NUsbND35QJun3/HvHB+xjMKBl B6p0fVh+yz62k9zfqdvPslc= X-Google-Smtp-Source: ABdhPJzb3y9MXZdf7V8IoJrEab1zt8geOX/i3hCvDrAJrasP+3Sg9fE2m7sAT9v+6j8iCJXxAfNYCQ== X-Received: by 2002:a17:906:c08f:: with SMTP id f15mr12843436ejz.318.1618659015690; Sat, 17 Apr 2021 04:30:15 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id f20sm3022875ejw.36.2021.04.17.04.30.14 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Apr 2021 04:30:15 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, zhangqing@rock-chips.com, enric.balletbo@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 11/15] dt-bindings: arm: rockchip: convert pmu.txt to YAML Date: Sat, 17 Apr 2021 13:29:48 +0200 Message-Id: <20210417112952.8516-12-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210417112952.8516-1-jbx6244@gmail.com> References: <20210417112952.8516-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Current dts files with 'pmu' nodes are manually verified. In order to automate this process pmu.txt has to be converted to yaml. Signed-off-by: Johan Jonker Reviewed-by: Rob Herring --- .../devicetree/bindings/arm/rockchip/pmu.txt | 16 ------- .../devicetree/bindings/arm/rockchip/pmu.yaml | 49 ++++++++++++++++++++++ 2 files changed, 49 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.yaml diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt b/Documentation/devicetree/bindings/arm/rockchip/pmu.txt deleted file mode 100644 index 3ee9b428b..000000000 --- a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt +++ /dev/null @@ -1,16 +0,0 @@ -Rockchip power-management-unit: -------------------------------- - -The pmu is used to turn off and on different power domains of the SoCs -This includes the power to the CPU cores. - -Required node properties: -- compatible value : = "rockchip,rk3066-pmu"; -- reg : physical base address and the size of the registers window - -Example: - - pmu@20004000 { - compatible = "rockchip,rk3066-pmu"; - reg = <0x20004000 0x100>; - }; diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml new file mode 100644 index 000000000..0b816943d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Power Management Unit (PMU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The PMU is used to turn on and off different power domains of the SoCs. + This includes the power to the CPU cores. + +select: + properties: + compatible: + contains: + enum: + - rockchip,rk3066-pmu + + required: + - compatible + +properties: + compatible: + items: + - enum: + - rockchip,rk3066-pmu + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: true + +examples: + - | + pmu@20004000 { + compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd"; + reg = <0x20004000 0x100>; + }; From patchwork Sat Apr 17 11:29:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1467495 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Ium/YVGK; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FMrVC4Gt1z9vGL for ; Sat, 17 Apr 2021 21:30:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236276AbhDQLau (ORCPT ); Sat, 17 Apr 2021 07:30:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236234AbhDQLap (ORCPT ); Sat, 17 Apr 2021 07:30:45 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3CDDC061760; Sat, 17 Apr 2021 04:30:17 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id mh2so24292030ejb.8; Sat, 17 Apr 2021 04:30:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xfofUqGW184RoX+HJlYABRYXL1WMbu1EY10rrB3ZnHQ=; b=Ium/YVGKp3vWIeN2GUFPBLqBAhQ+Wfwwp4G+dt//qxoFNibjceK2x8kD3S09uXSkad s+ehi2o0Wiqq5CJuEyv6Qa0V7izN9RLOee7CnKMhefCYbjP0/PHkWLl3OfiZKngeBv42 58sT+tiEIIO2/xWqj/oSDcMPmqCzjoHcuKTi4j16C42pY1qFmFy38uy0nRTi1zKmFo72 2wpYajeMx+FKybbGBPmzk3XFJKQSegTgrqBwoMz50VT3WSqWcUfq1p6N1r+vMpTfBmIW iHM162i4TddJoG5lszcnqBJ37sRg2Qvggewkv6gWGUDxu99iF+DsoysLCTLgggCRuY6A v/sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xfofUqGW184RoX+HJlYABRYXL1WMbu1EY10rrB3ZnHQ=; b=TUfd9qk5f9sXXgCe1eaG0zV9HsOvQMwDqu+1yLuyffopePOWWdC0DXNfvbj5VYuOKL s5J6hZy3dsp1+zsvtQcDxIPnozIG1v8ONzuLauKy04niFJDoDx3MU5Knb0j6hzZuO6TY wb7zHdA/TISTXgTFctTpNGPoDDEwKyQW+3o3BVis8j6xwM1cxaB0oJTsb67MXU4stKBC T+PSpN2nUjE9K+EfYuLseYrsnBnijsYJC4CqTQ8vl/bFyS3TXmx6wy0zFbMJRN+FW59C bI6n2AxlKheyMZORgUGjVIB4QE/y+/U1oG47KBwUM/WK+fQDdBiDx472umGodht+ZcNj eyrQ== X-Gm-Message-State: AOAM530/s56lYmysxt7ohKFfnKqeiQxA5nFBgohS5QMvwRAZ0/ZsrF3O SFw0w7NF6yEO3O/6e8wcD9U= X-Google-Smtp-Source: ABdhPJxgeEsuEz6w/Lu8YQ+IlHOsvGCNYad/N3+Mg/Mg4mYZTtwUge9G7CBAs9b3+epYXvfxNtQ0Jw== X-Received: by 2002:a17:907:9116:: with SMTP id p22mr12935768ejq.516.1618659016671; Sat, 17 Apr 2021 04:30:16 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id f20sm3022875ejw.36.2021.04.17.04.30.15 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Apr 2021 04:30:16 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, zhangqing@rock-chips.com, enric.balletbo@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 12/15] dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml Date: Sat, 17 Apr 2021 13:29:49 +0200 Message-Id: <20210417112952.8516-13-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210417112952.8516-1-jbx6244@gmail.com> References: <20210417112952.8516-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The compatible strings below are already in use in the Rockchip dtsi files, but were somehow never added to a document, so add "rockchip,px30-pmu", "syscon", "simple-mfd" "rockchip,rk3288-pmu", "syscon", "simple-mfd" "rockchip,rk3328-pmu", "syscon", "simple-mfd" "rockchip,rk3399-pmu", "syscon", "simple-mfd" for pmu nodes to pmu.yaml. Signed-off-by: Johan Jonker Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml index 0b816943d..678be9011 100644 --- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml @@ -19,7 +19,11 @@ select: compatible: contains: enum: + - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3288-pmu + - rockchip,rk3328-pmu + - rockchip,rk3399-pmu required: - compatible @@ -28,7 +32,11 @@ properties: compatible: items: - enum: + - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3288-pmu + - rockchip,rk3328-pmu + - rockchip,rk3399-pmu - const: syscon - const: simple-mfd From patchwork Sat Apr 17 11:29:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1467496 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=ZaHto2f7; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FMrVL6XPcz9sVw for ; Sat, 17 Apr 2021 21:30:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236240AbhDQLaz (ORCPT ); Sat, 17 Apr 2021 07:30:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236213AbhDQLar (ORCPT ); Sat, 17 Apr 2021 07:30:47 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E930EC061574; Sat, 17 Apr 2021 04:30:20 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id m3so35224084edv.5; Sat, 17 Apr 2021 04:30:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FTCIfq44OBYbKyD7nneDppgFgNG6j53mdedOTUJHnj4=; b=ZaHto2f76n2rt2ugudn2HsfFf3mUX4N9BKEyp2ELb2f/d40zdcErfOy8VlcmlQwPpx tFd2+se0pX1ImQhHmoBoGeFJJlnpVp7oSb8SiXrKY5AjStewGhQq4/fEeYUCbCmA08KR 2GKmsox9ntxz0TYDEU3lkmuOVgwiATm4o7HixPRRPW4p38FrlzVG6lWbEsLmE7V85iOi KaGvpV0lhGNiZF37cEnHtEgzorL+As3H2C5PcEAQTOxYH4KDNKbiD+Bqy+fUGCf8GIoL Alzn6cm137XNWGtsYdAFl+DlyU/UlP99T+Qy3NnJDoTSKOtJF0qVgDme7IiTk0sVeVt0 YU4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FTCIfq44OBYbKyD7nneDppgFgNG6j53mdedOTUJHnj4=; b=X3G4hG2i06qGBICHO72FoZXvt+5LkPKkYsqbUVIzCNcD2Vv7q6rNY99/DYKFvocBdA k/LE/M1FjVh2Af5aI6bKwtee+VIMe7EQ4XGVUwGQLTq33ZUh5dtM+r9B9LoI0w2s/oPE NJZRUmKr5bYwARPO2fDlCskP84HaqVZptatafeHpINSjMEbWlo24HtWwgwx5aatwtoAp AYCcdFCyF2d1rRXMNE1qIDKXUPbrDpUMyjOsd22Jo+fHHTEw7A4WG2bQWMRuT7r8KJmb 32Mf7uHjTDbpsu4Rr+LO2OrpQnvub6kjiG38AmAyrA4eUNj8nfuxWoenyROIcd6pC6lY ZMrA== X-Gm-Message-State: AOAM533aSXX9f5kKbCHVcAlF7lQAUD/ab2t6ywmfqC1Tihb26cn2osLF Wgz0pEmzWJaDzqIdeWcn+k/pRjmRUl0zb2Tc X-Google-Smtp-Source: ABdhPJyC8pJxtu9Jro308u980qg+HB6odGuJEss0sfQy9reMThKtXjbDAI3rmQo5CXKQZJtpmlkbxA== X-Received: by 2002:a05:6402:3495:: with SMTP id v21mr14979691edc.117.1618659019661; Sat, 17 Apr 2021 04:30:19 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id f20sm3022875ejw.36.2021.04.17.04.30.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Apr 2021 04:30:19 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, zhangqing@rock-chips.com, enric.balletbo@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 13/15] dt-bindings: power: rockchip: Convert to json-schema Date: Sat, 17 Apr 2021 13:29:50 +0200 Message-Id: <20210417112952.8516-14-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210417112952.8516-1-jbx6244@gmail.com> References: <20210417112952.8516-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Enric Balletbo i Serra Convert the soc/rockchip/power_domain.txt binding document to json-schema and move to the power bindings directory. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker Reviewed-by: Rob Herring --- Note for rob+dt: A tag was not added on purpose, because: Add "rockchip," prefix to the qos compatible name in example. Changed maintainers. Size reg description is reduced. Little style changes '' to "" Restyle patternProperties Please have a look at it again. For some SoC nodes this patch serie generates notifications for undocumented "assigned-clocks" and "assigned-clock-parents" properties till there is consensus of what to do with it. --- Changed V9: Rename definitions to $defs Restyle patternProperties Changed V8: Add pd-node ref schema Changed V7: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example Changed V6: Changed author Changed V5: Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause Remove a maintainer Changed patternProperties to power-domain Add "clocks", "assigned-clocks" and "assigned-clock-parents" Changed V4: Remove new compatible string Style changes '' to "" Changed V3: Use Enric's conversion with rk3399 example Changed V2: Convert power_domain.txt to YAML with rk3568 example --- .../bindings/power/rockchip,power-controller.yaml | 246 +++++++++++++++++++++ .../bindings/soc/rockchip/power_domain.txt | 136 ------------ 2 files changed, 246 insertions(+), 136 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml new file mode 100644 index 000000000..f71569de9 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Power Domains + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + Rockchip processors include support for multiple power domains + which can be powered up/down by software based on different + application scenarios to save power. + + Power domains contained within power-controller node are + generic power domain providers documented in + Documentation/devicetree/bindings/power/power-domain.yaml. + + IP cores belonging to a power domain should contain a + "power-domains" property that is a phandle for the + power domain node representing the domain. + +properties: + $nodename: + const: power-controller + + compatible: + enum: + - rockchip,px30-power-controller + - rockchip,rk3036-power-controller + - rockchip,rk3066-power-controller + - rockchip,rk3128-power-controller + - rockchip,rk3188-power-controller + - rockchip,rk3228-power-controller + - rockchip,rk3288-power-controller + - rockchip,rk3328-power-controller + - rockchip,rk3366-power-controller + - rockchip,rk3368-power-controller + - rockchip,rk3399-power-controller + + "#power-domain-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - "#power-domain-cells" + +additionalProperties: false + +patternProperties: + "^power-domain@[0-9a-f]+$": + + $ref: "#/$defs/pd-node" + + unevaluatedProperties: false + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^power-domain@[0-9a-f]+$": + + $ref: "#/$defs/pd-node" + + unevaluatedProperties: false + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^power-domain@[0-9a-f]+$": + + $ref: "#/$defs/pd-node" + + unevaluatedProperties: false + + properties: + "#power-domain-cells": + const: 0 + +$defs: + pd-node: + type: object + description: | + Represents the power domains within the power controller node. + + properties: + reg: + maxItems: 1 + description: | + Power domain index. Valid values are defined in + "include/dt-bindings/power/px30-power.h" + "include/dt-bindings/power/rk3036-power.h" + "include/dt-bindings/power/rk3066-power.h" + "include/dt-bindings/power/rk3128-power.h" + "include/dt-bindings/power/rk3188-power.h" + "include/dt-bindings/power/rk3228-power.h" + "include/dt-bindings/power/rk3288-power.h" + "include/dt-bindings/power/rk3328-power.h" + "include/dt-bindings/power/rk3366-power.h" + "include/dt-bindings/power/rk3368-power.h" + "include/dt-bindings/power/rk3399-power.h" + + clocks: + minItems: 1 + maxItems: 30 + description: | + A number of phandles to clocks that need to be enabled + while power domain switches state. + + pm_qos: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + A number of phandles to qos blocks which need to be saved and restored + while power domain switches state. + + "#power-domain-cells": + enum: [0, 1] + description: + Must be 0 for nodes representing a single PM domain and 1 for nodes + providing multiple PM domains. + + required: + - reg + - "#power-domain-cells" + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + qos_hdcp: qos@ffa90000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffa90000 0x0 0x20>; + }; + + qos_iep: qos@ffa98000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffa98000 0x0 0x20>; + }; + + qos_rga_r: qos@ffab0000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffab0000 0x0 0x20>; + }; + + qos_rga_w: qos@ffab0080 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffab0080 0x0 0x20>; + }; + + qos_video_m0: qos@ffab8000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffab8000 0x0 0x20>; + }; + + qos_video_m1_r: qos@ffac0000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffac0000 0x0 0x20>; + }; + + qos_video_m1_w: qos@ffac0080 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffac0080 0x0 0x20>; + }; + + power-management@ff310000 { + compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd"; + reg = <0x0 0xff310000 0x0 0x1000>; + + power-controller { + compatible = "rockchip,rk3399-power-controller"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* These power domains are grouped by VD_CENTER */ + power-domain@RK3399_PD_IEP { + reg = ; + clocks = <&cru ACLK_IEP>, + <&cru HCLK_IEP>; + pm_qos = <&qos_iep>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_RGA { + reg = ; + clocks = <&cru ACLK_RGA>, + <&cru HCLK_RGA>; + pm_qos = <&qos_rga_r>, + <&qos_rga_w>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_VCODEC { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; + pm_qos = <&qos_video_m0>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_VDU { + reg = ; + clocks = <&cru ACLK_VDU>, + <&cru HCLK_VDU>; + pm_qos = <&qos_video_m1_r>, + <&qos_video_m1_w>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_VIO { + reg = ; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@RK3399_PD_HDCP { + reg = ; + clocks = <&cru ACLK_HDCP>, + <&cru HCLK_HDCP>, + <&cru PCLK_HDCP>; + pm_qos = <&qos_hdcp>; + #power-domain-cells = <0>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt deleted file mode 100644 index 8304eceb6..000000000 --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt +++ /dev/null @@ -1,136 +0,0 @@ -* Rockchip Power Domains - -Rockchip processors include support for multiple power domains which can be -powered up/down by software based on different application scenes to save power. - -Required properties for power domain controller: -- compatible: Should be one of the following. - "rockchip,px30-power-controller" - for PX30 SoCs. - "rockchip,rk3036-power-controller" - for RK3036 SoCs. - "rockchip,rk3066-power-controller" - for RK3066 SoCs. - "rockchip,rk3128-power-controller" - for RK3128 SoCs. - "rockchip,rk3188-power-controller" - for RK3188 SoCs. - "rockchip,rk3228-power-controller" - for RK3228 SoCs. - "rockchip,rk3288-power-controller" - for RK3288 SoCs. - "rockchip,rk3328-power-controller" - for RK3328 SoCs. - "rockchip,rk3366-power-controller" - for RK3366 SoCs. - "rockchip,rk3368-power-controller" - for RK3368 SoCs. - "rockchip,rk3399-power-controller" - for RK3399 SoCs. -- #power-domain-cells: Number of cells in a power-domain specifier. - Should be 1 for multiple PM domains. -- #address-cells: Should be 1. -- #size-cells: Should be 0. - -Required properties for power domain sub nodes: -- reg: index of the power domain, should use macros in: - "include/dt-bindings/power/px30-power.h" - for PX30 type power domain. - "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power domain. - "include/dt-bindings/power/rk3066-power.h" - for RK3066 type power domain. - "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power domain. - "include/dt-bindings/power/rk3188-power.h" - for RK3188 type power domain. - "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power domain. - "include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain. - "include/dt-bindings/power/rk3328-power.h" - for RK3328 type power domain. - "include/dt-bindings/power/rk3366-power.h" - for RK3366 type power domain. - "include/dt-bindings/power/rk3368-power.h" - for RK3368 type power domain. - "include/dt-bindings/power/rk3399-power.h" - for RK3399 type power domain. -- clocks (optional): phandles to clocks which need to be enabled while power domain - switches state. -- pm_qos (optional): phandles to qos blocks which need to be saved and restored - while power domain switches state. - -Qos Example: - - qos_gpu: qos_gpu@ffaf0000 { - compatible ="syscon"; - reg = <0x0 0xffaf0000 0x0 0x20>; - }; - -Example: - - power: power-controller { - compatible = "rockchip,rk3288-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_gpu { - reg = ; - clocks = <&cru ACLK_GPU>; - pm_qos = <&qos_gpu>; - }; - }; - - power: power-controller { - compatible = "rockchip,rk3368-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_gpu_1 { - reg = ; - clocks = <&cru ACLK_GPU_CFG>; - }; - }; - -Example 2: - power: power-controller { - compatible = "rockchip,rk3399-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_vio { - #address-cells = <1>; - #size-cells = <0>; - reg = ; - - pd_vo { - #address-cells = <1>; - #size-cells = <0>; - reg = ; - - pd_vopb { - reg = ; - }; - - pd_vopl { - reg = ; - }; - }; - }; - }; - -Node of a device using power domains must have a power-domains property, -containing a phandle to the power device node and an index specifying which -power domain to use. -The index should use macros in: - "include/dt-bindings/power/px30-power.h" - for px30 type power domain. - "include/dt-bindings/power/rk3036-power.h" - for rk3036 type power domain. - "include/dt-bindings/power/rk3128-power.h" - for rk3128 type power domain. - "include/dt-bindings/power/rk3128-power.h" - for rk3228 type power domain. - "include/dt-bindings/power/rk3288-power.h" - for rk3288 type power domain. - "include/dt-bindings/power/rk3328-power.h" - for rk3328 type power domain. - "include/dt-bindings/power/rk3366-power.h" - for rk3366 type power domain. - "include/dt-bindings/power/rk3368-power.h" - for rk3368 type power domain. - "include/dt-bindings/power/rk3399-power.h" - for rk3399 type power domain. - -Example of the node using power domain: - - node { - /* ... */ - power-domains = <&power RK3288_PD_GPU>; - /* ... */ - }; - - node { - /* ... */ - power-domains = <&power RK3368_PD_GPU_1>; - /* ... */ - }; - - node { - /* ... */ - power-domains = <&power RK3399_PD_VOPB>; - /* ... */ - }; From patchwork Sat Apr 17 11:29:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1467497 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=sjmEiYPv; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4FMrVS1kplz9vGZ for ; Sat, 17 Apr 2021 21:30:40 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236305AbhDQLbD (ORCPT ); Sat, 17 Apr 2021 07:31:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236058AbhDQLas (ORCPT ); Sat, 17 Apr 2021 07:30:48 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0870C061761; Sat, 17 Apr 2021 04:30:21 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id l4so45804052ejc.10; Sat, 17 Apr 2021 04:30:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WpY6qaVVbiXXNlFP7xWIKSLPQ4/30CArlxUBPJObKKU=; b=sjmEiYPvwk8+WgblZL1E8/PrigzmiV4oUkY6MoFgJYa39jFWdOK0v+/SKji0B386/7 N8IW90BLm6FPEVZOWL5Rja7rmeWMhZPT+Y13+yGjrIqUCBwta1y6zsjf+18IUy6SuNHi tQWMcAPLsjVWGnoP565x8yN4jwNYCqUvtbjbyi2IyrXG3ACyOIz41AMQl8sNxsSTYFk9 QnAkBUHoaBJF4nbsjqns6bC2/7/98qmHjOwijIW6SvpHvqoGMiPfGJdm8VlDSULspqPN Qsyue7l+nG1DGbwSUZ3KbGMSxV7mzxROq4vK1K8Kc/BO8FKTnNCXsQeO64NkrurAnL4+ lUgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WpY6qaVVbiXXNlFP7xWIKSLPQ4/30CArlxUBPJObKKU=; b=mPo0GO04H05LLDKUQU/kHhSKUPBPjX8rQq7QeU1J1EwIWXrZNox5zdTQ87Ghd7MBgn 8oWWLlaV4pCY9DTi4O6Q9gRjn3vMb86gPk++fNQEQOEQ35uzkOz5bqOF6mqYkOEcIY30 cP3Nc2DSbPuy8/nTM9WnWbCKMjPUceL5N8hgv/+CFJJ/clma9XgONkJ6JPg2NYTVduol N0qE1X3NSoRopwZIOPe9HdLkzLv5z9PEknYuBZ7YTjLxKoZkXYvj6X9iRgG4Ohs/JXAO KMU0Ub+/+lzicqFCNHArnF1XtGR5sCefURVziLTFG1g1Xn12e05oNhbMRExRJbDxNsck ERCw== X-Gm-Message-State: AOAM5303M2YtB4pwzMCprLRhT8Qj/StlvCtLKeCot1TEYZCYpjes8iOH FyK9Vq12jJ2F3+vQoDc8bwY= X-Google-Smtp-Source: ABdhPJx9so2DJWJkXpaaza7EcdenoKizJJmiylh9P3u2FqaiZqNuaZGYX9tg5CeMB49SJcrpCDphZA== X-Received: by 2002:a17:906:b0cd:: with SMTP id bk13mr7525557ejb.184.1618659020603; Sat, 17 Apr 2021 04:30:20 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id f20sm3022875ejw.36.2021.04.17.04.30.19 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Apr 2021 04:30:20 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, zhangqing@rock-chips.com, enric.balletbo@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 14/15] dt-bindings: power: rockchip: Add bindings for RK3568 Soc Date: Sat, 17 Apr 2021 13:29:51 +0200 Message-Id: <20210417112952.8516-15-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210417112952.8516-1-jbx6244@gmail.com> References: <20210417112952.8516-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Elaine Zhang Add the compatible string for RK3568 SoC. Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker Acked-by: Rob Herring --- Changed V8: Add pd-node ref schema --- Documentation/devicetree/bindings/power/rockchip,power-controller.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index f71569de9..9b9d71087 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -40,6 +40,7 @@ properties: - rockchip,rk3366-power-controller - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller + - rockchip,rk3568-power-controller "#power-domain-cells": const: 1 @@ -117,6 +118,7 @@ $defs: "include/dt-bindings/power/rk3366-power.h" "include/dt-bindings/power/rk3368-power.h" "include/dt-bindings/power/rk3399-power.h" + "include/dt-bindings/power/rk3568-power.h" clocks: minItems: 1