From patchwork Tue Mar 16 00:16:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1453632 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=fH0x/AlE; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Dzv4D3WtTz9sSC for ; Tue, 16 Mar 2021 11:17:14 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A1F353857C56; Tue, 16 Mar 2021 00:17:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A1F353857C56 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1615853828; bh=od26p6jZ/UDlI2wQ7fYrXN85pWg129Ni03acUBwEa9g=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=fH0x/AlEpGIYtwwMQJnGoWmKu7QURJ4eGiNYyMY2ny80S2Vzdqj4gFcXfxbSQ/lUH GtwzfIRFcDeTV+bXirK+X7FTIDrk1V8YQBA3EDAgeHGKdJOrmnMCZbGf5NqeSzKSPx hK4rHGL7n1opIJWGpMK/lz7Z5cnj32wdz5uYU3+s= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id BCB913858034; Tue, 16 Mar 2021 00:17:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org BCB913858034 Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 12G03s5W072299; Mon, 15 Mar 2021 20:17:05 -0400 Received: from ppma06ams.nl.ibm.com (66.31.33a9.ip4.static.sl-reverse.com [169.51.49.102]) by mx0b-001b2d01.pphosted.com with ESMTP id 37ada7ejad-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 15 Mar 2021 20:17:05 -0400 Received: from pps.filterd (ppma06ams.nl.ibm.com [127.0.0.1]) by ppma06ams.nl.ibm.com (8.16.0.43/8.16.0.43) with SMTP id 12G03SBF013213; Tue, 16 Mar 2021 00:17:03 GMT Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by ppma06ams.nl.ibm.com with ESMTP id 378mnh2ayn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 16 Mar 2021 00:17:03 +0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 12G0H0Np42991918 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 16 Mar 2021 00:17:00 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2AEFA5204F; Tue, 16 Mar 2021 00:17:00 +0000 (GMT) Received: from vm.lan (unknown [9.145.31.74]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id BC88352052; Tue, 16 Mar 2021 00:16:59 +0000 (GMT) To: Andreas Krebbel Subject: [PATCH] IBM Z: Fix "+fvm" constraint with long doubles Date: Tue, 16 Mar 2021 01:16:58 +0100 Message-Id: <20210316001658.193590-1-iii@linux.ibm.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-15_15:2021-03-15, 2021-03-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 bulkscore=0 impostorscore=0 mlxscore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103150165 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Ilya Leoshkevich via Gcc-patches From: Ilya Leoshkevich Reply-To: Ilya Leoshkevich Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Bootstrapped and regtested on s390x-redhat-linux. Ok for master? When a long double is passed to an asm statement with a "+fvm" constraint, a LRA loop occurs. This happens, because LRA chooses the widest register class in this case (VEC_REGS), but the code generated by s390_md_asm_adjust() always wants FP_REGS. Mismatching register classes cause infinite reloading. Fix by treating "fv" constraints as "v" in s390_md_asm_adjust(). gcc/ChangeLog: * config/s390/s390.c (f_constraint_p): Treat "fv" constraints as "v". gcc/testsuite/ChangeLog: * gcc.target/s390/vector/long-double-asm-fprvrmem.c: New test. --- gcc/config/s390/s390.c | 12 ++++++++++-- .../s390/vector/long-double-asm-fprvrmem.c | 11 +++++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-asm-fprvrmem.c diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 151136bedbc..f7b1c03561e 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -16714,13 +16714,21 @@ s390_shift_truncation_mask (machine_mode mode) static bool f_constraint_p (const char *constraint) { + bool seen_f_p = false; + bool seen_v_p = false; + for (size_t i = 0, c_len = strlen (constraint); i < c_len; i += CONSTRAINT_LEN (constraint[i], constraint + i)) { if (constraint[i] == 'f') - return true; + seen_f_p = true; + if (constraint[i] == 'v') + seen_v_p = true; } - return false; + + /* Treat "fv" constraints as "v", because LRA will choose the widest register + * class. */ + return seen_f_p && !seen_v_p; } /* Implement TARGET_MD_ASM_ADJUST hook in order to fix up "f" diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-asm-fprvrmem.c b/gcc/testsuite/gcc.target/s390/vector/long-double-asm-fprvrmem.c new file mode 100644 index 00000000000..f95656c5723 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-asm-fprvrmem.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ + +long double +foo (long double x) +{ + x = x * x; + asm("# %0" : "+fvm"(x)); + x = x + x; + return x; +}