From patchwork Tue Feb 16 21:19:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441113 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=DKghdaxi; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDQb219Mz9sBy for ; Wed, 17 Feb 2021 08:20:23 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D0B5182717; Tue, 16 Feb 2021 22:20:11 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DKghdaxi"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0E63F827CF; Tue, 16 Feb 2021 22:19:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A95CA82717 for ; Tue, 16 Feb 2021 22:19:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ed1-x532.google.com with SMTP id j9so3791626edp.1 for ; Tue, 16 Feb 2021 13:19:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5N9KQFNaHZd9NGrtvsWJcEPA3VKH8p+D2wtFVn152po=; b=DKghdaxiMjZBfTiPgF+47WfQAViRpbHJqlV5oUm+nmNEtaxkM0il5/bB0qn85nF+uh 0UyWfUWMehnIMJ3ttbZBImw9h1O/KQ1v/4HWKPdOzJBszPuViDax6SEjcpacHHLNSOeG EVrzDxFSMvKHS7DRaGMCuS69oNYK4m/soU36644uxJS7RXyQd5cIaFpAzYC/8RtEYEJu BGcJLdr9Chig9l135SUBjne7fdMgRthWSxq+Gz/sOFD2ylzH/6q42r/wwsq65z9Do1ul HtFAS1dl6Wu5TwMJy3+6Gow/vpQYKsXfcQw+CJ2SHO7ZpuZ1SmvObZ4MRWPyVOYFwKun 8rww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5N9KQFNaHZd9NGrtvsWJcEPA3VKH8p+D2wtFVn152po=; b=CL5SEyz5BW3Ve1JWx6Kja9pa6J5PUwqF0VjhYskeLpeaSdD6HBPxI2ZXFNEQXXQN2d MHbV1TchHVpKGyRUqxawQEHv5qGLRTVH/jwMvGM+EYOG0utQxPKz0TE9vSQGAjRNn4ZM N1dtUqncREVqsCO5Ue1tuydk2c58yfe6EAa4TPRv5Wh8LRycXEjZPaLA16s9vwkC0ZPd naNAuuw02KYLgUl3mekliHPfrxnu9Q4MXXZY12mOLFF4PhLvpCFnJseBHsXWPqH5hiOQ l0Fgx4/8Gner5eRPNLNX9bG87k0eOyIVDtWIOCNulp6WcCyXpv5kSkh+IfQwdc/7yqeK m93Q== X-Gm-Message-State: AOAM531ocMe26xuT02U4PeRJudt1XyCCOCmpFeZPg7rgIPgIUSbXQuGC OOu3SK51TD6IgDHgdLFO8OU= X-Google-Smtp-Source: ABdhPJy3c75GBLcywk0PRFJU7XGvs4Dnlpd9MQ176iL2b6D6YP1Jx8jGFOkD4if/OZvcZQdJ7BMdmw== X-Received: by 2002:a50:a45b:: with SMTP id v27mr3700924edb.141.1613510395281; Tue, 16 Feb 2021 13:19:55 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.19.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:19:54 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 1/9] net: phy: fixed: be compatible with live OF tree Date: Tue, 16 Feb 2021 23:19:28 +0200 Message-Id: <20210216211936.3291988-2-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Vladimir Oltean On systems that use CONFIG_OF_LIVE, the "ofnode" type is defined as const struct device_node *np, while on the flat DT systems it is defined as a long of_offset into gd->fdt_blob. It is desirable that the fixed PHY driver uses the higher-level ofnode abstraction instead of parsing gd->fdt_blob directly, because that enables it to work on live OF systems. The fixed PHY driver has used a nastyyyyy hack since its introduction in commit db40c1aa1c10 ("drivers/net/phy: add fixed-phy / fixed-link support"), which is to pass the long gd->fdt_blob offset inside int phydev->addr (a value that normally holds the MDIO bus address at which the PHY responds). Even ignoring the fact that the types were already mismatched leading to a potential truncation (flat OF offset was supposed to be a long and not an int), we really cannot extend this hack any longer, because there's no way an int will hold the other representation of ofnode, the struct device_node *np. So we unfortunately need to do the right thing, which is to use the framework introduced by Grygorii Strashko in commit eef0b8a930d1 ("net: phy: add ofnode node to struct phy_device"). This will populate phydev->node for the fixed PHY. Note that phydev->node will not be valid in the probe function, since that is called synchronously from phy_device_create and we really have no way of passing the ofnode directly through the phy_device_create API. So we do what other drivers do too: we move the OF parsing logic from the .probe to the .config method of the PHY driver. Signed-off-by: Vladimir Oltean --- Changes in v5: Patch is new. drivers/net/phy/fixed.c | 31 ++++++++++++++++++++++--------- drivers/net/phy/phy.c | 24 ++++++++++++++---------- 2 files changed, 36 insertions(+), 19 deletions(-) diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c index 3228672fc4ae..d117a50719a2 100644 --- a/drivers/net/phy/fixed.c +++ b/drivers/net/phy/fixed.c @@ -15,15 +15,16 @@ DECLARE_GLOBAL_DATA_PTR; -int fixedphy_probe(struct phy_device *phydev) +static int fixedphy_of_init(struct phy_device *phydev) { + ofnode node = phy_get_ofnode(phydev); struct fixed_link *priv; - int ofnode = phydev->addr; u32 val; - /* check for mandatory properties within fixed-link node */ - val = fdt_getprop_u32_default_node(gd->fdt_blob, - ofnode, 0, "speed", 0); + if (!ofnode_valid(node)) + return -EINVAL; + + val = ofnode_read_u32_default(node, "speed", 0); if (val != SPEED_10 && val != SPEED_100 && val != SPEED_1000) { printf("ERROR: no/invalid speed given in fixed-link node!"); return -EINVAL; @@ -32,14 +33,26 @@ int fixedphy_probe(struct phy_device *phydev) priv = malloc(sizeof(*priv)); if (!priv) return -ENOMEM; + memset(priv, 0, sizeof(*priv)); phydev->priv = priv; priv->link_speed = val; - priv->duplex = fdtdec_get_bool(gd->fdt_blob, ofnode, "full-duplex"); - priv->pause = fdtdec_get_bool(gd->fdt_blob, ofnode, "pause"); - priv->asym_pause = fdtdec_get_bool(gd->fdt_blob, ofnode, "asym-pause"); + priv->duplex = ofnode_read_bool(node, "full-duplex"); + priv->pause = ofnode_read_bool(node, "pause"); + priv->asym_pause = ofnode_read_bool(node, "asym-pause"); + + return 0; +} + +static int fixedphy_config(struct phy_device *phydev) +{ + int err; + + err = fixedphy_of_init(phydev); + if (err) + return err; /* fixed-link phy must not be reset by core phy code */ phydev->flags |= PHY_FLAG_BROKEN_RESET; @@ -70,7 +83,7 @@ static struct phy_driver fixedphy_driver = { .mask = 0xffffffff, .name = "Fixed PHY", .features = PHY_GBIT_FEATURES | SUPPORTED_MII, - .probe = fixedphy_probe, + .config = fixedphy_config, .startup = fixedphy_startup, .shutdown = fixedphy_shutdown, }; diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index a2be3987364c..e88c93c4180d 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -987,19 +987,23 @@ static struct phy_device *phy_connect_fixed(struct mii_dev *bus, phy_interface_t interface) #endif { + ofnode node = dev_ofnode(dev), subnode; struct phy_device *phydev = NULL; - int sn; const char *name; - sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev)); - while (sn > 0) { - name = fdt_get_name(gd->fdt_blob, sn, NULL); - if (name && strcmp(name, "fixed-link") == 0) { - phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false, - interface); - break; - } - sn = fdt_next_subnode(gd->fdt_blob, sn); + for (subnode = ofnode_first_subnode(node); ofnode_valid(subnode); + subnode = ofnode_next_subnode(node)) { + name = ofnode_get_name(subnode); + + if (!name || strcmp(name, "fixed-link") != 0) + continue; + + phydev = phy_device_create(bus, 0, PHY_FIXED_ID, false, + interface); + if (phydev) + phydev->node = subnode; + + break; } return phydev; From patchwork Tue Feb 16 21:19:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441114 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=qfGE51oQ; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDQn0qG7z9s1l for ; Wed, 17 Feb 2021 08:20:33 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E85AB82802; Tue, 16 Feb 2021 22:20:13 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qfGE51oQ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 98423827EF; Tue, 16 Feb 2021 22:20:05 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A5835827A5 for ; Tue, 16 Feb 2021 22:19:56 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ej1-x62d.google.com with SMTP id w1so18800810ejf.11 for ; Tue, 16 Feb 2021 13:19:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=P3ayAM4ywX0K+u7E0pO1/rcTlp+zPzpeqG1VRBV8vno=; b=qfGE51oQEXxp8whHI94+ukWA8U9NoeJVrX2NDvlNe+5kImiWiFhQ42CuhZuqwU6r7n kUG3qbMASiTNUjms2c6kbemlIC2NAmDNEwV9rFNq0GF9OUkw5QBV1pwI3vq2aCYHYHJg ngjwvGrTVBxMyIXMnKwSzPE4qpUMYHcVlp9OeKGWr71iR3HYlArGAZKfDsEtHKMZEP0x Aw3wwjK8fr/o04dq1cq1DLRMdCv3ND+XBJjsCSX+VZfeUGqp1E7LRM+hB3iV4YD4b8Mw TblhdjAwNmAtyAUhHdCDRMzz7HVmbRJQdQ7U++iIdMdmjDwbRij6HQ7y2R/bTYrpMv9Y O7JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=P3ayAM4ywX0K+u7E0pO1/rcTlp+zPzpeqG1VRBV8vno=; b=J1gdcsWoisQwsV4foruwXLbbVjLUjNWwiKnEsc1mbwWTL3gbesTTpWMk3HsWDCRTSk icHMtjSWGGVONAgVXzfZ6f3w5TBCXybHPPcf2f2t7NBPfDye5w6xSyvQG2X8CNY8ZCVD gwD9Qczbx19pFxm3hF3R8ekDAbqKQBdkyIwUERxUmVX8JYHSjWVwWlzvCzgGlJFM2yrc nvqLeGlpzsE7/+ecgdzO+ZhclA/gNRCNjB7+I14NCP1mjj62h3gI+UzVlVvvoiLwXuZN 2sC866cCHbCF4rFIBb7TfN4APvXBMtwDsY/OMvd1RsC9XsRuPBVcbtTNfgmXDNOpC2Kd qavg== X-Gm-Message-State: AOAM5330zqsAX48nQ67l7MkyEhPqse8tbqhyLrfFisrwo/qlOeYVgzPh VMN6Ej3zR/7qrfufWhwSbnM= X-Google-Smtp-Source: ABdhPJzc6hpdtHqJQE683EXW7uW3D9q03CItDQP2puKQfLx87est6oJpJLxo/vVOQpwf6xkCWWR07g== X-Received: by 2002:a17:906:c82f:: with SMTP id dd15mr15597135ejb.247.1613510396349; Tue, 16 Feb 2021 13:19:56 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.19.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:19:55 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 2/9] net: phy: fixed: support speeds of 2500 and 10000 Date: Tue, 16 Feb 2021 23:19:29 +0200 Message-Id: <20210216211936.3291988-3-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Vladimir Oltean Unlike the Linux fixed PHY driver, the one in U-Boot does not attempt to emulate the clause 22 register set of a gigabit copper PHY driver through the swphy framework. Therefore, the limitation of being unable to support speeds higher than gigabit in fixed-link does not apply to the U-Boot fixed PHY driver. This makes the fixed-link U-Boot implementation more similar to the one from phylink, which can work with any valid link speed. Signed-off-by: Vladimir Oltean Reviewed-by: Claudiu Manoil --- Changes in v5: None. Changes in v4: Patch is new. drivers/net/phy/fixed.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c index d117a50719a2..ae6b44bec81c 100644 --- a/drivers/net/phy/fixed.c +++ b/drivers/net/phy/fixed.c @@ -25,7 +25,8 @@ static int fixedphy_of_init(struct phy_device *phydev) return -EINVAL; val = ofnode_read_u32_default(node, "speed", 0); - if (val != SPEED_10 && val != SPEED_100 && val != SPEED_1000) { + if (val != SPEED_10 && val != SPEED_100 && val != SPEED_1000 && + val != SPEED_2500 && val != SPEED_10000) { printf("ERROR: no/invalid speed given in fixed-link node!"); return -EINVAL; } From patchwork Tue Feb 16 21:19:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441116 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=cVzi/oCn; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDRC3wpYz9s1l for ; Wed, 17 Feb 2021 08:20:55 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 46539827E4; Tue, 16 Feb 2021 22:20:23 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="cVzi/oCn"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id E9E18827E3; Tue, 16 Feb 2021 22:20:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 23E5A826FB for ; Tue, 16 Feb 2021 22:19:58 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ej1-x62c.google.com with SMTP id i23so12627333ejg.10 for ; Tue, 16 Feb 2021 13:19:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s/0mHW9a+jLXt74Vwr7N8YHu5/DbGDWj2+9ZFoi44io=; b=cVzi/oCnWj6G9CKxjrumXgI8jYwYQqwi/eR4+NGxvS0So+C6jrgMb/e1BTN1UffKDo J1wdDsQCWXLp0WMb0/lOZdTBXfMlx8Olc+pmRNji2UFQ/ePs1nJAH1iTk/tyjl5mDxvh G6wb2f+H4uRIIuPXV9+M9CloKrJ+anhIL7plbvLe7oAZE4rwtVRtCjb+yzM7dORQmFKp x+SipqWOERIh0QKR+tHCOEcoj7YuJsdLwR8kqUwdCW6YAUEaN0KI9oYlM+2RQZYtRbi9 +EVu7laPM/3ZqoIwO8ljKqNF4t0v9NoPfs7npUNjVgBPPsIStKksJLmhgHnomNGclOMc aG7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s/0mHW9a+jLXt74Vwr7N8YHu5/DbGDWj2+9ZFoi44io=; b=pYIFu1hYmDirHNr7WkMXfgWMfyii08g+5+UsmJ7VzW0lbsQ+ajxJlK3LybyhEp2Xyv x6GFsctVEXxoDS2LktslyTFwdrj1BuagfaGs3pJo5a7NvCns+EFq3flO0YQUq8KWkzoI uFdrZA8zCFo6OiCgHR+j+ttwePdvXfasib30LPTxhsPZhp2tYytxZ9uox3gSUQIBzv7x 4AM3vNEkMwR9Y/+jvVocFsjozMR1O/wE9fJ/V/k+UGbL4x8cwl1HszfHVzse6pVNyNGA Ge4cCKgpcoS5jWFPAS6BX+vGr5j5da1GDYny4QQcoJAnhmKnrR+qFkI6O78ARBxFp2e8 0plg== X-Gm-Message-State: AOAM532iY1K08/5zbYGazNLdCpnEEe343Q3jhlUewl/dKHP4ViT6u8eA F0yywjn6F2PZNbo/D4WkHAs= X-Google-Smtp-Source: ABdhPJzTnY8BWgjE94fkcJkIgY8KUm4dV8uXPAbshO8NiK4IkJp8klC8ERJhTpQm8IfJpWiJmzyIvw== X-Received: by 2002:a17:907:7252:: with SMTP id ds18mr22462380ejc.239.1613510397714; Tue, 16 Feb 2021 13:19:57 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.19.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:19:56 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 3/9] net: phy: introduce fixed_phy_create for DSA CPU ports Date: Tue, 16 Feb 2021 23:19:30 +0200 Message-Id: <20210216211936.3291988-4-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Vladimir Oltean The DSA (Distributed Switch Architecture) implementation has made a design decision when it got introduced to the Linux kernel in 2008. That was to hide away from the user the CPU-facing Ethernet MAC, since it does not make sense to register it as a struct net_device (UCLASS_ETH udevice for U-Boot), because that would never be beneficial for a user: they would not be able to use it for traffic, since conceptually, a packet delivered to the CPU port should loop back into the system. Nonetheless, DSA has had numerous growing pains due to the lack of a struct net_device for the CPU port, but so far it has overcome them. It is unlikely at this stage of maturity that this aspect of it will change. We would like U-Boot to present the same information as Linux, to be at parity in terms of number of interfaces, so that ethNaddr environment variables could directly be associated between U-Boot and Linux. Therefore, we would implicitly like U-Boot to hide the CPU port from the user as well. But the paradox is that DSA still needs a struct phy_device to inform the driver of the parameters of the link that it should configure the CPU port to. The problem is that the phy_device is typically returned via a call to phy_connect, which needs an udevice to attach the PHY to, and to search its ofnode for the 'fixed-link' property. But we don't have an udevice to present for the CPU port. Since 99% of DSA setups are MAC-to-MAC connections between the switch and the host Ethernet controller, the struct phy_device is going to be a fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY does not need an MDIO bus, and does not need an attached dev either. Basically, the phy_connect call doesn't do any connection, it just creates the fixed PHY. The proposal of this patch is to introduce a new fixed_phy_create function which will take a single argument: the ofnode that holds this: port@4 { reg = <4>; phy-mode = "internal"; fixed-link { speed = <2500>; full-duplex; }; }; and probe a fixed PHY driver using the information from this ofnode. DSA will probably be the only user of this function. Signed-off-by: Vladimir Oltean Reviewed-by: Claudiu Manoil --- Changes in v5: Use the new API for creating a fixed PHY (introduced in patch 1), which is to put the ofnode in phydev->node instead of phydev->addr. Changes in v4: Patch is new. drivers/net/phy/phy.c | 35 +++++++++++++++++++++++++++++++++++ include/phy.h | 21 +++++++++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index e88c93c4180d..a3b294054d18 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -977,6 +977,41 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus, #endif #ifdef CONFIG_PHY_FIXED +/** + * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device + * @node: OF node for the container of the fixed-link node + * + * Description: Creates a struct phy_device based on a fixed-link of_node + * description. Can be used without phy_connect by drivers which do not expose + * a UCLASS_ETH udevice. + */ +struct phy_device *fixed_phy_create(ofnode node) +{ + phy_interface_t interface = PHY_INTERFACE_MODE_NONE; + struct phy_device *phydev; + const char *if_str; + ofnode subnode; + + if_str = ofnode_read_string(node, "phy-mode"); + if (!if_str) { + if_str = ofnode_read_string(node, "phy-interface-type"); + } + if (if_str) { + interface = phy_get_interface_by_name(if_str); + } + + subnode = ofnode_find_subnode(node, "fixed-link"); + if (!ofnode_valid(subnode)) { + return NULL; + } + + phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false, interface); + if (phydev) + phydev->node = subnode; + + return phydev; +} + #ifdef CONFIG_DM_ETH static struct phy_device *phy_connect_fixed(struct mii_dev *bus, struct udevice *dev, diff --git a/include/phy.h b/include/phy.h index 7750efd8bb5c..2754421ed4fb 100644 --- a/include/phy.h +++ b/include/phy.h @@ -402,6 +402,27 @@ int phy_reset(struct phy_device *phydev); struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, phy_interface_t interface); +#ifdef CONFIG_PHY_FIXED + +/** + * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device + * @node: OF node for the container of the fixed-link node + * + * Description: Creates a struct phy_device based on a fixed-link of_node + * description. Can be used without phy_connect by drivers which do not expose + * a UCLASS_ETH udevice. + */ +struct phy_device *fixed_phy_create(ofnode node); + +#else + +static inline struct phy_device *fixed_phy_create(ofnode node) +{ + return NULL; +} + +#endif + #ifdef CONFIG_DM_ETH /** From patchwork Tue Feb 16 21:19:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441115 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=PxFUcpZS; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDR01v7wz9s1l for ; Wed, 17 Feb 2021 08:20:44 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0D1D38280F; Tue, 16 Feb 2021 22:20:18 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PxFUcpZS"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1A373827F9; Tue, 16 Feb 2021 22:20:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2007C82717 for ; Tue, 16 Feb 2021 22:19:59 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ed1-x52d.google.com with SMTP id j9so3791763edp.1 for ; Tue, 16 Feb 2021 13:19:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iilNptHhjD6ljUm7IU5YkIGy86v+bYdMKARkjPBpreU=; b=PxFUcpZSY5LS/99ZwX7mVPMY01KNZgErm8EkYys8b+ZCVjrN/PjLx83tl/QyV0XWFk 7SOk6VtbJaL2FwpuiUpH6WqE2rC76yY2RoF6byvZwVM0JWHxm1VFOQBxNSGW2iNwJdt3 Z+6Wle2eTQEmuuD6OCWXA7P2mWQepgCWzKEonULHNS276sLwPZQOPhKp2HcWu2UUIKOG 2xz2WgCF4KrBl3A9Tb7s18h3XWjRDh9mXvAjSCBwo/y6+r20wLGwGliwZL6WAROT5k+s 9T6Z/wybfOVgdjcY2WdJ92VgiEmMRd3GnFwmUAEJhGvcI+7eYDkILvJsOfJ+gtzqUWvK F3nQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iilNptHhjD6ljUm7IU5YkIGy86v+bYdMKARkjPBpreU=; b=ajqZBG6/U8Q5vzmLRaa7fbUB/g4hA6623v2RDfWA9lRNeAKVf5WULioFVdROmdovPQ ZoxInI/ywPONGVF6w9b59800ccbReF2FDrjArcozzpZzRlwXJr0oSntuD2XjLUAwWOvc 5tmgFZvUioq+y/9F4vKmmLEo5vvm9dzJPGVjoCg04TrwQF8vFnP249aIW3b8CLSqf8ST HPHJJC45J9Ek/v4ei65tTKMqvRYphb4F6waSLBXpv+SxKpK4um0H90r4VeabQ1u4ZwL9 sNU/yMS6TBEu8HM9cN0WptfqmER5puRRh3G+rfLzDjmCCvVOLbTvqRS+pj4hkgQRZEwF SbJg== X-Gm-Message-State: AOAM5318P27Fcf3g5BDcNYbAHtAfwlYBXhnGzHf5SSK9bY40irR3CwJC 6ZHHowzap62aUR3szvSaOSk= X-Google-Smtp-Source: ABdhPJz4Fy2+o4GUPQDHsvy8tz3usuos6vvVkJJ8MW4g3mLM53q6eDwoxkEaJyGsNHlCZGTIuuEADw== X-Received: by 2002:a50:ed97:: with SMTP id h23mr12869752edr.353.1613510398753; Tue, 16 Feb 2021 13:19:58 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.19.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:19:58 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 4/9] net: mdio: teach dm_eth_connect_phy_handle to connect to fixed PHY Date: Tue, 16 Feb 2021 23:19:31 +0200 Message-Id: <20210216211936.3291988-5-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Vladimir Oltean dm_eth_connect_phy_handle has all the info it needs in order to hide away from the UCLASS_ETH caller the fact that it is attached to a fixed-link PHY. So only attempt to search for a phy-handle if we've exhausted the fixed-link option first. Signed-off-by: Vladimir Oltean --- Changes in v5: None. net/mdio-uclass.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index 697e5f838d94..766d4711cc23 100644 --- a/net/mdio-uclass.c +++ b/net/mdio-uclass.c @@ -177,9 +177,10 @@ static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev, /* Connect to a PHY linked in eth DT node */ struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) { - const char *if_str; + ofnode node = dev_ofnode(ethdev), subnode; phy_interface_t interface; struct phy_device *phy; + const char *if_str; int i; if (!dev_has_ofnode(ethdev)) { @@ -200,7 +201,14 @@ struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) if (interface == PHY_INTERFACE_MODE_NONE) dev_dbg(ethdev, "can't find interface mode, default to NONE\n"); - phy = dm_eth_connect_phy_handle(ethdev, interface); + subnode = ofnode_find_subnode(node, "fixed-link"); + if (ofnode_valid(subnode)) { + phy = phy_connect(NULL, 0, ethdev, interface); + if (phy) + phy->node = subnode; + } else { + phy = dm_eth_connect_phy_handle(ethdev, interface); + } if (!phy) return NULL; From patchwork Tue Feb 16 21:19:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441117 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=MlWgd/GY; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDRQ5yQmz9s1l for ; Wed, 17 Feb 2021 08:21:06 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id ACEA4827FF; Tue, 16 Feb 2021 22:20:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MlWgd/GY"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 86640827FA; Tue, 16 Feb 2021 22:20:13 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 53E32827D6 for ; Tue, 16 Feb 2021 22:20:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ej1-x629.google.com with SMTP id do6so8444330ejc.3 for ; Tue, 16 Feb 2021 13:20:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sIFKqjvC58yQb8rbe0oMzFJysOeYpm64TOZvgWQTyDI=; b=MlWgd/GY2kRcqcJNHfrElOC7+EPH8PUuyanD9B2rC1f/XUR1yRubd7mO5J4jys51pV wlPUKfYoU/36QxAKGENJ1g46TktzKqExiVBhm+c73whZCnQhYGCVzpB8wHXi7AmZjp/N +9H9RxV8MAVs0DlBGlx+UOKW8ev47/gmHTL0mT09rN8rK+jMhbkoO5w+Lbxxnt3EN8MQ T/FLnmTkTa0QpuGdF97M1UmsCKZkIySI3+4Z66wmhKQfPmT4dGeXBvbw7P00hGEmpvaR x0xVfg5bp83G6Br6UubGtML8XVYlyBkMua6DWftGTq59+Buvl3Yk69t66Ly+r0+3ZYPK quMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sIFKqjvC58yQb8rbe0oMzFJysOeYpm64TOZvgWQTyDI=; b=XWA/uVa80c05HcRXrchmH2jAuiR/pH+/yAWxojOYowOgscQhqnWgHCKFjvZemyVepG k70QUeI5ukM1hOp3u5OXZcGFnvaZse5RFJP9FLON1arfxksLzV2YFCiwFMrdxpGwvVFs 4GV3b4Jht3tL09Z8Xce+BDDU3+/zS/HG5qrFkbYdC6XbjsIeazqZUtC5SZcy1MK697bJ GPoI6Y4cGfnx/vssq22cV3JXUSJ1ttj3PBQK0OT1idIcWv+l9QDflIdcW51R5KfF3xAm Tf+3E4vvU+eIdZWY7wZr7MgeZIxzrBly+lgC7jpll79J8dh5xqPDv4WZFumG9PoGKH0s 0QLg== X-Gm-Message-State: AOAM5308dCQjq6XmpJ+VNfIqifJobFYfpA8KFVlYlfha8cACXfNgqpjg /HyMQju3fCVrPHMv0wG95Js= X-Google-Smtp-Source: ABdhPJxs0aEg4kJQGrhxiGI35cwbYExyGuqell3DK8sJGtlR49qVAcn2Fmhk32JBy2Xn55eqb0Y31g== X-Received: by 2002:a17:907:98c3:: with SMTP id kd3mr22672997ejc.482.1613510399835; Tue, 16 Feb 2021 13:19:59 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:19:59 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 5/9] net: introduce DSA class for Ethernet switches Date: Tue, 16 Feb 2021 23:19:32 +0200 Message-Id: <20210216211936.3291988-6-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Manoil DSA stands for Distributed Switch Architecture (a presentation here: https://netdevconf.info/2.1/papers/distributed-switch-architecture.pdf) and it covers switches that are connected to the host CPU through an Ethernet (typically MAC-to-MAC) link. Generally, DSA switches use frame tags to pass information about the source/destination ports to/from CPU. This way, the CPU has full individual awareness of the front-facing switch ports. Front panel ports are presented as regular ethernet devices in U-Boot and they are expected to support the typical networking commands. The use case for U-Boot is to use DSA switches as port multipliers, for things such as TFTP over a specific switch port. The switching ability is deemed to be too dangerous to be enabled from the bootloader without network protection features such as Spanning Tree Protocol, and is therefore not supported at all, in lack of a good reason. Some DSA switches may be cascaded in a multi-chip setup; the DSA class code does not currently support this. Signed-off-by: Alex Marginean Signed-off-by: Claudiu Manoil Reviewed-by: Simon Glass Signed-off-by: Vladimir Oltean --- v5: Adjusted commit message. v4: Implemented the TODO for having a phy_device on the CPU port. v3: - Removed all infrastructure associated with dsa_foreach_port, which is no longer needed. - Only inherit the DSA master's MAC address if the environment does not already have a specific MAC address that should be used for the DSA port. - Be compatible with the new "ethernet-ports" container name which has been introduced in the Linux kernel as commit 85e05d263ed2 ("net: dsa: of: Allow ethernet-ports as encapsulating node") in v5.9. v2: none drivers/net/Kconfig | 15 ++ include/dm/uclass-id.h | 1 + include/net.h | 6 + include/net/dsa.h | 165 ++++++++++++++ net/Makefile | 1 + net/dsa-uclass.c | 478 +++++++++++++++++++++++++++++++++++++++++ 6 files changed, 666 insertions(+) create mode 100644 include/net/dsa.h create mode 100644 net/dsa-uclass.c diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 971a57224821..0e84c22b5075 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -37,6 +37,21 @@ config DM_MDIO_MUX This is currently implemented in net/mdio-mux-uclass.c Look in include/miiphy.h for details. +config DM_DSA + bool "Enable Driver Model for DSA switches" + depends on DM_ETH && DM_MDIO + depends on PHY_FIXED + help + Enable driver model for DSA switches + + Adds UCLASS_DSA class supporting switches that follow the Distributed + Switch Architecture (DSA). These switches rely on the presence of a + management switch port connected to an Ethernet controller capable of + receiving frames from the switch. This host Ethernet controller is + called the "master" Ethernet interface in DSA terminology. + This is currently implemented in net/dsa-uclass.c, refer to + include/net/dsa.h for API details. + config MDIO_SANDBOX depends on DM_MDIO && SANDBOX default y diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index ae4425d7a57a..d75de368c5a8 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -46,6 +46,7 @@ enum uclass_id { UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ UCLASS_DSI_HOST, /* Display Serial Interface host */ UCLASS_DMA, /* Direct Memory Access */ + UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */ UCLASS_EFI, /* EFI managed devices */ UCLASS_ETH, /* Ethernet device */ UCLASS_ETH_PHY, /* Ethernet PHY device */ diff --git a/include/net.h b/include/net.h index 13da69b7c145..b95d6a6f60eb 100644 --- a/include/net.h +++ b/include/net.h @@ -499,7 +499,13 @@ struct icmp_hdr { * maximum packet size and multiple of 32 bytes = 1536 */ #define PKTSIZE 1522 +#ifndef CONFIG_DM_DSA #define PKTSIZE_ALIGN 1536 +#else +/* Maximum DSA tagging overhead (headroom and/or tailroom) */ +#define DSA_MAX_OVR 256 +#define PKTSIZE_ALIGN (1536 + DSA_MAX_OVR) +#endif /* * Maximum receive ring size; that is, the number of packets diff --git a/include/net/dsa.h b/include/net/dsa.h new file mode 100644 index 000000000000..0f31a908c9d1 --- /dev/null +++ b/include/net/dsa.h @@ -0,0 +1,165 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019-2021 NXP Semiconductors + */ + +#ifndef __DSA_H__ +#define __DSA_H__ + +#include +#include + +/** + * DSA stands for Distributed Switch Architecture and it is infrastructure + * intended to support drivers for Switches that rely on an intermediary + * Ethernet device for I/O. These switches may support cascading allowing + * them to be arranged as a tree. + * DSA is documented in detail in the Linux kernel documentation under + * Documentation/networking/dsa/dsa.txt + * The network layout of such a switch is shown below: + * + * |------| + * | eth0 | <--- master eth device (regular eth driver) + * |------| + * ^ | + * tag added by switch -->| | + * | | + * | |<-- tag added by DSA driver + * | v + * |--------------------------------------| + * | | CPU port | | <-- DSA (switch) device + * | ------------ | (DSA driver) + * | _________ _________ _________ | + * | | port0 | | port1 | ... | portn | | <-- ports as eth devices + * |-+-------+--+-------+-------+-------+-| ('dsa-port' eth driver) + * + * In U-Boot the intent is to allow access to front panel ports (shown at the + * bottom of the picture) through the master Ethernet dev (eth0 in the picture). + * Front panel ports are presented as regular Ethernet devices in U-Boot and + * they are expected to support the typical networking commands. + * In general DSA switches require the use of tags, extra headers added both by + * software on Tx and by the switch on Rx. These tags carry at a minimum port + * information and switch information for cascaded set-ups. + * In U-Boot these tags are inserted and parsed by the DSA switch driver, the + * class code helps with headroom/tailroom for the extra headers. + * + * TODO: + * - handle switch cascading, for now U-Boot only supports stand-alone switches. + * - Add support to probe DSA switches connected to a MDIO bus, this is needed + * to convert switch drivers that are now under drivers/net/phy. + */ + +#define DSA_PORT_NAME_LENGTH 16 + +/* Maximum number of ports each DSA device can have */ +#define DSA_MAX_PORTS 12 + +/** + * struct dsa_ops - DSA operations + * + * @port_enable: Initialize a switch port for I/O. + * @port_disable: Disable I/O for a port. + * @xmit: Insert the DSA tag for transmission. + * DSA drivers receive a copy of the packet with headroom and + * tailroom reserved and set to 0. 'packet' points to headroom + * and 'length' is updated to include both head and tailroom. + * @rcv: Process the DSA tag on reception and return the port index + * from the h/w provided tag. Return the index via 'portp'. + * 'packet' and 'length' describe the frame as received from + * master including any additional headers. + */ +struct dsa_ops { + int (*port_enable)(struct udevice *dev, int port, + struct phy_device *phy); + void (*port_disable)(struct udevice *dev, int port, + struct phy_device *phy); + int (*xmit)(struct udevice *dev, int port, void *packet, int length); + int (*rcv)(struct udevice *dev, int *portp, void *packet, int length); +}; + +#define dsa_get_ops(dev) ((struct dsa_ops *)(dev)->driver->ops) + +/** + * struct dsa_port_pdata - DSA port platform data + * + * @phy: PHY device associated with this port. + * The uclass code attempts to set this field for all ports except CPU + * port, based on DT information. It may be NULL. + * @index: Port index in the DSA switch, set by the uclass code. + * @name: Name of the port Eth device. If a label property is present in the + * port DT node, it is used as name. + */ +struct dsa_port_pdata { + struct phy_device *phy; + u32 index; + char name[DSA_PORT_NAME_LENGTH]; +}; + +/** + * struct dsa_pdata - Per-device platform data for DSA DM + * + * @num_ports: Number of ports the device has, must be <= DSA_MAX_PORTS. + * This number is extracted from the DT 'ports' node of this + * DSA device, and it counts the CPU port and all the other + * port subnodes including the disabled ones. + * @cpu_port: Index of the switch port linked to the master Ethernet. + * The uclass code sets this based on DT information. + * @master_node: OF node of the host Ethernet controller. + * @cpu_port_node: DT node of the switch's CPU port. + */ +struct dsa_pdata { + int num_ports; + u32 cpu_port; + ofnode master_node; + ofnode cpu_port_node; +}; + +/** + * dsa_set_tagging() - Configure the headroom and/or tailroom sizes + * + * The DSA class code allocates headroom and tailroom on Tx before + * calling the DSA driver's xmit function. + * All drivers must call this at probe time. + * + * @dev: DSA device pointer + * @headroom: Size, in bytes, of headroom needed for the DSA tag. + * @tailroom: Size, in bytes, of tailroom needed for the DSA tag. + * Total headroom and tailroom size should not exceed + * DSA_MAX_OVR. + * @return 0 if OK, -ve on error + */ +int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom); + +/* DSA helpers */ + +/** + * dsa_get_master() - Return a reference to the master Ethernet device + * + * Can be called at driver probe time or later. + * + * @dev: DSA device pointer + * @return Master Eth 'udevice' pointer if OK, NULL on error + */ +struct udevice *dsa_get_master(struct udevice *dev); + +/** + * dsa_port_get_pdata() - Helper that returns the platdata of an active + * (non-CPU) DSA port device. + * + * Can be called at driver probe time or later. + * + * @pdev: DSA port device pointer + * @return 'dsa_port_pdata' pointer if OK, NULL on error + */ +static inline struct dsa_port_pdata * + dsa_port_get_pdata(struct udevice *pdev) +{ + struct eth_pdata *eth = dev_get_plat(pdev); + + if (!eth) + return NULL; + + return eth->priv_pdata; +} + +#endif /* __DSA_H__ */ diff --git a/net/Makefile b/net/Makefile index 76527f704c47..fb3eba840fff 100644 --- a/net/Makefile +++ b/net/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_NET) += arp.o obj-$(CONFIG_CMD_BOOTP) += bootp.o obj-$(CONFIG_CMD_CDP) += cdp.o obj-$(CONFIG_CMD_DNS) += dns.o +obj-$(CONFIG_DM_DSA) += dsa-uclass.o ifdef CONFIG_DM_ETH obj-$(CONFIG_NET) += eth-uclass.o else diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c new file mode 100644 index 000000000000..2ce9ddb90d25 --- /dev/null +++ b/net/dsa-uclass.c @@ -0,0 +1,478 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 NXP + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DSA_PORT_CHILD_DRV_NAME "dsa-port" + +/* per-device internal state structure */ +struct dsa_priv { + struct phy_device *cpu_port_fixed_phy; + struct udevice *master_dev; + int num_ports; + u32 cpu_port; + int headroom; + int tailroom; +}; + +/* external API */ +int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom) +{ + struct dsa_priv *priv; + + if (!dev || !dev_get_uclass_priv(dev)) + return -ENODEV; + + if (headroom + tailroom > DSA_MAX_OVR) + return -EINVAL; + + priv = dev_get_uclass_priv(dev); + + if (headroom > 0) + priv->headroom = headroom; + if (tailroom > 0) + priv->tailroom = tailroom; + + return 0; +} + +/* returns the DSA master Ethernet device */ +struct udevice *dsa_get_master(struct udevice *dev) +{ + struct dsa_priv *priv = dev_get_uclass_priv(dev); + + if (!priv) + return NULL; + + return priv->master_dev; +} + +/* + * Start the desired port, the CPU port and the master Eth interface. + * TODO: if cascaded we may need to _start ports in other switches too + */ +static int dsa_port_start(struct udevice *pdev) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_priv *priv = dev_get_uclass_priv(dev); + struct udevice *master = dsa_get_master(dev); + struct dsa_ops *ops = dsa_get_ops(dev); + int err; + + if (!priv) + return -ENODEV; + + if (!master) { + dev_err(pdev, "DSA master Ethernet device not found!\n"); + return -EINVAL; + } + + if (ops->port_enable) { + struct dsa_port_pdata *port_pdata; + + port_pdata = dev_get_parent_plat(pdev); + err = ops->port_enable(dev, port_pdata->index, + port_pdata->phy); + if (err) + return err; + + err = ops->port_enable(dev, priv->cpu_port, + priv->cpu_port_fixed_phy); + if (err) + return err; + } + + return eth_get_ops(master)->start(master); +} + +/* Stop the desired port, the CPU port and the master Eth interface */ +static void dsa_port_stop(struct udevice *pdev) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_priv *priv = dev_get_uclass_priv(dev); + struct udevice *master = dsa_get_master(dev); + struct dsa_ops *ops = dsa_get_ops(dev); + + if (!priv) + return; + + if (ops->port_disable) { + struct dsa_port_pdata *port_pdata; + + port_pdata = dev_get_parent_plat(pdev); + ops->port_disable(dev, port_pdata->index, port_pdata->phy); + ops->port_disable(dev, priv->cpu_port, NULL); + } + + /* + * stop master only if it's active, don't probe it otherwise. + * Under normal usage it would be active because we're using it, but + * during tear-down it may have been removed ahead of us. + */ + if (master && device_active(master)) + eth_get_ops(master)->stop(master); +} + +/* + * Insert a DSA tag and call master Ethernet send on the resulting packet + * We copy the frame to a stack buffer where we have reserved headroom and + * tailroom space. Headroom and tailroom are set to 0. + */ +static int dsa_port_send(struct udevice *pdev, void *packet, int length) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_priv *priv = dev_get_uclass_priv(dev); + int head = priv->headroom, tail = priv->tailroom; + struct udevice *master = dsa_get_master(dev); + struct dsa_ops *ops = dsa_get_ops(dev); + uchar dsa_packet_tmp[PKTSIZE_ALIGN]; + struct dsa_port_pdata *port_pdata; + int err; + + if (!master) + return -EINVAL; + + if (length + head + tail > PKTSIZE_ALIGN) + return -EINVAL; + + memset(dsa_packet_tmp, 0, head); + memset(dsa_packet_tmp + head + length, 0, tail); + memcpy(dsa_packet_tmp + head, packet, length); + length += head + tail; + /* copy back to preserve original buffer alignment */ + memcpy(packet, dsa_packet_tmp, length); + + port_pdata = dev_get_parent_plat(pdev); + err = ops->xmit(dev, port_pdata->index, packet, length); + if (err) + return err; + + return eth_get_ops(master)->send(master, packet, length); +} + +/* Receive a frame from master Ethernet, process it and pass it on */ +static int dsa_port_recv(struct udevice *pdev, int flags, uchar **packetp) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_priv *priv = dev_get_uclass_priv(dev); + int head = priv->headroom, tail = priv->tailroom; + struct udevice *master = dsa_get_master(dev); + struct dsa_ops *ops = dsa_get_ops(dev); + struct dsa_port_pdata *port_pdata; + int length, port_index, err; + + if (!master) + return -EINVAL; + + length = eth_get_ops(master)->recv(master, flags, packetp); + if (length <= 0) + return length; + + /* + * If we receive frames from a different port or frames that DSA driver + * doesn't like we discard them here. + * In case of discard we return with no frame and expect to be called + * again instead of looping here, so upper layer can deal with timeouts. + */ + port_pdata = dev_get_parent_plat(pdev); + err = ops->rcv(dev, &port_index, *packetp, length); + if (err || port_index != port_pdata->index || (length <= head + tail)) { + if (eth_get_ops(master)->free_pkt) + eth_get_ops(master)->free_pkt(master, *packetp, length); + return -EAGAIN; + } + + /* + * We move the pointer over headroom here to avoid a copy. If free_pkt + * gets called we move the pointer back before calling master free_pkt. + */ + *packetp += head; + + return length - head - tail; +} + +static int dsa_port_free_pkt(struct udevice *pdev, uchar *packet, int length) +{ + struct udevice *dev = dev_get_parent(pdev); + struct udevice *master = dsa_get_master(dev); + struct dsa_priv *priv; + + if (!master) + return -EINVAL; + + priv = dev_get_uclass_priv(dev); + if (eth_get_ops(master)->free_pkt) { + /* return the original pointer and length to master Eth */ + packet -= priv->headroom; + length += priv->headroom - priv->tailroom; + + return eth_get_ops(master)->free_pkt(master, packet, length); + } + + return 0; +} + +static int dsa_port_of_to_pdata(struct udevice *pdev) +{ + struct dsa_port_pdata *port_pdata; + struct dsa_pdata *dsa_pdata; + struct eth_pdata *eth_pdata; + struct udevice *dev; + const char *label; + u32 index; + int err; + + if (!pdev) + return -ENODEV; + + err = ofnode_read_u32(dev_ofnode(pdev), "reg", &index); + if (err) + return err; + + dev = dev_get_parent(pdev); + dsa_pdata = dev_get_uclass_plat(dev); + + port_pdata = dev_get_parent_plat(pdev); + port_pdata->index = index; + + label = ofnode_read_string(dev_ofnode(pdev), "label"); + if (label) + strncpy(port_pdata->name, label, DSA_PORT_NAME_LENGTH); + + eth_pdata = dev_get_plat(pdev); + eth_pdata->priv_pdata = port_pdata; + + dev_dbg(pdev, "port %d node %s\n", port_pdata->index, + ofnode_get_name(dev_ofnode(pdev))); + + return 0; +} + +static const struct eth_ops dsa_port_ops = { + .start = dsa_port_start, + .send = dsa_port_send, + .recv = dsa_port_recv, + .stop = dsa_port_stop, + .free_pkt = dsa_port_free_pkt, +}; + +static int dsa_port_probe(struct udevice *pdev) +{ + struct udevice *dev = dev_get_parent(pdev); + struct eth_pdata *eth_pdata, *master_pdata; + unsigned char env_enetaddr[ARP_HLEN]; + struct dsa_port_pdata *port_pdata; + struct dsa_priv *dsa_priv; + struct udevice *master; + + port_pdata = dev_get_parent_plat(pdev); + dsa_priv = dev_get_uclass_priv(dev); + + port_pdata->phy = dm_eth_phy_connect(pdev); + if (!port_pdata->phy) + return -ENODEV; + + /* + * Inherit port's hwaddr from the DSA master, unless the port already + * has a unique MAC address specified in the environment. + */ + eth_env_get_enetaddr_by_index("eth", dev_seq(pdev), env_enetaddr); + if (!is_zero_ethaddr(env_enetaddr)) + return 0; + + master = dsa_get_master(dev); + if (!master) + return 0; + + master_pdata = dev_get_plat(master); + eth_pdata = dev_get_plat(pdev); + memcpy(eth_pdata->enetaddr, master_pdata->enetaddr, ARP_HLEN); + eth_env_set_enetaddr_by_index("eth", dev_seq(pdev), + master_pdata->enetaddr); + + return 0; +} + +static int dsa_port_remove(struct udevice *pdev) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_port_pdata *port_pdata; + struct dsa_priv *dsa_priv; + + port_pdata = dev_get_parent_plat(pdev); + dsa_priv = dev_get_uclass_priv(dev); + + port_pdata->phy = NULL; + + return 0; +} + +U_BOOT_DRIVER(dsa_port) = { + .name = DSA_PORT_CHILD_DRV_NAME, + .id = UCLASS_ETH, + .ops = &dsa_port_ops, + .probe = dsa_port_probe, + .remove = dsa_port_remove, + .of_to_plat = dsa_port_of_to_pdata, + .plat_auto = sizeof(struct eth_pdata), +}; + +/* + * This function mostly deals with pulling information out of the device tree + * into the pdata structure. + * It goes through the list of switch ports, registers an eth device for each + * front panel port and identifies the cpu port connected to master eth device. + * TODO: support cascaded switches + */ +static int dsa_post_bind(struct udevice *dev) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(dev); + ofnode node = dev_ofnode(dev), pnode; + int i, err, first_err = 0; + + if (!pdata || !ofnode_valid(node)) + return -ENODEV; + + pdata->master_node = ofnode_null(); + + node = ofnode_find_subnode(node, "ports"); + if (!ofnode_valid(node)) + node = ofnode_find_subnode(node, "ethernet-ports"); + if (!ofnode_valid(node)) { + dev_err(dev, "ports node is missing under DSA device!\n"); + return -EINVAL; + } + + pdata->num_ports = ofnode_get_child_count(node); + if (pdata->num_ports <= 0 || pdata->num_ports > DSA_MAX_PORTS) { + dev_err(dev, "invalid number of ports (%d)\n", + pdata->num_ports); + return -EINVAL; + } + + /* look for the CPU port */ + ofnode_for_each_subnode(pnode, node) { + u32 ethernet; + + if (ofnode_read_u32(pnode, "ethernet", ðernet)) + continue; + + pdata->master_node = ofnode_get_by_phandle(ethernet); + pdata->cpu_port_node = pnode; + break; + } + + if (!ofnode_valid(pdata->master_node)) { + dev_err(dev, "master eth node missing!\n"); + return -EINVAL; + } + + if (ofnode_read_u32(pnode, "reg", &pdata->cpu_port)) { + dev_err(dev, "CPU port node not valid!\n"); + return -EINVAL; + } + + dev_dbg(dev, "master node %s on port %d\n", + ofnode_get_name(pdata->master_node), pdata->cpu_port); + + for (i = 0; i < pdata->num_ports; i++) { + char name[DSA_PORT_NAME_LENGTH]; + struct udevice *pdev; + + /* + * If this is the CPU port don't register it as an ETH device, + * we skip it on purpose since I/O to/from it from the CPU + * isn't useful. + */ + if (i == pdata->cpu_port) + continue; + + /* + * Set up default port names. If present, DT port labels + * will override the default port names. + */ + snprintf(name, DSA_PORT_NAME_LENGTH, "%s@%d", dev->name, i); + + ofnode_for_each_subnode(pnode, node) { + u32 reg; + + if (ofnode_read_u32(pnode, "reg", ®)) + continue; + + if (reg == i) + break; + } + + /* + * skip registration if port id not found or if the port + * is explicitly disabled in DT + */ + if (!ofnode_valid(pnode) || !ofnode_is_available(pnode)) + continue; + + err = device_bind_driver_to_node(dev, DSA_PORT_CHILD_DRV_NAME, + name, pnode, &pdev); + if (pdev) { + struct dsa_port_pdata *port_pdata; + + port_pdata = dev_get_parent_plat(pdev); + strncpy(port_pdata->name, name, DSA_PORT_NAME_LENGTH); + pdev->name = port_pdata->name; + } + + /* try to bind all ports but keep 1st error */ + if (err && !first_err) + first_err = err; + } + + if (first_err) + return first_err; + + dev_dbg(dev, "DSA ports successfully bound\n"); + + return 0; +} + +/** + * Initialize the uclass per device internal state structure (priv). + * TODO: pick up references to other switch devices here, if we're cascaded. + */ +static int dsa_pre_probe(struct udevice *dev) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(dev); + struct dsa_priv *priv = dev_get_uclass_priv(dev); + + if (!pdata || !priv) + return -ENODEV; + + priv->num_ports = pdata->num_ports; + priv->cpu_port = pdata->cpu_port; + priv->cpu_port_fixed_phy = fixed_phy_create(pdata->cpu_port_node); + if (!priv->cpu_port_fixed_phy) { + dev_err(dev, "Failed to register fixed-link for CPU port\n"); + return -ENODEV; + } + + uclass_find_device_by_ofnode(UCLASS_ETH, pdata->master_node, + &priv->master_dev); + return 0; +} + +UCLASS_DRIVER(dsa) = { + .id = UCLASS_DSA, + .name = "dsa", + .post_bind = dsa_post_bind, + .pre_probe = dsa_pre_probe, + .per_device_auto = sizeof(struct dsa_priv), + .per_device_plat_auto = sizeof(struct dsa_pdata), + .per_child_plat_auto = sizeof(struct dsa_port_pdata), + .flags = DM_UC_FLAG_SEQ_ALIAS, +}; From patchwork Tue Feb 16 21:19:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441120 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=VJQnqMbR; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDS76r2bz9s1l for ; Wed, 17 Feb 2021 08:21:43 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 026B282817; Tue, 16 Feb 2021 22:20:41 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="VJQnqMbR"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 57B4F827FA; Tue, 16 Feb 2021 22:20:18 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id BDC08827E4 for ; Tue, 16 Feb 2021 22:20:01 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ej1-x62c.google.com with SMTP id f14so18864149ejc.8 for ; Tue, 16 Feb 2021 13:20:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=18P5xJOgpekButrkPvBdapEQ6xUknSQiawDvYPDFHAI=; b=VJQnqMbR45DyFEJxQ1/Jvb/BlRMUWlTi4PFTkDuOwCHfVlyjAlhZsTEIOvt59a+17a /KiN2zuNUEATLv1pr+EG4nMv9EK+kLW4DUXbDGxHJeiLSTcO3vg6QBHW/jwWNTGTqI6N 3dllEDqn+zoRsChDxKnLl5X2XtMqJyOiOHR90J2PxDxV9+q1JyCYsywanqwQ/uRjzkxe w6nfvCUvj9XXIKmNMaLOgYfoCRuI0csgyrwDsrt32HiBxQnXz6c6ZeIBZeVfdxi0cEK8 oTLUjUiIh07jE7W3qPCFQlTfzpcvbhuCOn4swBQbK9VUK6sepykLfe//CYzGFPH8Kd9X p4nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=18P5xJOgpekButrkPvBdapEQ6xUknSQiawDvYPDFHAI=; b=r2raE6IZX3eLI5xnXT1cA2OoIW5OCxujbiZG/RddrKEMIRhZNZz3jHayysjdaOPlrF GfBslpbSThYg235NHwoGZjG/mpXXjLDGmDnUl695IBgmZC3NbmsIm6BAqqD/JyhC9eZv IiTasi9KdHOUZIDfpylFl+3J9LJEJMagMviZaZCml9N4Yu/KREoe+mz5HHnQ9k+C1tmy /xd9jXbW+xz/Hi8hmuqzzXYbM6kkEdH2YHjcLB2ufhpYgOveTkCXB9ifzKtlwvvLCRi5 sTi7Ee6R0JhXh111vrlNvFUQ8iH7h6m2AdfNKuRGbDjlN5KQzZgZsp+jet3MLjnL7kBp gxxg== X-Gm-Message-State: AOAM533s3wVb9dYicRncDZBK42m4ZfKGQfdhuR4ZKk+fsyK8lPpKRK7V nhh+OzEZ51e2Rtz15JXT7NE= X-Google-Smtp-Source: ABdhPJzMD/nKuvAgn4cXTCs7wEZB82+BcQ45rw7DAjMfh0vtMxfQ00Ww32XCrRnRdYl+wavTprGBSQ== X-Received: by 2002:a17:906:3a13:: with SMTP id z19mr22991920eje.317.1613510401184; Tue, 16 Feb 2021 13:20:01 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.19.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:20:00 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 6/9] sandbox: add a DSA sandbox driver and unit test Date: Tue, 16 Feb 2021 23:19:33 +0200 Message-Id: <20210216211936.3291988-7-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Manoil The DSA sandbox driver is used for unit testing the DSA class code. It implements a simple 2 port switch plus 1 CPU port, and uses a very simple tag to identify the ports. The DSA sandbox device is connected via CPU port to a regular Ethernet sandbox device, called 'dsa-test-eth, managed by the existing eth sandbox driver. The 'dsa-test-eth' is not intended for testing the eth class code however, but it is used to emulate traffic through the 'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa sandbox driver registers a tx handler for the 'dsa-test-eth' device. The switch ports, labeled as 'lan0' and 'lan1', are also registered as eth devices by the dsa class code this time. So pinging through these switch ports is as easy as: => setenv ethact lan0 => ping 1.2.3.5 Unit tests for the dsa class code were also added. The 'dsa_probe' test exercises most API functions from dsa.h. The 'dsa' unit test simply exercises ARP/ICMP traffic through the two switch ports, including tag injection and extraction, with the help of the dsa sandbox driver. I took care to minimize the impact on the existing eth unit tests, though some adjustments needed to be made with the addition of extra eth interfaces used by the dsa unit tests. The additional eth interfaces also require MAC addresses, these have been added to the sandbox default environment. Signed-off-by: Alex Marginean Signed-off-by: Claudiu Manoil Reviewed-by: Simon Glass Signed-off-by: Vladimir Oltean --- v5: make SANDBOX imply PHY_FIXED, a DSA dependency. v4: none. v3: - deleted the unit tests associated with the infrastructure for dsa_foreach_port, since that function no longer exists. - added fixed-link and phy-mode to lan0 from the sandbox device tree. We don't support ports that don't have a PHY and are not fixed-link either. v2: none arch/Kconfig | 2 + arch/sandbox/dts/test.dts | 48 ++++++++++ drivers/net/Kconfig | 9 ++ drivers/net/Makefile | 1 + drivers/net/dsa_sandbox.c | 179 ++++++++++++++++++++++++++++++++++++++ include/configs/sandbox.h | 2 + test/dm/Makefile | 1 + test/dm/dsa.c | 82 +++++++++++++++++ test/dm/eth.c | 10 +-- 9 files changed, 329 insertions(+), 5 deletions(-) create mode 100644 drivers/net/dsa_sandbox.c create mode 100644 test/dm/dsa.c diff --git a/arch/Kconfig b/arch/Kconfig index 6c8167826cf8..f114a025fa5b 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -161,6 +161,8 @@ config SANDBOX imply CMD_CLONE imply SILENT_CONSOLE imply BOOTARGS_SUBST + imply PHY_FIXED + imply DM_DSA config SH bool "SuperH architecture" diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index e95f4631bf2f..d4ee6ddbbe4c 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -14,7 +14,9 @@ aliases { console = &uart0; eth0 = "/eth@10002000"; + eth2 = &swp_0; eth3 = ð_3; + eth4 = &dsa_eth0; eth5 = ð_5; gpio1 = &gpio_a; gpio2 = &gpio_b; @@ -432,6 +434,52 @@ fake-host-hwaddr = [00 00 66 44 22 22]; }; + dsa_eth0: dsa-test-eth { + compatible = "sandbox,eth"; + reg = <0x10006000 0x1000>; + fake-host-hwaddr = [00 00 66 44 22 66]; + }; + + dsa-test { + compatible = "sandbox,dsa"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + swp_0: port@0 { + reg = <0>; + label = "lan0"; + phy-mode = "rgmii-rxid"; + + fixed-link { + speed = <100>; + full-duplex; + }; + }; + + swp_1: port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "rgmii-txid"; + + fixed-link { + speed = <100>; + full-duplex; + }; + }; + + port@2 { + reg = <2>; + ethernet = <&dsa_eth0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + firmware { sandbox_firmware: sandbox-firmware { compatible = "sandbox,firmware"; diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 0e84c22b5075..f96ee642494a 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -78,6 +78,15 @@ config DM_ETH_PHY help Enable driver model for Ethernet Generic PHY . +config DSA_SANDBOX + depends on DM_DSA && SANDBOX + default y + bool "Sandbox: Mocked DSA driver" + help + This driver implements a dummy DSA switch connected to a dummy sandbox + Ethernet device used as DSA master, to test DSA class code, including + exported DSA API and datapath processing of Ethernet traffic. + menuconfig NETDEVICES bool "Network device support" depends on NET diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a19511aaa7ba..108138fdb972 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o obj-$(CONFIG_ETH_DESIGNWARE_S700) += dwmac_s700.o obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o obj-$(CONFIG_DNET) += dnet.o +obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o obj-$(CONFIG_E1000) += e1000.o obj-$(CONFIG_E1000_SPI) += e1000_spi.o diff --git a/drivers/net/dsa_sandbox.c b/drivers/net/dsa_sandbox.c new file mode 100644 index 000000000000..4b62670e5d17 --- /dev/null +++ b/drivers/net/dsa_sandbox.c @@ -0,0 +1,179 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 NXP Semiconductors + */ + +#include +#include +#include + +#define DSA_SANDBOX_MAGIC 0x00415344 +#define DSA_SANDBOX_TAG_LEN sizeof(struct dsa_sandbox_tag) + +struct dsa_sandbox_priv { + struct eth_sandbox_priv *master_priv; + int port_en_mask; +}; + +struct dsa_sandbox_tag { + u32 magic; + u32 port; +}; + +static bool sb_dsa_port_enabled(struct udevice *dev, int port) +{ + struct dsa_sandbox_priv *priv = dev_get_priv(dev); + + return priv->port_en_mask & BIT(port); +} + +static bool sb_dsa_master_enabled(struct udevice *dev) +{ + struct dsa_sandbox_priv *priv = dev_get_priv(dev); + + return !priv->master_priv->disabled; +} + +static int dsa_sandbox_port_enable(struct udevice *dev, int port, + struct phy_device *phy) +{ + struct dsa_sandbox_priv *priv = dev_get_priv(dev); + + if (!sb_dsa_master_enabled(dev)) + return -EFAULT; + + priv->port_en_mask |= BIT(port); + + return 0; +} + +static void dsa_sandbox_port_disable(struct udevice *dev, int port, + struct phy_device *phy) +{ + struct dsa_sandbox_priv *priv = dev_get_priv(dev); + + priv->port_en_mask &= ~BIT(port); +} + +static int dsa_sandbox_xmit(struct udevice *dev, int port, void *packet, + int length) +{ + struct dsa_sandbox_tag *tag = packet; + + if (!sb_dsa_master_enabled(dev)) + return -EFAULT; + + if (!sb_dsa_port_enabled(dev, port)) + return -EFAULT; + + tag->magic = DSA_SANDBOX_MAGIC; + tag->port = port; + + return 0; +} + +static int dsa_sandbox_rcv(struct udevice *dev, int *port, void *packet, + int length) +{ + struct dsa_sandbox_tag *tag = packet; + + if (!sb_dsa_master_enabled(dev)) + return -EFAULT; + + if (tag->magic != DSA_SANDBOX_MAGIC) + return -EFAULT; + + *port = tag->port; + if (!sb_dsa_port_enabled(dev, tag->port)) + return -EFAULT; + + return 0; +} + +static const struct dsa_ops dsa_sandbox_ops = { + .port_enable = dsa_sandbox_port_enable, + .port_disable = dsa_sandbox_port_disable, + .xmit = dsa_sandbox_xmit, + .rcv = dsa_sandbox_rcv, +}; + +static int sb_dsa_handler(struct udevice *dev, void *packet, + unsigned int len) +{ + struct eth_sandbox_priv *master_priv; + struct dsa_sandbox_tag *tag = packet; + struct udevice *dsa_dev; + u32 port_index; + void *rx_buf; + int i; + + /* this emulates the switch hw and the network side */ + if (tag->magic != DSA_SANDBOX_MAGIC) + return -EFAULT; + + port_index = tag->port; + master_priv = dev_get_priv(dev); + dsa_dev = master_priv->priv; + if (!sb_dsa_port_enabled(dsa_dev, port_index)) + return -EFAULT; + + packet += DSA_SANDBOX_TAG_LEN; + len -= DSA_SANDBOX_TAG_LEN; + + if (!sandbox_eth_arp_req_to_reply(dev, packet, len)) + goto dsa_tagging; + if (!sandbox_eth_ping_req_to_reply(dev, packet, len)) + goto dsa_tagging; + + return 0; + +dsa_tagging: + master_priv->recv_packets--; + i = master_priv->recv_packets; + rx_buf = master_priv->recv_packet_buffer[i]; + len = master_priv->recv_packet_length[i]; + memmove(rx_buf + DSA_SANDBOX_TAG_LEN, rx_buf, len); + + tag = rx_buf; + tag->magic = DSA_SANDBOX_MAGIC; + tag->port = port_index; + len += DSA_SANDBOX_TAG_LEN; + master_priv->recv_packet_length[i] = len; + master_priv->recv_packets++; + + return 0; +} + +static int dsa_sandbox_probe(struct udevice *dev) +{ + struct dsa_sandbox_priv *priv = dev_get_priv(dev); + struct udevice *master = dsa_get_master(dev); + struct eth_sandbox_priv *master_priv; + + if (!master) + return -ENODEV; + + dsa_set_tagging(dev, DSA_SANDBOX_TAG_LEN, 0); + + master_priv = dev_get_priv(master); + master_priv->priv = dev; + master_priv->tx_handler = sb_dsa_handler; + + priv->master_priv = master_priv; + + return 0; +} + +static const struct udevice_id dsa_sandbox_ids[] = { + { .compatible = "sandbox,dsa" }, + { } +}; + +U_BOOT_DRIVER(dsa_sandbox) = { + .name = "dsa_sandbox", + .id = UCLASS_DSA, + .of_match = dsa_sandbox_ids, + .probe = dsa_sandbox_probe, + .ops = &dsa_sandbox_ops, + .priv_auto = sizeof(struct dsa_sandbox_priv), +}; diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index e0708fe57395..91f636b2c102 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -93,7 +93,9 @@ #endif #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ + "eth2addr=00:00:11:22:33:48\0" \ "eth3addr=00:00:11:22:33:45\0" \ + "eth4addr=00:00:11:22:33:48\0" \ "eth5addr=00:00:11:22:33:46\0" \ "eth6addr=00:00:11:22:33:47\0" \ "ipaddr=1.2.3.4\0" diff --git a/test/dm/Makefile b/test/dm/Makefile index e70e50f40243..42dc2d56a764 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_CLK) += clk.o clk_ccf.o obj-$(CONFIG_CROS_EC) += cros_ec.o obj-$(CONFIG_DEVRES) += devres.o obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi_host.o +obj-$(CONFIG_DM_DSA) += dsa.o obj-$(CONFIG_DM_ETH) += eth.o obj-$(CONFIG_FIRMWARE) += firmware.o obj-$(CONFIG_DM_GPIO) += gpio.o diff --git a/test/dm/dsa.c b/test/dm/dsa.c new file mode 100644 index 000000000000..18c1776460da --- /dev/null +++ b/test/dm/dsa.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020-2021 NXP Semiconductors + */ + +#include +#include +#include +#include +#include +#include + +/* This test exercises the major dsa.h API functions, after making sure + * that the DSA ports and the master Eth are correctly probed. + */ +static int dm_test_dsa_probe(struct unit_test_state *uts) +{ + struct udevice *dev_dsa, *dev_port, *dev_master; + struct dsa_pdata *dsa_pdata; + enum uclass_id id; + + id = uclass_get_by_name("dsa"); + ut_assert(id == UCLASS_DSA); + + ut_assertok(uclass_find_device_by_name(UCLASS_DSA, "dsa-test", + &dev_dsa)); + ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "dsa-test-eth", + &dev_master)); + ut_assertok(device_probe(dev_master)); + + ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "dsa-test@0", + &dev_port)); + ut_assertok(device_probe(dev_port)); + + ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "dsa-test@1", + &dev_port)); + ut_assertok(device_probe(dev_port)); + + /* exercise DSA API */ + dsa_pdata = dev_get_uclass_plat(dev_dsa); + ut_assertnonnull(dsa_pdata); + /* includes CPU port */ + ut_assert(dsa_pdata->num_ports == 3); + + ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "lan0", + &dev_port)); + ut_assertok(device_probe(dev_port)); + + ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "lan1", + &dev_port)); + ut_assertok(device_probe(dev_port)); + + dev_master = dsa_get_master(dev_dsa); + ut_assertnonnull(dev_master); + ut_asserteq_str("dsa-test-eth", dev_master->name); + + return 0; +} + +DM_TEST(dm_test_dsa_probe, UT_TESTF_SCAN_FDT); + +/* This test sends ping requests with the local address through each DSA port + * via the sandbox DSA master Eth. + */ +static int dm_test_dsa(struct unit_test_state *uts) +{ + net_ping_ip = string_to_ip("1.2.3.5"); + + env_set("ethact", "eth2"); + ut_assertok(net_loop(PING)); + + env_set("ethact", "lan0"); + ut_assertok(net_loop(PING)); + env_set("ethact", "lan1"); + ut_assertok(net_loop(PING)); + + env_set("ethact", ""); + + return 0; +} + +DM_TEST(dm_test_dsa, UT_TESTF_SCAN_FDT); diff --git a/test/dm/eth.c b/test/dm/eth.c index fa8a69da7013..e4ee69561064 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -53,8 +53,8 @@ static int dm_test_eth_alias(struct unit_test_state *uts) ut_assertok(net_loop(PING)); ut_asserteq_str("eth@10004000", env_get("ethact")); - /* Expected to fail since eth2 is not defined in the device tree */ - env_set("ethact", "eth2"); + /* Expected to fail since eth1 is not defined in the device tree */ + env_set("ethact", "eth1"); ut_assertok(net_loop(PING)); ut_asserteq_str("eth@10002000", env_get("ethact")); @@ -227,7 +227,7 @@ static int _dm_test_net_retry(struct unit_test_state *uts) * the active device should be eth0 */ sandbox_eth_disable_response(1, true); - env_set("ethact", "eth@10004000"); + env_set("ethact", "lan1"); env_set("netretry", "yes"); sandbox_eth_skip_timeout(); ut_assertok(net_loop(PING)); @@ -237,11 +237,11 @@ static int _dm_test_net_retry(struct unit_test_state *uts) * eth1 is disabled and netretry is no, so the ping should fail and the * active device should be eth1 */ - env_set("ethact", "eth@10004000"); + env_set("ethact", "lan1"); env_set("netretry", "no"); sandbox_eth_skip_timeout(); ut_asserteq(-ENONET, net_loop(PING)); - ut_asserteq_str("eth@10004000", env_get("ethact")); + ut_asserteq_str("lan1", env_get("ethact")); return 0; } From patchwork Tue Feb 16 21:19:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441119 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=eebMBCPS; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDRv5j0hz9s1l for ; Wed, 17 Feb 2021 08:21:31 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8D31D82828; Tue, 16 Feb 2021 22:20:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="eebMBCPS"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7FC86827FA; Tue, 16 Feb 2021 22:20:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F0DB3827EA for ; Tue, 16 Feb 2021 22:20:02 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ej1-x62c.google.com with SMTP id n13so12274423ejx.12 for ; Tue, 16 Feb 2021 13:20:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=t6+zwjoBJmG9JIGWbh9SWZN9UymYJXBVBXN4Gn38Uxs=; b=eebMBCPSelxr7HffEQGBuH03Gs9VPd1GnBBuByDssJdcnHUmCIwOZEom4Wg4be+cUu uWWYZXWtvVoEICqWlv1/7tN05etWJBGtIzUzb7DQ7oKYVphAbZFciP3bZttLPvgCRvZl TbbO3l//lea5CSO1H7DgNGscASnef2O/C+IpiJZi1ChLzkU0zWlaTcU8KlMF4hw1rFFA R1K/d7brfWmZ4VVVBsjgNTXWaQezhyj8nEUT8JziTbIkGAYu2taskSvSBsx72/mLEHb5 u1zUaMTK2E2oXyt/9AaUzvZVZzCyJ6YdQUBxlPSUA37JaJZy9NE1pYP7hVzr0LtusAU2 PmHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=t6+zwjoBJmG9JIGWbh9SWZN9UymYJXBVBXN4Gn38Uxs=; b=UHLrNy+5h33uEDgWwdmSe5HADZgzqoe7Sg1qogUVvpg421ANhIQ5T0fl3zp/uAyckH afodsopaZWdgc8mSG6frA+5Nyr2KEKqVcu7p1UNbVZpMJfBIptFVQBBLg7C4M3Ukcopf dXC9DLuS/DakHc7kM6zT5lnhjgamHc6sE0B4FiqPqkb+37hxxpVyOCEbpJp0QAsQn/XV XDc33M4JRzDx+e5/il8t2opgfsd3KdM5MfDDi6Ri1Sp6sTQztZ0/wdCvZEiJPl+RxmUt vDQcfbx211cZb6CKRK7NN3zRtqbTRFxWylP+4itymMEOnkPFkSTxZNwMSM3eFPTjGWTk kXVA== X-Gm-Message-State: AOAM531hJPnOmRHXgT5kc9IR5cphmSoA/whAwEB8azYE4oWNGlxbLOE2 jy5hH9jzd2VMYEzFV06wYVU= X-Google-Smtp-Source: ABdhPJz0IMmy6NhkeQu79IiCmInzVQhBv+bPdPta/RPHGE2igX4wYLfEPlfDyOxbO+2OwZwmuN07ww== X-Received: by 2002:a17:906:2652:: with SMTP id i18mr2257952ejc.213.1613510402382; Tue, 16 Feb 2021 13:20:02 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.20.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:20:01 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 7/9] drivers: net: add Felix DSA switch driver Date: Tue, 16 Feb 2021 23:19:34 +0200 Message-Id: <20210216211936.3291988-8-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Alex Marginean This driver is used for the Ethernet switch integrated into NXP LS1028A. Felix on LS1028A has 4 front panel ports and two internal ports, I/O to/from the switch is done through an ENETC Ethernet interface. The 4 front panel ports are available as Ethernet interfaces and can be used with the typical network commands like tftp. Signed-off-by: Alex Marginean Signed-off-by: Claudiu Manoil Signed-off-by: Vladimir Oltean --- v5: none v4: none v3: dsa_foreach_port() does not work when called from the probe function of the DSA udevice, because the eth port udevices are _not_ yet probed at that point. To fix this, we are now initializing all ports from the .port_enable() callback of each eth udevice. v2: none drivers/net/fsl_enetc.h | 5 + drivers/net/mscc_eswitch/Kconfig | 8 + drivers/net/mscc_eswitch/Makefile | 1 + drivers/net/mscc_eswitch/felix_switch.c | 414 ++++++++++++++++++++++++ 4 files changed, 428 insertions(+) create mode 100644 drivers/net/mscc_eswitch/felix_switch.c diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h index 37e7e858435b..110c1d78fbc6 100644 --- a/drivers/net/fsl_enetc.h +++ b/drivers/net/fsl_enetc.h @@ -201,6 +201,11 @@ struct enetc_priv { /* PCS replicator block for USXGMII */ #define ENETC_PCS_DEVAD_REPL 0x1f +#define ENETC_PCS_REPL_LINK_TIMER_1 0x12 +#define ENETC_PCS_REPL_LINK_TIMER_1_DEF 0x0003 +#define ENETC_PCS_REPL_LINK_TIMER_2 0x13 +#define ENETC_PCS_REPL_LINK_TIMER_2_DEF 0x06a0 + /* ENETC external MDIO registers */ #define ENETC_MDIO_BASE 0x1c00 #define ENETC_MDIO_CFG 0x00 diff --git a/drivers/net/mscc_eswitch/Kconfig b/drivers/net/mscc_eswitch/Kconfig index 80dd22f98b7f..ccf7822dbe7a 100644 --- a/drivers/net/mscc_eswitch/Kconfig +++ b/drivers/net/mscc_eswitch/Kconfig @@ -36,3 +36,11 @@ config MSCC_SERVAL_SWITCH select PHYLIB help This driver supports the Serval network switch device. + +config MSCC_FELIX_SWITCH + bool "Felix switch driver" + depends on DM_DSA && DM_PCI + select FSL_ENETC + help + This driver supports the Ethernet switch integrated in the + NXP LS1028A SoC. diff --git a/drivers/net/mscc_eswitch/Makefile b/drivers/net/mscc_eswitch/Makefile index d583fe9fc4bb..22342ed11417 100644 --- a/drivers/net/mscc_eswitch/Makefile +++ b/drivers/net/mscc_eswitch/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o mscc_mac_table.o m obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o mscc_miim.o obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o mscc_miim.o obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o mscc_mac_table.o mscc_miim.o +obj-$(CONFIG_MSCC_FELIX_SWITCH) += felix_switch.o diff --git a/drivers/net/mscc_eswitch/felix_switch.c b/drivers/net/mscc_eswitch/felix_switch.c new file mode 100644 index 000000000000..f20e84e0f10c --- /dev/null +++ b/drivers/net/mscc_eswitch/felix_switch.c @@ -0,0 +1,414 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Felix (VSC9959) Ethernet switch driver + * Copyright 2018-2021 NXP Semiconductors + */ + +/* + * This driver is used for the Ethernet switch integrated into NXP LS1028A. + * Felix switch is derived from Microsemi Ocelot but there are several NXP + * adaptations that makes the two U-Boot drivers largely incompatible. + * + * Felix on LS1028A has 4 front panel ports and two internal ports, connected + * to ENETC interfaces. We're using one of the ENETC interfaces to push traffic + * into the switch. Injection/extraction headers are used to identify + * egress/ingress ports in the switch for Tx/Rx. + */ + +#include +#include +#include +#include +#include +#include + +/* defines especially around PCS are reused from enetc */ +#include "../fsl_enetc.h" + +#define PCI_DEVICE_ID_FELIX_ETHSW 0xEEF0 + +/* Felix has in fact 6 ports, but we don't use the last internal one */ +#define FELIX_PORT_COUNT 5 +/* Front panel port mask */ +#define FELIX_FP_PORT_MASK 0xf + +/* Register map for BAR4 */ +#define FELIX_SYS 0x010000 +#define FELIX_ES0 0x040000 +#define FELIX_IS1 0x050000 +#define FELIX_IS2 0x060000 +#define FELIX_GMII(port) (0x100000 + (port) * 0x10000) +#define FELIX_QSYS 0x200000 + +#define FELIX_SYS_SYSTEM (FELIX_SYS + 0x00000E00) +#define FELIX_SYS_SYSTEM_EN BIT(0) +#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x00000F24) +#define FELIX_SYS_RAM_CTRL_INIT BIT(1) +#define FELIX_SYS_SYSTEM_PORT_MODE(a) (FELIX_SYS_SYSTEM + 0xC + (a) * 4) +#define FELIX_SYS_SYSTEM_PORT_MODE_CPU 0x0000001e + +#define FELIX_ES0_TCAM_CTRL (FELIX_ES0 + 0x000003C0) +#define FELIX_ES0_TCAM_CTRL_EN BIT(0) +#define FELIX_IS1_TCAM_CTRL (FELIX_IS1 + 0x000003C0) +#define FELIX_IS1_TCAM_CTRL_EN BIT(0) +#define FELIX_IS2_TCAM_CTRL (FELIX_IS2 + 0x000003C0) +#define FELIX_IS2_TCAM_CTRL_EN BIT(0) + +#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x00000000) +#define FELIX_GMII_CLOCK_CFG_LINK_1G 1 +#define FELIX_GMII_CLOCK_CFG_LINK_100M 2 +#define FELIX_GMII_CLOCK_CFG_LINK_10M 3 +#define FELIX_GMII_MAC_ENA_CFG(port) (FELIX_GMII(port) + 0x0000001C) +#define FELIX_GMII_MAX_ENA_CFG_TX BIT(0) +#define FELIX_GMII_MAX_ENA_CFG_RX BIT(4) +#define FELIX_GMII_MAC_IFG_CFG(port) (FELIX_GMII(port) + 0x0000001C + 0x14) +#define FELIX_GMII_MAC_IFG_CFG_DEF 0x515 + +#define FELIX_QSYS_SYSTEM (FELIX_QSYS + 0x0000F460) +#define FELIX_QSYS_SYSTEM_SW_PORT_MODE(a) \ + (FELIX_QSYS_SYSTEM + 0x20 + (a) * 4) +#define FELIX_QSYS_SYSTEM_SW_PORT_ENA BIT(14) +#define FELIX_QSYS_SYSTEM_SW_PORT_LOSSY BIT(9) +#define FELIX_QSYS_SYSTEM_SW_PORT_SCH(a) (((a) & 0x3800) << 11) +#define FELIX_QSYS_SYSTEM_EXT_CPU_CFG (FELIX_QSYS_SYSTEM + 0x80) +#define FELIX_QSYS_SYSTEM_EXT_CPU_PORT(a) (((a) & 0xf) << 8 | 0xff) + +/* internal MDIO in BAR0 */ +#define FELIX_PM_IMDIO_BASE 0x8030 + +/* Serdes block on LS1028A */ +#define FELIX_SERDES_BASE 0x1ea0000L +#define FELIX_SERDES_LNATECR0(lane) (FELIX_SERDES_BASE + 0x818 + \ + (lane) * 0x40) +#define FELIX_SERDES_LNATECR0_ADPT_EQ 0x00003000 +#define FELIX_SERDES_SGMIICR1(lane) (FELIX_SERDES_BASE + 0x1804 + \ + (lane) * 0x10) +#define FELIX_SERDES_SGMIICR1_SGPCS BIT(11) +#define FELIX_SERDES_SGMIICR1_MDEV(a) (((a) & 0x1f) << 27) + +#define FELIX_PCS_CTRL 0 +#define FELIX_PCS_CTRL_RST BIT(15) + +/* + * The long prefix format used here contains two dummy MAC addresses, a magic + * value in place of a VLAN tag followed by the extraction/injection header and + * the original L2 frame. Out of all this we only use the port ID. + */ +#define FELIX_DSA_TAG_LEN sizeof(struct felix_dsa_tag) +#define FELIX_DSA_TAG_MAGIC 0x0a008088 +#define FELIX_DSA_TAG_INJ_PORT 7 +#define FELIX_DSA_TAG_INJ_PORT_SET(a) (0x1 << ((a) & FELIX_FP_PORT_MASK)) +#define FELIX_DSA_TAG_EXT_PORT 10 +#define FELIX_DSA_TAG_EXT_PORT_GET(a) ((a) >> 3) + +struct felix_dsa_tag { + uchar d_mac[6]; + uchar s_mac[6]; + u32 magic; + uchar meta[16]; +}; + +struct felix_priv { + void *regs_base; + void *imdio_base; + struct mii_dev imdio; +}; + +/* MDIO wrappers, we're using these to drive internal MDIO to get to serdes */ +static int felix_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) +{ + struct enetc_mdio_priv priv; + + priv.regs_base = bus->priv; + return enetc_mdio_read_priv(&priv, addr, devad, reg); +} + +static int felix_mdio_write(struct mii_dev *bus, int addr, int devad, int reg, + u16 val) +{ + struct enetc_mdio_priv priv; + + priv.regs_base = bus->priv; + return enetc_mdio_write_priv(&priv, addr, devad, reg, val); +} + +/* set up serdes for SGMII */ +static void felix_init_sgmii(struct mii_dev *imdio, int pidx, bool an) +{ + u16 reg; + + /* set up PCS lane address */ + out_le32(FELIX_SERDES_SGMIICR1(pidx), FELIX_SERDES_SGMIICR1_SGPCS | + FELIX_SERDES_SGMIICR1_MDEV(pidx)); + + /* + * Set to SGMII mode, for 1Gbps enable AN, for 2.5Gbps set fixed speed. + * Although fixed speed is 1Gbps, we could be running at 2.5Gbps based + * on PLL configuration. Setting 1G for 2.5G here is counter intuitive + * but intentional. + */ + reg = ENETC_PCS_IF_MODE_SGMII; + reg |= an ? ENETC_PCS_IF_MODE_SGMII_AN : ENETC_PCS_IF_MODE_SPEED_1G; + felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE, + ENETC_PCS_IF_MODE, reg); + + /* Dev ability - SGMII */ + felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE, + ENETC_PCS_DEV_ABILITY, ENETC_PCS_DEV_ABILITY_SGMII); + + /* Adjust link timer for SGMII */ + felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE, + ENETC_PCS_LINK_TIMER1, ENETC_PCS_LINK_TIMER1_VAL); + felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE, + ENETC_PCS_LINK_TIMER2, ENETC_PCS_LINK_TIMER2_VAL); + + reg = ENETC_PCS_CR_DEF_VAL; + reg |= an ? ENETC_PCS_CR_RESET_AN : ENETC_PCS_CR_RST; + /* restart PCS AN */ + felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE, + ENETC_PCS_CR, reg); +} + +/* set up MAC and serdes for (Q)SXGMII */ +static int felix_init_sxgmii(struct mii_dev *imdio, int pidx) +{ + int timeout = 1000; + + /* set up transit equalization control on serdes lane */ + out_le32(FELIX_SERDES_LNATECR0(1), FELIX_SERDES_LNATECR0_ADPT_EQ); + + /*reset lane */ + felix_mdio_write(imdio, pidx, MDIO_MMD_PCS, FELIX_PCS_CTRL, + FELIX_PCS_CTRL_RST); + while (felix_mdio_read(imdio, pidx, MDIO_MMD_PCS, + FELIX_PCS_CTRL) & FELIX_PCS_CTRL_RST && + --timeout) { + mdelay(10); + } + if (felix_mdio_read(imdio, pidx, MDIO_MMD_PCS, + FELIX_PCS_CTRL) & FELIX_PCS_CTRL_RST) + return -ETIME; + + /* Dev ability - SXGMII */ + felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL, + ENETC_PCS_DEV_ABILITY, ENETC_PCS_DEV_ABILITY_SXGMII); + + /* Restart PCS AN */ + felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL, ENETC_PCS_CR, + ENETC_PCS_CR_RST | ENETC_PCS_CR_RESET_AN); + felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL, + ENETC_PCS_REPL_LINK_TIMER_1, + ENETC_PCS_REPL_LINK_TIMER_1_DEF); + felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL, + ENETC_PCS_REPL_LINK_TIMER_2, + ENETC_PCS_REPL_LINK_TIMER_2_DEF); + + return 0; +} + +/* Apply protocol specific configuration to MAC, serdes as needed */ +static void felix_start_pcs(struct udevice *dev, int port, + struct phy_device *phy, struct mii_dev *imdio) +{ + bool autoneg = true; + + if (phy->phy_id == PHY_FIXED_ID || + phy->interface == PHY_INTERFACE_MODE_SGMII_2500) + autoneg = false; + + switch (phy->interface) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_SGMII_2500: + case PHY_INTERFACE_MODE_QSGMII: + felix_init_sgmii(imdio, port, autoneg); + break; + case PHY_INTERFACE_MODE_XGMII: + case PHY_INTERFACE_MODE_XFI: + case PHY_INTERFACE_MODE_USXGMII: + if (felix_init_sxgmii(imdio, port)) + dev_err(dev, "PCS reset timeout on port %d\n", port); + break; + default: + break; + } +} + +void felix_init(struct udevice *dev) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(dev); + struct felix_priv *priv = dev_get_priv(dev); + void *base = priv->regs_base; + int timeout = 100; + + /* Init core memories */ + out_le32(base + FELIX_SYS_RAM_CTRL, FELIX_SYS_RAM_CTRL_INIT); + while (in_le32(base + FELIX_SYS_RAM_CTRL) & FELIX_SYS_RAM_CTRL_INIT && + --timeout) + udelay(10); + if (in_le32(base + FELIX_SYS_RAM_CTRL) & FELIX_SYS_RAM_CTRL_INIT) + dev_err(dev, "Timeout waiting for switch memories\n"); + + /* Start switch core, set up ES0, IS1, IS2 */ + out_le32(base + FELIX_SYS_SYSTEM, FELIX_SYS_SYSTEM_EN); + out_le32(base + FELIX_ES0_TCAM_CTRL, FELIX_ES0_TCAM_CTRL_EN); + out_le32(base + FELIX_IS1_TCAM_CTRL, FELIX_IS1_TCAM_CTRL_EN); + out_le32(base + FELIX_IS2_TCAM_CTRL, FELIX_IS2_TCAM_CTRL_EN); + udelay(20); + + priv->imdio.read = felix_mdio_read; + priv->imdio.write = felix_mdio_write; + priv->imdio.priv = priv->imdio_base + FELIX_PM_IMDIO_BASE; + strncpy(priv->imdio.name, dev->name, MDIO_NAME_LEN); + + /* set up CPU port */ + out_le32(base + FELIX_QSYS_SYSTEM_EXT_CPU_CFG, + FELIX_QSYS_SYSTEM_EXT_CPU_PORT(pdata->cpu_port)); + out_le32(base + FELIX_SYS_SYSTEM_PORT_MODE(pdata->cpu_port), + FELIX_SYS_SYSTEM_PORT_MODE_CPU); +} + +/* + * Probe Felix: + * - enable the PCI function + * - map BAR 4 + * - init switch core and port registers + */ +static int felix_probe(struct udevice *dev) +{ + struct felix_priv *priv = dev_get_priv(dev); + + if (ofnode_valid(dev_ofnode(dev)) && + !ofnode_is_available(dev_ofnode(dev))) { + dev_dbg(dev, "switch disabled\n"); + return -ENODEV; + } + + priv->imdio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0); + if (!priv->imdio_base) { + dev_err(dev, "failed to map BAR0\n"); + return -EINVAL; + } + + priv->regs_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_4, 0); + if (!priv->regs_base) { + dev_err(dev, "failed to map BAR4\n"); + return -EINVAL; + } + + /* register internal MDIO for debug */ + if (!miiphy_get_dev_by_name(dev->name)) { + struct mii_dev *mii_bus; + + mii_bus = mdio_alloc(); + mii_bus->read = felix_mdio_read; + mii_bus->write = felix_mdio_write; + mii_bus->priv = priv->imdio_base + FELIX_PM_IMDIO_BASE; + strncpy(mii_bus->name, dev->name, MDIO_NAME_LEN); + mdio_register(mii_bus); + } + + dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY); + + dsa_set_tagging(dev, FELIX_DSA_TAG_LEN, 0); + + /* set up registers */ + felix_init(dev); + + return 0; +} + +static int felix_port_enable(struct udevice *dev, int port, + struct phy_device *phy) +{ + int supported = PHY_GBIT_FEATURES | SUPPORTED_2500baseX_Full; + struct felix_priv *priv = dev_get_priv(dev); + void *base = priv->regs_base; + + /* Set up MAC registers */ + out_le32(base + FELIX_GMII_CLOCK_CFG(port), + FELIX_GMII_CLOCK_CFG_LINK_1G); + + out_le32(base + FELIX_GMII_MAC_IFG_CFG(port), + FELIX_GMII_MAC_IFG_CFG_DEF); + + out_le32(base + FELIX_GMII_MAC_ENA_CFG(port), + FELIX_GMII_MAX_ENA_CFG_TX | FELIX_GMII_MAX_ENA_CFG_RX); + + out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(port), + FELIX_QSYS_SYSTEM_SW_PORT_ENA | + FELIX_QSYS_SYSTEM_SW_PORT_LOSSY | + FELIX_QSYS_SYSTEM_SW_PORT_SCH(1)); + + felix_start_pcs(dev, port, phy, &priv->imdio); + + phy->supported &= supported; + phy->advertising &= supported; + phy_config(phy); + + phy_startup(phy); + + return 0; +} + +static void felix_port_disable(struct udevice *dev, int pidx, + struct phy_device *phy) +{ + struct felix_priv *priv = dev_get_priv(dev); + void *base = priv->regs_base; + + out_le32(base + FELIX_GMII_MAC_ENA_CFG(pidx), 0); + + out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(pidx), + FELIX_QSYS_SYSTEM_SW_PORT_LOSSY | + FELIX_QSYS_SYSTEM_SW_PORT_SCH(1)); + + /* + * we don't call phy_shutdown here to avoid waiting next time we use + * the port, but the downside is that remote side will think we're + * actively processing traffic although we are not. + */ +} + +static int felix_xmit(struct udevice *dev, int pidx, void *packet, int length) +{ + struct felix_dsa_tag *tag = packet; + + tag->magic = FELIX_DSA_TAG_MAGIC; + tag->meta[FELIX_DSA_TAG_INJ_PORT] = FELIX_DSA_TAG_INJ_PORT_SET(pidx); + + return 0; +} + +static int felix_rcv(struct udevice *dev, int *pidx, void *packet, int length) +{ + struct felix_dsa_tag *tag = packet; + + if (tag->magic != FELIX_DSA_TAG_MAGIC) + return -EINVAL; + + *pidx = FELIX_DSA_TAG_EXT_PORT_GET(tag->meta[FELIX_DSA_TAG_EXT_PORT]); + + return 0; +} + +static const struct dsa_ops felix_dsa_ops = { + .port_enable = felix_port_enable, + .port_disable = felix_port_disable, + .xmit = felix_xmit, + .rcv = felix_rcv, +}; + +U_BOOT_DRIVER(felix_ethsw) = { + .name = "felix-switch", + .id = UCLASS_DSA, + .probe = felix_probe, + .ops = &felix_dsa_ops, + .priv_auto = sizeof(struct felix_priv), +}; + +static struct pci_device_id felix_ethsw_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_FELIX_ETHSW) }, + {} +}; + +U_BOOT_PCI_DEVICE(felix_ethsw, felix_ethsw_ids); From patchwork Tue Feb 16 21:19:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441118 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=QuUPYKij; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDRf6P0Wz9s1l for ; Wed, 17 Feb 2021 08:21:18 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 653DA8281E; Tue, 16 Feb 2021 22:20:34 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QuUPYKij"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 950338280D; Tue, 16 Feb 2021 22:20:14 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C4D5C827E9 for ; Tue, 16 Feb 2021 22:20:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ed1-x536.google.com with SMTP id c6so14074941ede.0 for ; Tue, 16 Feb 2021 13:20:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XpWlOhUWIcv+Cwo1HXSzYLvmFYea4N3kLdxPUtC19Cc=; b=QuUPYKijnABwEhMzSyGLEEcA/rSyJohCPwSMqcRdADeOya3cxuRy4EOExWz0EEcIQK GnTfOpJf22cVZnosiyNal8Rpe08vyrntIu/UUM7NqKk72LIWrp0xHzae+dOs6G2VYJlg qIvtIMMPBBbSh/TMsnegrRq+8x+LzAeVxmXhCH0yqe1MkLC1cRanGAMIAws/9O71eoDN Enduy72Mk5J6daQHHUK/bgFKpL5WR6MdNfn1Xx9cS4cnciX1RoeSVUlHMXm8LPqaR7tm qm/HFxyejMOkwSo2n+B7q23Xwdggg4WrWRFu3xxBZDUmInKe4r/Mf/0tDGJguDFZAElw hIJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XpWlOhUWIcv+Cwo1HXSzYLvmFYea4N3kLdxPUtC19Cc=; b=Z+7yEq7828WnKr35w39s/XAfNmb20peJuuwVBQlUO3hZSmYaVOHvSrlMNyp2xzmACv FP7kPuyQt+6nXxWle9rUmFSOI+Y8X4HZGxNYKAj1Yy1kxP5cyxxt9VMbTJd+SVnVt0WJ MUdwTZHk2LMEce4lEB/6tVjI9aDWdTS+R0NV33ySpwMYP+aMQhiG2sLj4wROD1mWjGdB 5ilFHZzxCb3rF+kRMvwimJpJuhcAP0flDv4BxbcmQA6n+AU7ZjLaehiU3LJdSeaiz93G MUoBuD+B7aCBXIN9i2pnRARQE3P4nFqYCXvnxjSzFyGfchJlm1lZiMqUHeZ1UP6RGN+u iieA== X-Gm-Message-State: AOAM530CQNbV98S+66SBe2q1CdIBACBLxOB4h0jop19MoENan4ZYUcpD l7fCjzi6Xh5oA7J9cCRis6Q= X-Google-Smtp-Source: ABdhPJxKTol3weUpB60hjikMSw/Gg1X8W0TE0msHo+ji1X3XYJY8oMKMfv1hd4GZnQopLJAoGf1VXw== X-Received: by 2002:aa7:c94a:: with SMTP id h10mr23977707edt.41.1613510403424; Tue, 16 Feb 2021 13:20:03 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:20:03 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 8/9] arm: dts: ls1028a: add Ethernet switch node and dependencies Date: Tue, 16 Feb 2021 23:19:35 +0200 Message-Id: <20210216211936.3291988-9-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Alex Marginean The definition follows the DSA binding in kernel and describes the switch, its ports and PHYs. The switch node has the same structure as in Linux and this patch enables it (and relevant ports) for the LS1028A RDB board. ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is not used in U-Boot and was disabled. Ethernet port aliases were also added to better manage the multitude of ports available now. Signed-off-by: Alex Marginean Signed-off-by: Claudiu Manoil Signed-off-by: Vladimir Oltean Reviewed-by: Michael Walle --- v5: none. v4: none. v3: Added a comment denoting the PHY model present on the RDB. v2: Switch node structure defined in dtsi now consistent with the Linux switch node definition. Moved aliases from dtsi to the RDB DTS to minimize impact on other boards (and for improved flexibility). arch/arm/dts/fsl-ls1028a-rdb.dts | 64 ++++++++++++++++++++++++++++++++ arch/arm/dts/fsl-ls1028a.dtsi | 55 ++++++++++++++++++++++++++- 2 files changed, 118 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index 85b4815b2ed7..3432fca35269 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -15,6 +15,12 @@ compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; aliases { spi0 = &fspi; + eth0 = &enetc0; + eth1 = &enetc2; + eth2 = &mscc_felix_port0; + eth3 = &mscc_felix_port1; + eth4 = &mscc_felix_port2; + eth5 = &mscc_felix_port3; }; }; @@ -131,9 +137,67 @@ phy-handle = <&rdb_phy0>; }; +&enetc2 { + status = "okay"; +}; + +&mscc_felix { + status = "okay"; +}; + +&mscc_felix_port0 { + label = "swp0"; + phy-handle = <&sw_phy0>; + phy-mode = "qsgmii"; + status = "okay"; +}; + +&mscc_felix_port1 { + label = "swp1"; + phy-handle = <&sw_phy1>; + phy-mode = "qsgmii"; + status = "okay"; +}; + +&mscc_felix_port2 { + label = "swp2"; + phy-handle = <&sw_phy2>; + phy-mode = "qsgmii"; + status = "okay"; +}; + +&mscc_felix_port3 { + label = "swp3"; + phy-handle = <&sw_phy3>; + phy-mode = "qsgmii"; + status = "okay"; +}; + +&mscc_felix_port4 { + ethernet = <&enetc2>; + status = "okay"; +}; + &mdio0 { status = "okay"; rdb_phy0: phy@2 { reg = <2>; }; + + /* VSC8514 QSGMII PHY */ + sw_phy0: phy@10 { + reg = <0x10>; + }; + + sw_phy1: phy@11 { + reg = <0x11>; + }; + + sw_phy2: phy@12 { + reg = <0x12>; + }; + + sw_phy3: phy@13 { + reg = <0x13>; + }; }; diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 5171bf28c79e..22d107d959de 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -151,9 +151,62 @@ reg = <0x000300 0 0 0 0>; status = "disabled"; }; + + mscc_felix: pci@0,5 { + reg = <0x000500 0 0 0 0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mscc_felix_port0: port@0 { + reg = <0>; + status = "disabled"; + }; + + mscc_felix_port1: port@1 { + reg = <1>; + status = "disabled"; + }; + + mscc_felix_port2: port@2 { + reg = <2>; + status = "disabled"; + }; + + mscc_felix_port3: port@3 { + reg = <3>; + status = "disabled"; + }; + + mscc_felix_port4: port@4 { + reg = <4>; + phy-mode = "internal"; + status = "disabled"; + + fixed-link { + speed = <2500>; + full-duplex; + }; + }; + + mscc_felix_port5: port@5 { + reg = <5>; + phy-mode = "internal"; + status = "disabled"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + enetc6: pci@0,6 { reg = <0x000600 0 0 0 0>; - status = "okay"; + status = "disabled"; phy-mode = "internal"; }; }; From patchwork Tue Feb 16 21:19:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1441121 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=NzY1manT; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DgDSM1HBGz9s1l for ; Wed, 17 Feb 2021 08:21:55 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B869E82836; Tue, 16 Feb 2021 22:20:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="NzY1manT"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4385E82816; Tue, 16 Feb 2021 22:20:20 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id BDD13827F5 for ; Tue, 16 Feb 2021 22:20:04 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=olteanv@gmail.com Received: by mail-ej1-x62f.google.com with SMTP id b14so12894798eju.7 for ; Tue, 16 Feb 2021 13:20:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wZJq12xfJIgv3c9WePDc2yrAmcAy2MgWOs5Bk84x6Y4=; b=NzY1manTLIl6aH3pDP3d+qoq6aQL+GhzFAQywJdftyPPtH5BqJbkcOKzuXAIwCP3Wm NTDWm3JWTaZXlqZucL8GOIDNOvweaNy0PK4+tU19XSvX26HB4e73e4S436FhS/zYQ/Xt /dBUW3/M6vJfHU30Ikw7rfHYjYBOIaeN0eOwtmXl4kBCT2VDwmRLCL/ABxY16f4myBxn TSWk6nu1YtBQAFOcVjVtn2DrqAGVyYW1mwqywfxTZ4P6AJcSzjI02qlSCDAXHOwBTTyu Hgfcvk/wlsMopqMw7XwnWltFOqh842SLdW98+lZPzqQ/S7EjiUF2J1L2xUwAxbj+sLs1 uiyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wZJq12xfJIgv3c9WePDc2yrAmcAy2MgWOs5Bk84x6Y4=; b=TyUz+GIhFQ1LpFwgNs9L4/y8zmlPoHBo4t2YgMZ7XjRtRPmfZrRAR7HEKbIcXWN/GG FDRh9VaOogNHYjzwpoEpMNrga1qVuzI8lK7ycn1Amk+4LoGzQjl7Eeo5CTiQtRv8XUqF 10jj1jXkujDOZQ5ZJSl4WwvQul6DYjS49PCTnH9CL50xkI3p1V1T0iag/OFB2WumDp7J /JV/5cR29GLhRMwgZZ9koteYBk7hNnPY2aadDlnOs59TIToOTTGN2LZRJk2l9SAwRPhm Nr6qQ6vWKdYV7DaMHFV+BNlrjmywatbsuy5d7+qXtD6WfPY8jMntWJ2t+7OYfTF9W5u/ iBtg== X-Gm-Message-State: AOAM530z9LvQ4EXUJUOd81Jci49PPzh1VlBBCaFuCYFhwGjo1YxFqtp5 nQ/u8EhrqbdhdCMxGKNipmk= X-Google-Smtp-Source: ABdhPJzbJ0o7Rr8JwZCRXJ9xV3n858WRPtgisOxYDq56LSqpZDa1KEJBFG8TuVJxN7PHydpnTgwxng== X-Received: by 2002:a17:907:aa9:: with SMTP id bz9mr21827564ejc.528.1613510404399; Tue, 16 Feb 2021 13:20:04 -0800 (PST) Received: from localhost.localdomain (5-12-227-87.residential.rdsnet.ro. [5.12.227.87]) by smtp.gmail.com with ESMTPSA id o10sm14803455eju.89.2021.02.16.13.20.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 13:20:04 -0800 (PST) From: Vladimir Oltean To: Tom Rini , Joe Hershberger , Simon Glass , Bin Meng , u-boot@lists.denx.de Cc: Michael Walle , Alexandru Marginean , Claudiu Manoil , Priyanka Jain Subject: [PATCH v5 9/9] configs: ls1028a: enable the Ethernet switch driver Date: Tue, 16 Feb 2021 23:19:36 +0200 Message-Id: <20210216211936.3291988-10-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210216211936.3291988-1-olteanv@gmail.com> References: <20210216211936.3291988-1-olteanv@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Alex Marginean The switch driver for LS1028A Ethernet switch is now compiled in for the NXP LS1028A reference design boards and for the Kontron SMARC-sAL28. Signed-off-by: Alex Marginean Signed-off-by: Claudiu Manoil Signed-off-by: Vladimir Oltean Acked-by: Michael Walle --- v5: none v4: enabled CONFIG_PHY_FIXED which is a new dependency of CONFIG_DM_DSA v3: enable the config options for the Kontron board too. v2: none configs/kontron_sl28_defconfig | 3 +++ configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1028aqds_tfa_defconfig | 3 +++ configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1028ardb_tfa_defconfig | 3 +++ 5 files changed, 15 insertions(+) diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 1759d5e1b92e..d56709689b38 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -84,6 +84,9 @@ CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FSL_ENETC=y +CONFIG_PHY_FIXED=y +CONFIG_DM_DSA=y +CONFIG_MSCC_FELIX_SWITCH=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index eaf903f65427..93b13b472942 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -62,6 +62,9 @@ CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y CONFIG_FSL_ENETC=y CONFIG_MDIO_MUX_I2CREG=y +CONFIG_PHY_FIXED=y +CONFIG_DM_DSA=y +CONFIG_MSCC_FELIX_SWITCH=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 248c64048296..c915069f283a 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -68,6 +68,9 @@ CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y CONFIG_FSL_ENETC=y CONFIG_MDIO_MUX_I2CREG=y +CONFIG_PHY_FIXED=y +CONFIG_DM_DSA=y +CONFIG_MSCC_FELIX_SWITCH=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 240e4204ae57..45d9f40043d9 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -59,6 +59,9 @@ CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FSL_ENETC=y +CONFIG_PHY_FIXED=y +CONFIG_DM_DSA=y +CONFIG_MSCC_FELIX_SWITCH=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 493fe7c377a1..cff68a3cc823 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -65,6 +65,9 @@ CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FSL_ENETC=y +CONFIG_PHY_FIXED=y +CONFIG_DM_DSA=y +CONFIG_MSCC_FELIX_SWITCH=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y