From patchwork Sat Jan 16 15:27:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Lobakin X-Patchwork-Id: 1427547 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; secure) header.d=pm.me header.i=@pm.me header.a=rsa-sha256 header.s=protonmail header.b=GY1ol3C9; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4DJ6Sx1tQkz9sVn for ; Sun, 17 Jan 2021 05:46:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726848AbhAPSpw (ORCPT ); Sat, 16 Jan 2021 13:45:52 -0500 Received: from mail-41103.protonmail.ch ([185.70.41.103]:43623 "EHLO mail-41103.protonmail.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725964AbhAPSpw (ORCPT ); Sat, 16 Jan 2021 13:45:52 -0500 X-Greylist: delayed 4203 seconds by postgrey-1.27 at vger.kernel.org; Sat, 16 Jan 2021 13:45:52 EST Received: from mail-03.mail-europe.com (mail-03.mail-europe.com [91.134.188.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by mail-41103.protonmail.ch (Postfix) with ESMTPS id 6D9822000E01 for ; Sat, 16 Jan 2021 15:29:07 +0000 (UTC) Authentication-Results: mail-41103.protonmail.ch; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="GY1ol3C9" Date: Sat, 16 Jan 2021 15:27:33 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail; t=1610810857; bh=ewLrxUjradkPA1ru1Wz2k9bHtjXJsODmOn92IB7cjQE=; h=Date:To:From:Cc:Reply-To:Subject:From; b=GY1ol3C9eZiVNw2YFAP0h7hmKMQ5WULAQN33gm4LWs4zvT7US/paN1oaHFkxGnne8 RyalSLdFtHfXvgwY/6DFnEf7C1Dsv8YIEfc74JTA07/fcwBLPBJPOUdSizKaqlw4rV TVXFVwEWLfhmbDatVyZUgv3VDsjSPpcQtRx5O0CBzJonzTdL0WMmfoNNJbQnZHtH3N YScFQwe2vKKdZuYgO70Ae7JKMkmWJi3QWTEftsx+Hg2FjhM/U3EsUMVAXJYceTKLJE ZC0p8FkkbKECoGfAMjihEByW6n0dDeV/3I4t6YEcjxQ48jiUv3/Dfnf8TZVz+jST82 ZCJM7weNrwaWg== To: Lorenzo Pieralisi , Bjorn Helgaas From: Alexander Lobakin Cc: Jingoo Han , Gustavo Pimentel , Rob Herring , Alexander Lobakin , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Alexander Lobakin Subject: [PATCH pci-next] PCI: dwc: put struct dw_pcie::{ep,pp} into a union to reduce its size Message-ID: <20210116152711.23411-1-alobakin@pm.me> MIME-Version: 1.0 X-Spam-Status: No, score=-1.2 required=10.0 tests=ALL_TRUSTED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF shortcircuit=no autolearn=disabled version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on mailout.protonmail.ch Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org A single dw_pcie entity can't be a root complex and an endpoint at the same time. We can use this to reduce the size of dw_pcie by 80, from 280 to 200 bytes (on x32, guess more on x64), by putting the related embedded structures (struct pcie_port and struct dw_pcie_ep) into a union. Signed-off-by: Alexander Lobakin --- drivers/pci/controller/dwc/pcie-designware.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 5d979953800d..924ebeaa3885 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -265,8 +265,10 @@ struct dw_pcie { size_t atu_size; u32 num_ib_windows; u32 num_ob_windows; - struct pcie_port pp; - struct dw_pcie_ep ep; + union { + struct pcie_port pp; + struct dw_pcie_ep ep; + }; const struct dw_pcie_ops *ops; unsigned int version; int num_lanes;