From patchwork Tue Jan 9 18:01:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 857645 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zGKkG3zHBz9s83 for ; Wed, 10 Jan 2018 05:03:02 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 1BDEDC21F58; Tue, 9 Jan 2018 18:02:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B614EC21FE0; Tue, 9 Jan 2018 18:01:51 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 393E4C21F7C; Tue, 9 Jan 2018 18:01:49 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id EDE00C21F74 for ; Tue, 9 Jan 2018 18:01:48 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id C426E8F488B3; Tue, 9 Jan 2018 18:01:48 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Wm4UPMKW0MQT; Tue, 9 Jan 2018 18:01:43 +0000 (UTC) Received: from scm-ws8.ad.schmelzer.or.at (188-22-125-132.adsl.highway.telekom.at [188.22.125.132]) by hamspirit.at (Postfix) with ESMTP id 3F3318F488B5; Tue, 9 Jan 2018 18:01:43 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Tue, 9 Jan 2018 19:01:31 +0100 Message-Id: <1515520896-18833-2-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> References: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> Cc: trini@konsulko.com, Hannes Schmelzer Subject: [U-Boot] [PATCH v3 1/6] mach-omap2: add AM335x Display PLL register definition X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adds the register definition of the Display DPLL Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-am33xx/clock.h | 1 + arch/arm/mach-omap2/am33xx/clock_am33xx.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index 5399bb8..9dbcd3a 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -104,6 +104,7 @@ extern const struct dpll_regs dpll_mpu_regs; extern const struct dpll_regs dpll_core_regs; extern const struct dpll_regs dpll_per_regs; extern const struct dpll_regs dpll_ddr_regs; +extern const struct dpll_regs dpll_disp_regs; extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS]; extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ]; extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ]; diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c index 1780bbd..9ab4d25 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c @@ -52,6 +52,13 @@ const struct dpll_regs dpll_ddr_regs = { .cm_div_m2_dpll = CM_WKUP + 0xA0, }; +const struct dpll_regs dpll_disp_regs = { + .cm_clkmode_dpll = CM_WKUP + 0x98, + .cm_idlest_dpll = CM_WKUP + 0x48, + .cm_clksel_dpll = CM_WKUP + 0x54, + .cm_div_m2_dpll = CM_WKUP + 0xA4, +}; + struct dpll_params dpll_mpu_opp100 = { CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1}; const struct dpll_params dpll_core_opp100 = { From patchwork Tue Jan 9 18:01:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 857651 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zGKnF3PhGz9s75 for ; Wed, 10 Jan 2018 05:05:37 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 1EE77C22020; Tue, 9 Jan 2018 18:03:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 99B9CC2200D; Tue, 9 Jan 2018 18:02:23 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D656BC21FEB; Tue, 9 Jan 2018 18:01:59 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id 67F6AC21FFC for ; Tue, 9 Jan 2018 18:01:55 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id 44D038F488B7; Tue, 9 Jan 2018 18:01:55 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cq5-o-cHTb5r; Tue, 9 Jan 2018 18:01:48 +0000 (UTC) Received: from scm-ws8.ad.schmelzer.or.at (188-22-125-132.adsl.highway.telekom.at [188.22.125.132]) by hamspirit.at (Postfix) with ESMTP id D5CA78F488B6; Tue, 9 Jan 2018 18:01:43 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Tue, 9 Jan 2018 19:01:32 +0100 Message-Id: <1515520896-18833-3-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> References: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> Cc: trini@konsulko.com, Hannes Schmelzer Subject: [U-Boot] [PATCH v3 2/6] am335x-fb: cosmetic: update-copyright X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- Changes in v3: - modify copyright year to 2013-2018 Changes in v2: None drivers/video/am335x-fb.c | 4 ++-- drivers/video/am335x-fb.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index a8b3e74..c8100d8 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -1,6 +1,6 @@ /* - * Copyright (C) 2013 Hannes Schmelzer - * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * Copyright (C) 2013-2018 Hannes Schmelzer + * B&R Industrial Automation GmbH - http://www.br-automation.com * * minimal framebuffer driver for TI's AM335x SoC to be compatible with * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h index 3f4b567..903a8f1 100644 --- a/drivers/video/am335x-fb.h +++ b/drivers/video/am335x-fb.h @@ -1,6 +1,6 @@ /* - * Copyright (C) 2013 Hannes Schmelzer - - * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * Copyright (C) 2013-2018 Hannes Schmelzer - + * B&R Industrial Automation GmbH - http://www.br-automation.com * * SPDX-License-Identifier: GPL-2.0+ */ From patchwork Tue Jan 9 18:01:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 857646 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zGKlc1xhDz9s75 for ; Wed, 10 Jan 2018 05:04:12 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D06A8C22022; Tue, 9 Jan 2018 18:02:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BF085C22066; Tue, 9 Jan 2018 18:02:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 8DE1DC21FF4; Tue, 9 Jan 2018 18:01:58 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id 3823FC2202D for ; Tue, 9 Jan 2018 18:01:54 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id 1249C8F48CB6; Tue, 9 Jan 2018 18:01:54 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tKzqO3hLlXWl; Tue, 9 Jan 2018 18:01:48 +0000 (UTC) Received: from scm-ws8.ad.schmelzer.or.at (188-22-125-132.adsl.highway.telekom.at [188.22.125.132]) by hamspirit.at (Postfix) with ESMTP id 773AA8F488B7; Tue, 9 Jan 2018 18:01:44 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Tue, 9 Jan 2018 19:01:33 +0100 Message-Id: <1515520896-18833-4-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> References: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> Cc: trini@konsulko.com, Hannes Schmelzer Subject: [U-Boot] [PATCH v3 3/6] am335x-fb: cosmetic: fix coding style X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- Changes in v3: None Changes in v2: - am335x-fb: avoid compiler warning drivers/video/am335x-fb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index c8100d8..697b701 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -108,11 +108,11 @@ int am335xfb_init(struct am335x_lcdpanel *panel) { u32 raster_ctrl = 0; - if (0 == gd->fb_base) { + if (gd->fb_base == 0) { printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n"); return -1; } - if (0 == panel) { + if (panel == NULL) { printf("ERROR: missing ptr to am335x_lcdpanel!\n"); return -1; } @@ -147,7 +147,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel) gd->fb_base += 0x20; /* turn ON display through powercontrol function if accessible */ - if (0 != panel->panel_power_ctrl) + if (panel->panel_power_ctrl != NULL) panel->panel_power_ctrl(1); debug("am335x-fb: wait for stable power ...\n"); From patchwork Tue Jan 9 18:01:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 857650 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zGKmf5PQrz9s7M for ; Wed, 10 Jan 2018 05:05:06 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 0CADEC2204D; Tue, 9 Jan 2018 18:02:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E47C3C22022; Tue, 9 Jan 2018 18:02:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E65FFC21F88; Tue, 9 Jan 2018 18:02:03 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id 8D83AC21F7C for ; Tue, 9 Jan 2018 18:01:59 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id 6F9BA8F488B7; Tue, 9 Jan 2018 18:01:59 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Uy4FCIva0klj; Tue, 9 Jan 2018 18:01:54 +0000 (UTC) Received: from scm-ws8.ad.schmelzer.or.at (188-22-125-132.adsl.highway.telekom.at [188.22.125.132]) by hamspirit.at (Postfix) with ESMTP id 12FBB8F488B9; Tue, 9 Jan 2018 18:01:45 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Tue, 9 Jan 2018 19:01:34 +0100 Message-Id: <1515520896-18833-5-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> References: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> Cc: trini@konsulko.com, Hannes Schmelzer Subject: [U-Boot] [PATCH v3 4/6] am335x-fb: setup display PLL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The LCDC IP-core an be feed from several clock sources, one of those is a dedicated DPLL for generating a dividable base-clock for this IP-core. The TRM specifies the maximum input frequency for the LCCD with 200 MHz, so we must not exceed this value with the PLL frequency (which can lock much higher). This patch tries every combination of multipliers and divisors of the PLL and the IP-core itself for getting as near as possible the the requested panel->pxl_clk. Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- Changes in v3: None Changes in v2: None drivers/video/am335x-fb.c | 54 ++++++++++++++++++++++++++++++++++++++++++++--- drivers/video/am335x-fb.h | 2 +- 2 files changed, 52 insertions(+), 4 deletions(-) diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index 697b701..a7892f7 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -12,7 +12,11 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include +#include #include +#include +#include +#include #include #include "am335x-fb.h" @@ -20,6 +24,7 @@ #error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!" #endif +#define LCDC_FMAX 200000000 /* LCD Control Register */ #define LCD_CLK_DIVISOR(x) ((x) << 8) @@ -96,6 +101,7 @@ struct am335x_lcdhw { }; static struct am335x_lcdhw *lcdhw = (void *)LCD_CNTL_BASE; + DECLARE_GLOBAL_DATA_PTR; int lcd_get_size(int *line_length) @@ -108,6 +114,11 @@ int am335xfb_init(struct am335x_lcdpanel *panel) { u32 raster_ctrl = 0; + struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL; + struct dpll_params dpll_disp = { 1, 0, 1, -1, -1, -1, -1 }; + unsigned int m, n, d, best_d = 2; + int err = 0, err_r = 0; + if (gd->fb_base == 0) { printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n"); return -1; @@ -132,14 +143,51 @@ int am335xfb_init(struct am335x_lcdpanel *panel) return -1; } + /* check given clock-frequency */ + if (panel->pxl_clk > (LCDC_FMAX / 2)) { + pr_err("am335x-fb: requested pxl-clk: %d not supported!\n", + panel->pxl_clk); + return -1; + } + debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", panel->hactive, panel->vactive, panel->bpp, panel->hfp, panel->hbp, panel->hsw); - debug("vfp=%d,vbp=%d,vsw=%d / clk-div=%d)\n", - panel->vfp, panel->vfp, panel->vsw, panel->pxl_clk_div); + debug("vfp=%d,vbp=%d,vsw=%d / clk=%d)\n", + panel->vfp, panel->vfp, panel->vsw, panel->pxl_clk); debug("using frambuffer at 0x%08x with size %d.\n", (unsigned int)gd->fb_base, FBSIZE(panel)); + /* setup display pll for requested clock frequency */ + err = panel->pxl_clk; + err_r = err; + + for (d = 2; d < 255; d++) { + for (m = 2; m < 2047; m++) { + if ((V_OSCK * m) < (panel->pxl_clk * d)) + continue; + n = (V_OSCK * m) / (panel->pxl_clk * d); + if (n > 127) + break; + if (((V_OSCK * m) / n) > LCDC_FMAX) + break; + + err = abs((V_OSCK * m) / n / d - panel->pxl_clk); + if (err < err_r) { + err_r = err; + dpll_disp.m = m; + dpll_disp.n = n; + best_d = d; + } + } + } + debug("%s: PLL: best error %d Hz (M %d, N %d, DISP %d)\n", + __func__, err_r, dpll_disp.m, dpll_disp.n, best_d); + do_setup_dpll(&dpll_disp_regs, &dpll_disp); + + /* clock source for LCDC from dispPLL M2 */ + writel(0x0, &cmdpll->clklcdcpixelclk); + /* palette default entry */ memset((void *)gd->fb_base, 0, 0x20); *(unsigned int *)gd->fb_base = 0x4000; @@ -154,7 +202,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel) mdelay(panel->pup_delay); lcdhw->clkc_enable = LCD_CORECLKEN | LCD_LIDDCLKEN | LCD_DMACLKEN; lcdhw->raster_ctrl = 0; - lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; + lcdhw->ctrl = LCD_CLK_DIVISOR(best_d) | LCD_RASTER_MODE; lcdhw->lcddma_fb0_base = gd->fb_base; lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel); lcdhw->lcddma_fb1_base = gd->fb_base; diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h index 903a8f1..f99b341 100644 --- a/drivers/video/am335x-fb.h +++ b/drivers/video/am335x-fb.h @@ -53,7 +53,7 @@ struct am335x_lcdpanel { unsigned int vfp; /* Vertical front porch */ unsigned int vbp; /* Vertical back porch */ unsigned int vsw; /* Vertical Sync Pulse Width */ - unsigned int pxl_clk_div; /* Pixel clock divider*/ + unsigned int pxl_clk; /* Pixel clock */ unsigned int pol; /* polarity of sync, clock signals */ unsigned int pup_delay; /* * time in ms after power on to From patchwork Tue Jan 9 18:01:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 857649 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zGKmL19LDz9s75 for ; Wed, 10 Jan 2018 05:04:50 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id BA6C9C22009; Tue, 9 Jan 2018 18:03:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5D31AC22046; Tue, 9 Jan 2018 18:02:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 29B26C22019; Tue, 9 Jan 2018 18:02:04 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id B417BC2204F for ; Tue, 9 Jan 2018 18:02:00 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id 93D218F488B7; Tue, 9 Jan 2018 18:02:00 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id B-OmPpbVymxY; Tue, 9 Jan 2018 18:01:55 +0000 (UTC) Received: from scm-ws8.ad.schmelzer.or.at (188-22-125-132.adsl.highway.telekom.at [188.22.125.132]) by hamspirit.at (Postfix) with ESMTP id A82768F48CB4; Tue, 9 Jan 2018 18:01:45 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Tue, 9 Jan 2018 19:01:35 +0100 Message-Id: <1515520896-18833-6-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> References: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> Cc: trini@konsulko.com, "xypron.glpk@gmx.de" , Hannes Schmelzer Subject: [U-Boot] [PATCH v3 5/6] board/BuR: provide real clock-frequency instead a divider X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Actual am335x-fb implementation takes now a real clock frequency instead a divider. So this component doesn't need to know anymore some base frequency of the LCDC, we simply provide the pixel-clock frequency. Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- Changes in v3: None Changes in v2: - board/BuR/common: fix the !CONFIG_USE_FDT case board/BuR/common/common.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 7e49cdf..f2d8a65 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -146,13 +146,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len"); pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay"); pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay"); - - /* calc. proper clk-divisor */ - dtbprop = FDTPROP(PATHTIM, "clock-frequency"); - if (dtbprop != ~0UL) - pnltmp.pxl_clk_div = 192000000 / dtbprop; - else - pnltmp.pxl_clk_div = ~0UL; + pnltmp.pxl_clk = FDTPROP(PATHTIM, "clock-frequency"); /* check polarity of control-signals */ dtbprop = FDTPROP(PATHTIM, "hsync-active"); @@ -202,7 +196,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL); pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL); pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL); - pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL); + pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL); pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL); pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL); pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL); @@ -218,7 +212,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) ~0UL == (pnltmp.vfp) || ~0UL == (pnltmp.vbp) || ~0UL == (pnltmp.vsw) || - ~0UL == (pnltmp.pxl_clk_div) || + ~0UL == (pnltmp.pxl_clk) || ~0UL == (pnltmp.pol) || ~0UL == (pnltmp.pup_delay) || ~0UL == (pnltmp.pon_delay) @@ -241,7 +235,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) pnltmp.hactive, pnltmp.vactive, pnltmp.bpp, pnltmp.hfp, pnltmp.hbp, pnltmp.hsw, pnltmp.vfp, pnltmp.vbp, pnltmp.vsw, - pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay); + pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay); return -1; } From patchwork Tue Jan 9 18:01:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 857652 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zGKns6NNDz9s75 for ; Wed, 10 Jan 2018 05:06:09 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 875C0C21FF3; Tue, 9 Jan 2018 18:03:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A86DFC21FF3; Tue, 9 Jan 2018 18:02:38 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 88340C21FF3; Tue, 9 Jan 2018 18:02:08 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id D58B2C22046 for ; Tue, 9 Jan 2018 18:02:04 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id B59348F48CB6; Tue, 9 Jan 2018 18:02:04 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nJzC2tPn1Atl; Tue, 9 Jan 2018 18:01:59 +0000 (UTC) Received: from scm-ws8.ad.schmelzer.or.at (188-22-125-132.adsl.highway.telekom.at [188.22.125.132]) by hamspirit.at (Postfix) with ESMTP id 6C5DD8F48CB5; Tue, 9 Jan 2018 18:01:46 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Tue, 9 Jan 2018 19:01:36 +0100 Message-Id: <1515520896-18833-7-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> References: <1515520896-18833-1-git-send-email-oe5hpm@oevsv.at> Cc: trini@konsulko.com, Hannes Schmelzer Subject: [U-Boot] [PATCH v3 6/6] board/BuR: drop LCDC clock manipulation from board code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The clock selection is done now from the am335x-fb code, so there is no more need doing this in the board code. Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- Changes in v3: None Changes in v2: None board/BuR/brppt1/board.c | 3 --- board/BuR/brxre1/board.c | 2 -- 2 files changed, 5 deletions(-) diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 6083479..9f7b2d9 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -120,9 +120,6 @@ void am33xx_spl_board_init(void) }; do_enable_clocks(clk_domains, clk_modules_tsspecific, 1); - /* setup LCD-Pixel Clock */ - writel(0x2, &cmdpll->clklcdcpixelclk); /* clock comes from perPLL M2 */ - /* setup I2C */ enable_i2c_pin_mux(); i2c_set_bus_num(0); diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index 856ac3d..e176b60 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -121,8 +121,6 @@ void am33xx_spl_board_init(void) 0 }; do_enable_clocks(clk_domains, clk_modules_xre1specific, 1); - /* setup LCD-Pixel Clock */ - writel(0x2, CM_DPLL + 0x34); /* power-OFF LCD-Display */ gpio_direction_output(LCD_PWR, 0);