From patchwork Thu Dec 3 09:28:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410236 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=Loh5FteJ; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrCC3PWTz9s1l for ; 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d="scan'208";a="101254825" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:29:28 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:29:28 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:23 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 01/34] ARM: dts: sama7g5: add initial DT for sama7g5 SoC Date: Thu, 3 Dec 2020 11:28:17 +0200 Message-ID: <20201203092850.7909-2-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add initial basic devicetree for sama7g5 SoC Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 65 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 arch/arm/dts/sama7g5.dtsi diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi new file mode 100644 index 0000000000..24b6f90957 --- /dev/null +++ b/arch/arm/dts/sama7g5.dtsi @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sama7g5.dtsi - Device Tree Include file for SAMA7G5 SoC. + * + * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * + * Author: Eugen Hristev + * Author: Claudiu Beznea + * + */ + +#include "skeleton.dtsi" + +/ { + model = "Microchip SAMA7G5 family SoC"; + compatible = "microchip,sama7g5"; + + clocks { + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + mck: mck { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + sdmmc1: sdio-host@e1208000 { + compatible = "microchip,sama7g5-sdhci"; + reg = <0xe1208000 0x300>; + clocks = <&mck>, <&mck>, <&mck>; + clock-names = "hclock", "multclk", "baseclk"; + status = "disabled"; + }; + + uart0: serial@e1824200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xe1824200 0x200>; + clocks = <&mck>; + clock-names = "usart"; + status = "disabled"; + }; + }; + }; +}; From patchwork Thu Dec 3 09:28:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410237 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=QROrvykM; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrCM6Y4pz9sVY for ; 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d="scan'208";a="101254828" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:29:31 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:29:31 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:28 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 02/34] board: atmel: sama7g5ek: add initial support for sama7g5ek Date: Thu, 3 Dec 2020 11:28:18 +0200 Message-ID: <20201203092850.7909-3-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add initial support for sama7g5 evaluation kit board. Signed-off-by: Eugen Hristev --- arch/arm/dts/Makefile | 3 ++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 33 +++++++++++++++ arch/arm/dts/sama7g5ek.dts | 39 +++++++++++++++++ arch/arm/mach-at91/Kconfig | 8 ++++ board/atmel/sama7g5ek/Kconfig | 15 +++++++ board/atmel/sama7g5ek/MAINTAINERS | 7 +++ board/atmel/sama7g5ek/Makefile | 7 +++ board/atmel/sama7g5ek/sama7g5ek.c | 68 ++++++++++++++++++++++++++++++ configs/sama7g5ek_mmc1_defconfig | 59 ++++++++++++++++++++++++++ include/configs/sama7g5ek.h | 46 ++++++++++++++++++++ 10 files changed, 285 insertions(+) create mode 100644 arch/arm/dts/sama7g5ek-u-boot.dtsi create mode 100644 arch/arm/dts/sama7g5ek.dts create mode 100644 board/atmel/sama7g5ek/Kconfig create mode 100644 board/atmel/sama7g5ek/MAINTAINERS create mode 100644 board/atmel/sama7g5ek/Makefile create mode 100644 board/atmel/sama7g5ek/sama7g5ek.c create mode 100644 configs/sama7g5ek_mmc1_defconfig create mode 100644 include/configs/sama7g5ek.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5308713df7..fa5590561a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -886,6 +886,9 @@ dtb-$(CONFIG_TARGET_OMAP4_SDP4430) += \ dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \ omap5-uevm.dtb +dtb-$(CONFIG_TARGET_SAMA7G5EK) += \ + sama7g5ek.dtb + dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \ at91-sama5d2_ptc_ek.dtb diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi new file mode 100644 index 0000000000..c0f8f94027 --- /dev/null +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sama7g5ek-u-boot.dts - Device Tree file for SAMA7G5 SoC u-boot properties. + * + * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * + * Author: Eugen Hristev + * Author: Claudiu Beznea + * + */ + +/ { + chosen { + u-boot,dm-pre-reloc; + }; + + ahb { + u-boot,dm-pre-reloc; + + apb { + u-boot,dm-pre-reloc; + }; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&mck { + u-boot,dm-pre-reloc; +}; + diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts new file mode 100644 index 0000000000..41a754df6f --- /dev/null +++ b/arch/arm/dts/sama7g5ek.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * sama7g5ek.dts - Device Tree file for SAMA7G5 EK + * SAMA7G5 Evaluation Kit + * + * Copyright (c) 2020, Microchip Technology Inc. + * 2020, Eugen Hristev + * 2020, Claudiu Beznea + */ +/dts-v1/; +#include "sama7g5.dtsi" +#include "sama7g5-pinfunc.h" + +/ { + model = "Microchip SAMA7G5 Evaluation Kit"; + compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + ahb { + + apb { + sdmmc1: sdio-host@e1208000 { + bus-width = <4>; + status = "okay"; + }; + + uart0: serial@e1824200 { + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index be1415f909..c78a308f48 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -265,6 +265,13 @@ config TARGET_CORVUS select SUPPORT_SPL imply CMD_DM +config TARGET_SAMA7G5EK + bool "SAMA7G5 EK board" + select SAMA7G5 + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + + config TARGET_TAURUS bool "Support taurus" select AT91SAM9G20 @@ -327,6 +334,7 @@ source "board/atmel/at91sam9n12ek/Kconfig" source "board/atmel/at91sam9rlek/Kconfig" source "board/atmel/at91sam9x5ek/Kconfig" source "board/atmel/sam9x60ek/Kconfig" +source "board/atmel/sama7g5ek/Kconfig" source "board/atmel/sama5d2_ptc_ek/Kconfig" source "board/atmel/sama5d2_xplained/Kconfig" source "board/atmel/sama5d27_som1_ek/Kconfig" diff --git a/board/atmel/sama7g5ek/Kconfig b/board/atmel/sama7g5ek/Kconfig new file mode 100644 index 0000000000..a89db8d8a8 --- /dev/null +++ b/board/atmel/sama7g5ek/Kconfig @@ -0,0 +1,15 @@ +if TARGET_SAMA7G5EK + +config SYS_BOARD + default "sama7g5ek" + +config SYS_VENDOR + default "atmel" + +config SYS_SOC + default "at91" + +config SYS_CONFIG_NAME + default "sama7g5ek" + +endif diff --git a/board/atmel/sama7g5ek/MAINTAINERS b/board/atmel/sama7g5ek/MAINTAINERS new file mode 100644 index 0000000000..f66953ac4e --- /dev/null +++ b/board/atmel/sama7g5ek/MAINTAINERS @@ -0,0 +1,7 @@ +SAMA7G5 EK BOARD +M: Eugen Hristev +S: Maintained +F: board/atmel/sama7g5ek.c +F: include/configs/sama7g5ek.h +F: configs/sama7g5ek_mmc1_defconfig + diff --git a/board/atmel/sama7g5ek/Makefile b/board/atmel/sama7g5ek/Makefile new file mode 100644 index 0000000000..a6eedd10fa --- /dev/null +++ b/board/atmel/sama7g5ek/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020 Microchip Technology Inc. +# Eugen Hristev +# + +obj-y += sama7g5ek.o diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c new file mode 100644 index 0000000000..1d7a01593d --- /dev/null +++ b/board/atmel/sama7g5ek/sama7g5ek.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Microchip Technology, Inc. + * Eugen Hristev + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_late_init(void) +{ + return 0; +} + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +static void board_uart0_hw_init(void) +{ + /* FLEXCOM3 IO0 */ + atmel_pio4_set_f_periph(AT91_PIO_PORTD, 17, ATMEL_PIO_PUEN_MASK); + /* FLEXCOM3 IO1 */ + atmel_pio4_set_f_periph(AT91_PIO_PORTD, 16, 0); + + at91_periph_clk_enable(ATMEL_ID_FLEXCOM3); +} + +void board_debug_uart_init(void) +{ + board_uart0_hw_init(); +} +#endif + +int board_early_init_f(void) +{ +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig new file mode 100644 index 0000000000..d54af0ccbf --- /dev/null +++ b/configs/sama7g5ek_mmc1_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x66f00000 +CONFIG_TARGET_SAMA7G5EK=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x4000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xe1824200 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" +CONFIG_DEBUG_UART=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_SD_BOOT=y +CONFIG_USE_BOOTARGS=y +CONFIG_MISC_INIT_R=y +CONFIG_HUSH_PARSER=y +# CONFIG_AUTOBOOT is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x70000000 +CONFIG_CMD_STRINGS=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_ATMEL_PIO4=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91PIO4=y +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_TIMER=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER_HII is not set diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h new file mode 100644 index 0000000000..3b3432ba5e --- /dev/null +++ b/include/configs/sama7g5ek.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA7G5EK Board. + * + * Copyright (C) 2020 Microchip Corporation + * Eugen Hristev + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CONFIG_SYS_SDRAM_SIZE 0x20000000 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_INIT_SP_ADDR 0x218000 +#else +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#endif + +#define CONFIG_SYS_LOAD_ADDR 0x62000000 /* load address */ + +#undef CONFIG_BOOTCOMMAND +#ifdef CONFIG_SD_BOOT +/* u-boot env in sd/mmc card */ +#define FAT_ENV_INTERFACE "mmc" +#define FAT_ENV_DEVICE_AND_PART "0" +#define FAT_ENV_FILE "uboot.env" +/* bootstrap + u-boot + env in sd card */ +#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; " \ + "fatload mmc 0:1 0x62000000 zImage; " \ + "bootz 0x62000000 - 0x61000000" +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" +#endif + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) + +#endif From patchwork Thu Dec 3 09:28:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410239 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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03 Dec 2020 02:29:41 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:29:40 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:32 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 03/34] board: atmel: sama7g5ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR Date: Thu, 3 Dec 2020 11:28:19 +0200 Message-ID: <20201203092850.7909-4-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Heap base address is computed based on SYS_INIT_SP_ADDR by subtracting the SYS_MALLOC_F_LEN value in board_init_f_init_reserve(). Signed-off-by: Claudiu Beznea --- include/configs/sama7g5ek.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 3b3432ba5e..fbf0274b38 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -20,7 +20,8 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x218000 #else #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ + GENERATED_GBL_DATA_SIZE) #endif #define CONFIG_SYS_LOAD_ADDR 0x62000000 /* load address */ From patchwork Thu Dec 3 09:28:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410240 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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d="scan'208";a="105981935" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:29:43 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:29:43 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:41 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 04/34] configs: sama7g5ek: set malloc pool to 68K Date: Thu, 3 Dec 2020 11:28:20 +0200 Message-ID: <20201203092850.7909-5-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Set malloc pool to 68K for sama7g5ek. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index d54af0ccbf..2da766d4e2 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x66f00000 CONFIG_TARGET_SAMA7G5EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_MALLOC_F_LEN=0x11000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y From patchwork Thu Dec 3 09:28:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410241 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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d="scan'208";a="95685305" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:29:52 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:29:51 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:44 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 05/34] configs: sama7g5ek: enable pll driver Date: Thu, 3 Dec 2020 11:28:21 +0200 Message-ID: <20201203092850.7909-6-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Enable PLL driver for SAMA7G5. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 2da766d4e2..d43d07da78 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -5,7 +5,6 @@ CONFIG_TARGET_SAMA7G5EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MALLOC_F_LEN=0x11000 CONFIG_ENV_SIZE=0x4000 -CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 @@ -42,6 +41,8 @@ CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_UTMI=y CONFIG_AT91_GENERIC_CLK=y +CONFIG_AT91_SAM9X60_PLL=y +CONFIG_DM_GPIO=y CONFIG_ATMEL_PIO4=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y From patchwork Thu Dec 3 09:28:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410242 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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d="scan'208";a="95685339" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:30:11 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:30:10 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:53 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 06/34] ARM: dts: sama7g5: move clock frequencies for xtals in board file Date: Thu, 3 Dec 2020 11:28:22 +0200 Message-ID: <20201203092850.7909-7-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Move clock frequencies for crystals on board specific files. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 2 -- arch/arm/dts/sama7g5ek.dts | 10 ++++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 24b6f90957..618f3a37d5 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -19,13 +19,11 @@ slow_xtal: slow_xtal { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <0>; }; main_xtal: main_xtal { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <0>; }; mck: mck { diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 41a754df6f..03c7aa07ea 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -23,6 +23,16 @@ stdout-path = "serial0:115200n8"; }; + clocks { + slow_xtal: slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal: main_xtal { + clock-frequency = <24000000>; + }; + }; + ahb { apb { From patchwork Thu Dec 3 09:28:23 2020 Content-Type: text/plain; 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d="scan'208";a="101254981" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:30:23 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:30:23 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:30:12 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 07/34] ARM: dts: sama7g5: add slow rc and main rc oscillators Date: Thu, 3 Dec 2020 11:28:23 +0200 Message-ID: <20201203092850.7909-8-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add slow rc and main rc oscillators to dtsi. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 12 ++++++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 8 ++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 618f3a37d5..c2410959ed 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -16,6 +16,18 @@ compatible = "microchip,sama7g5"; clocks { + slow_rc_osc: slow_rc_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <18500>; + }; + + main_rc: main_rc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12000000>; + }; + slow_xtal: slow_xtal { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index c0f8f94027..06af2f74ee 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -23,6 +23,14 @@ }; }; +&main_rc { + u-boot,dm-pre-reloc; +}; + +&slow_rc_osc { + u-boot,dm-pre-reloc; +}; + &uart0 { u-boot,dm-pre-reloc; }; From patchwork Thu Dec 3 09:28:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410244 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=r9O/psmC; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrDg6TZSz9s1l for ; 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d="scan'208";a="35932500" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:30:34 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:30:34 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:30:26 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 08/34] ARM: dts: sama7g5: add u-boot, dm-pre-reloc bindings for xtals Date: Thu, 3 Dec 2020 11:28:24 +0200 Message-ID: <20201203092850.7909-9-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add dm-pre-reloc DT binding property for cristals. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5ek-u-boot.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 06af2f74ee..d10448e031 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -27,10 +27,18 @@ u-boot,dm-pre-reloc; }; +&main_xtal { + u-boot,dm-pre-reloc; +}; + &slow_rc_osc { u-boot,dm-pre-reloc; }; +&slow_xtal { + u-boot,dm-pre-reloc; +}; + &uart0 { u-boot,dm-pre-reloc; }; From patchwork Thu Dec 3 09:28:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410245 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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d="scan'208";a="101255077" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:30:48 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:30:48 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:30:39 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 09/34] ARM: dts: sama7g5: add slow clock bindings Date: Thu, 3 Dec 2020 11:28:25 +0200 Message-ID: <20201203092850.7909-10-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add DT bindings for slow clock driver. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index c2410959ed..9d390db5ff 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -55,6 +55,13 @@ #address-cells = <1>; #size-cells = <1>; + clk32: sckc@e001d050 { + compatible = "microchip,sam9x60-sckc"; + reg = <0xe001d050 0x4>; + clocks = <&slow_rc_osc>, <&slow_xtal>; + #clock-cells = <1>; + }; + sdmmc1: sdio-host@e1208000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1208000 0x300>; From patchwork Thu Dec 3 09:28:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410246 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; 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d="scan'208";a="101255087" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:30:53 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:30:52 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:30:49 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 10/34] ARM: dts: sama7g5: add PMC bindings Date: Thu, 3 Dec 2020 11:28:26 +0200 Message-ID: <20201203092850.7909-11-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add DT bindings for PMC driver. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 9 +++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 9d390db5ff..28faa412dd 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -55,6 +55,15 @@ #address-cells = <1>; #size-cells = <1>; + pmc: pmc@e0018000 { + compatible = "microchip,sama7g5-pmc"; + reg = <0xe0018000 0x200>; + #clock-cells = <2>; + clocks = <&clk32 1>, <&clk32 0>, <&main_xtal>, <&main_rc>; + clock-names = "td_slck", "md_slck", "main_xtal", "main_rc"; + status = "okay"; + }; + clk32: sckc@e001d050 { compatible = "microchip,sam9x60-sckc"; reg = <0xe001d050 0x4>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index d10448e031..428b98c303 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -31,6 +31,10 @@ u-boot,dm-pre-reloc; }; +&pmc { + u-boot,dm-pre-reloc; +}; + &slow_rc_osc { u-boot,dm-pre-reloc; }; From patchwork Thu Dec 3 09:28:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410247 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=XUo2xsR2; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrFP2vfbz9s1l for ; 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d="scan'208";a="100717986" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:31:01 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:31:00 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:30:53 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 11/34] ARM: dts: sama7g5: switch to PMC bindings Date: Thu, 3 Dec 2020 11:28:27 +0200 Message-ID: <20201203092850.7909-12-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Get rid of software defined MCK and switch to PMC bindings for IPs currently present in device tree. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 13 ++++--------- arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ---- 2 files changed, 4 insertions(+), 13 deletions(-) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 28faa412dd..94e0b535cc 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -10,6 +10,7 @@ */ #include "skeleton.dtsi" +#include / { model = "Microchip SAMA7G5 family SoC"; @@ -37,12 +38,6 @@ compatible = "fixed-clock"; #clock-cells = <0>; }; - - mck: mck { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; }; ahb { @@ -74,15 +69,15 @@ sdmmc1: sdio-host@e1208000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1208000 0x300>; - clocks = <&mck>, <&mck>, <&mck>; - clock-names = "hclock", "multclk", "baseclk"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>; + clock-names = "hclock", "multclk"; status = "disabled"; }; uart0: serial@e1824200 { compatible = "atmel,at91sam9260-usart"; reg = <0xe1824200 0x200>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; clock-names = "usart"; status = "disabled"; }; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 428b98c303..95d9c3bff2 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -47,7 +47,3 @@ u-boot,dm-pre-reloc; }; -&mck { - u-boot,dm-pre-reloc; -}; - From patchwork Thu Dec 3 09:28:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410248 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; 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03 Dec 2020 02:31:19 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:31:17 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:31:00 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 12/34] configs: sama7g5: enable CONFIG_CPU Date: Thu, 3 Dec 2020 11:28:28 +0200 Message-ID: <20201203092850.7909-13-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Enable CONFIG_CPU. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index d43d07da78..936d9cd73f 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -42,6 +42,7 @@ CONFIG_CLK_AT91=y CONFIG_AT91_UTMI=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_CPU=y CONFIG_DM_GPIO=y CONFIG_ATMEL_PIO4=y CONFIG_DM_I2C=y From patchwork Thu Dec 3 09:28:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410249 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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03 Dec 2020 02:31:30 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:31:30 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:31:19 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 13/34] ARM: dts: sama7g5: add CPU bindings Date: Thu, 3 Dec 2020 11:28:29 +0200 Message-ID: <20201203092850.7909-14-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add CPU DT bindings. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 94e0b535cc..a2554dcfff 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -40,6 +40,18 @@ }; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + A7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>; + clock-names = "cpu", "master", "xtal"; + }; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; From patchwork Thu Dec 3 09:28:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410250 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; 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d="scan'208";a="101255244" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:31:49 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:31:48 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:31:30 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 14/34] configs: sama7g5: use PIT64B Date: Thu, 3 Dec 2020 11:28:30 +0200 Message-ID: <20201203092850.7909-15-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Use PIT64B driver. ATMEL_PIT is not available for SAMA7G5. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 936d9cd73f..7d4d409532 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -58,5 +58,6 @@ CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y +CONFIG_MCHP_PIT64B_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set From patchwork Thu Dec 3 09:28:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410251 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; 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d="scan'208";a="101255252" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:31:52 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:31:52 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:31:51 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 15/34] ARM: dts: sama7g5: enable autoboot Date: Thu, 3 Dec 2020 11:28:31 +0200 Message-ID: <20201203092850.7909-16-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Enable autoboot. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 7d4d409532..99e2439516 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -16,7 +16,6 @@ CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y -# CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y From patchwork Thu Dec 3 09:28:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410252 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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03 Dec 2020 02:32:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:32:07 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:31:58 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 16/34] ARM: dts: sama7g5: add pit64b support Date: Thu, 3 Dec 2020 11:28:32 +0200 Message-ID: <20201203092850.7909-17-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add DT bindings for PIT64B driver. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 8 ++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index a2554dcfff..f633c2f81e 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -86,6 +86,14 @@ status = "disabled"; }; + pit64b0: timer@e1800000 { + compatible = "microchip,sama7g5-pit64b"; + reg = <0xe1800000 0x4000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>; + clock-names = "pclk", "gclk"; + status = "okay"; + }; + uart0: serial@e1824200 { compatible = "atmel,at91sam9260-usart"; reg = <0xe1824200 0x200>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 95d9c3bff2..27e0f316f3 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -31,6 +31,10 @@ u-boot,dm-pre-reloc; }; +&pit64b0 { + u-boot,dm-pre-reloc; +}; + &pmc { u-boot,dm-pre-reloc; }; From patchwork Thu Dec 3 09:28:33 2020 Content-Type: text/plain; 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d="scan'208";a="98442925" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:32:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:32:15 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:32:08 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 17/34] ARM: dts: at91: sama7g5: add pinctrl node Date: Thu, 3 Dec 2020 11:28:33 +0200 Message-ID: <20201203092850.7909-18-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add pioA pinctrl node. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 13 +++++++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 8 ++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index f633c2f81e..d9208d68d5 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -62,6 +62,19 @@ #address-cells = <1>; #size-cells = <1>; + pioA: pinctrl@e0014000 { + compatible = "atmel,sama5d2-gpio"; + reg = <0xe0014000 0x800>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; + status = "okay"; + + pinctrl: pinctrl_default { + compatible = "microchip,sama7g5-pinctrl"; + }; + }; + pmc: pmc@e0018000 { compatible = "microchip,sama7g5-pmc"; reg = <0xe0018000 0x200>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 27e0f316f3..4af4d1bb5b 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -31,6 +31,14 @@ u-boot,dm-pre-reloc; }; +&pioA { + u-boot,dm-pre-reloc; + + pinctrl { + u-boot,dm-pre-reloc; + }; +}; + &pit64b0 { u-boot,dm-pre-reloc; }; From patchwork Thu Dec 3 09:28:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410254 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=EsQ6zFrk; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrGt2jQ9z9s1l for ; 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d="scan'208";a="101255378" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:32:33 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:32:33 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:32:29 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 18/34] ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3 Date: Thu, 3 Dec 2020 11:28:34 +0200 Message-ID: <20201203092850.7909-19-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add pinctrl for sdmmc1 and flx3. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ++++ arch/arm/dts/sama7g5ek.dts | 30 ++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 4af4d1bb5b..5e1a0d53a5 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -39,6 +39,10 @@ }; }; +&pinctrl_flx3_default { + u-boot,dm-pre-reloc; +}; + &pit64b0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 03c7aa07ea..a9190bfcb3 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -38,12 +38,42 @@ apb { sdmmc1: sdio-host@e1208000 { bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default + &pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>; status = "okay"; }; uart0: serial@e1824200 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx3_default>; status = "okay"; }; }; }; }; + +&pinctrl { + pinctrl_flx3_default: flx3_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default { + pinmux = , + , + , + , + ; + bias-pull-up; + }; + + pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default { + pinmux = , + , + , + ; + bias-pull-up; + }; +}; From patchwork Thu Dec 3 09:28:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410255 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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Thu, 3 Dec 2020 02:32:45 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:32:39 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 19/34] configs: sama7g5ek: enable mii command Date: Thu, 3 Dec 2020 11:28:35 +0200 Message-ID: <20201203092850.7909-20-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Enable mii command as ethernet's PHY specific programming is based on it. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 99e2439516..176f4f3000 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y From patchwork Thu Dec 3 09:28:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410256 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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03 Dec 2020 02:33:11 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:10 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:32:45 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 20/34] ARM: dts: sama7g5: add GMAC0 Date: Thu, 3 Dec 2020 11:28:36 +0200 Message-ID: <20201203092850.7909-21-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add GMAC0. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 11 +++++++++++ arch/arm/dts/sama7g5ek.dts | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index d9208d68d5..33589f3ad9 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -114,6 +114,17 @@ clock-names = "usart"; status = "disabled"; }; + + gmac0: ethernet@e2800000 { + compatible = "cdns,sama7g5-gem"; + reg = <0xe2800000 0x4000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>; + clock-names = "hclk", "pclk", "tx_clk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 51>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */ + assigned-clock-rates = <125000000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index a9190bfcb3..194f4644b5 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -53,6 +53,19 @@ }; }; +&gmac0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac0_default>; + phy-mode = "rgmii-id"; + status = "okay"; + + ethernet-phy@7 { + reg = <0x7>; + }; +}; + &pinctrl { pinctrl_flx3_default: flx3_default { pinmux = , @@ -76,4 +89,23 @@ ; bias-pull-up; }; + + pinctrl_gmac0_default: gmac0_default { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + }; }; From patchwork Thu Dec 3 09:28:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410257 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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03 Dec 2020 02:33:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:15 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:12 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 21/34] ARM: dts: sama7g5: add GMAC1 Date: Thu, 3 Dec 2020 11:28:37 +0200 Message-ID: <20201203092850.7909-22-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Add GMAC1. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 8 ++++++++ arch/arm/dts/sama7g5ek.dts | 27 +++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 33589f3ad9..43fac992ee 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -125,6 +125,14 @@ assigned-clock-rates = <125000000>; status = "disabled"; }; + + gmac1: ethernet@e2804000 { + compatible = "cdns,sama7g5-emac"; + reg = <0xe2804000 0x1000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 194f4644b5..3eac94896d 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -66,6 +66,19 @@ }; }; +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac1_default>; + phy-mode = "rmii"; + status = "okay"; + + ethernet-phy@0 { + reg = <0x0>; + }; +}; + &pinctrl { pinctrl_flx3_default: flx3_default { pinmux = , @@ -108,4 +121,18 @@ ; bias-disable; }; + + pinctrl_gmac1_default: gmac1_default { + pinmux = , + , + , + , + , + , + , + , + , + ; + bias-disable; + }; }; From patchwork Thu Dec 3 09:28:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410258 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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03 Dec 2020 02:33:18 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:18 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:16 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 22/34] board: atmel: sama7g5ek: increase arp timeout and retry count Date: Thu, 3 Dec 2020 11:28:38 +0200 Message-ID: <20201203092850.7909-23-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Increase ARP timeout and retry count as this will increase the speed of communication. Signed-off-by: Claudiu Beznea --- include/configs/sama7g5ek.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index fbf0274b38..dc6cf4c700 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -44,4 +44,7 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) +#define CONFIG_ARP_TIMEOUT 200 +#define CONFIG_NET_RETRY_COUNT 50 + #endif From patchwork Thu Dec 3 09:28:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410259 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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03 Dec 2020 02:33:20 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:20 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:18 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 23/34] configs: sama7g5ek: enable support for KSZ9131 Date: Thu, 3 Dec 2020 11:28:39 +0200 Message-ID: <20201203092850.7909-24-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Enable support for KSZ9131. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 176f4f3000..7e3cf49da0 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -49,6 +49,8 @@ CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_MACB=y CONFIG_PINCTRL=y From patchwork Thu Dec 3 09:28:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410260 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; 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d="scan'208";a="35932710" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:33:29 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:28 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:27 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 24/34] configs: sama7g5ek: enable CCF Date: Thu, 3 Dec 2020 11:28:40 +0200 Message-ID: <20201203092850.7909-25-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Claudiu Beznea Enable CCF for SAMA7G5. Signed-off-by: Claudiu Beznea --- configs/sama7g5ek_mmc1_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 7e3cf49da0..fa4c88ffa6 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y +CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_UTMI=y CONFIG_AT91_GENERIC_CLK=y From patchwork Thu Dec 3 09:28:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410261 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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03 Dec 2020 02:33:30 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:30 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:29 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 25/34] ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1 Date: Thu, 3 Dec 2020 11:28:41 +0200 Message-ID: <20201203092850.7909-26-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean SDMMC1 requires clock specification with assigned-clocks, such that the PMC will know which parent to assign and the initial start-up frequency. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 43fac992ee..826828bb17 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -96,6 +96,9 @@ reg = <0xe1208000 0x300>; clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>; clock-names = "hclock", "multclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 81>; + assigned-clock-rates = <200000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ status = "disabled"; }; From patchwork Thu Dec 3 09:28:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410262 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; 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d="scan'208";a="105982263" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:33:39 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:40 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:30 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 26/34] ARM: dts: at91: sama7g5: add node for sdmmc0 Date: Thu, 3 Dec 2020 11:28:42 +0200 Message-ID: <20201203092850.7909-27-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add node for sdmmc0 block. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 826828bb17..4c571befad 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -91,6 +91,17 @@ #clock-cells = <1>; }; + sdmmc0: sdio-host@e1204000 { + compatible = "microchip,sama7g5-sdhci"; + reg = <0xe1204000 0x300>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>; + clock-names = "hclock", "multclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 80>; + assigned-clock-rates = <200000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + status = "disabled"; + }; + sdmmc1: sdio-host@e1208000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1208000 0x300>; From patchwork Thu Dec 3 09:28:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410263 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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d="scan'208";a="101255562" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:33:51 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:50 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:40 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 27/34] ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl Date: Thu, 3 Dec 2020 11:28:43 +0200 Message-ID: <20201203092850.7909-28-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Enable sdmmc0 on this board. A non-removable eMMC is connected on this block. Configure pincontrol accordingly. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5ek.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 3eac94896d..452bf425df 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -36,6 +36,15 @@ ahb { apb { + sdmmc0: sdio-host@e1204000 { + bus-width = <8>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default + &pinctrl_sdmmc0_ck_rstn_ds_cd_default>; + status = "okay"; + }; + sdmmc1: sdio-host@e1208000 { bus-width = <4>; pinctrl-names = "default"; @@ -86,6 +95,27 @@ bias-disable; }; + pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default { + pinmux = , + , + , + , + , + , + , + , + ; + bias-pull-up; + }; + + pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default { + pinmux = , + , + , + ; + bias-pull-up; + }; + pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default { pinmux = , , From patchwork Thu Dec 3 09:28:44 2020 Content-Type: text/plain; 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d="scan'208";a="98443046" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:33:54 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:33:54 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:51 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 28/34] board: atmel: sama7g5ek: clean-up header bootcommand Date: Thu, 3 Dec 2020 11:28:44 +0200 Message-ID: <20201203092850.7909-29-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Clean-up boot command to use the predefined device and part for FAT environment. According to this device and partition, select the proper boot media. Signed-off-by: Eugen Hristev --- include/configs/sama7g5ek.h | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index dc6cf4c700..ef3bfa36fd 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -29,16 +29,11 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ -#define FAT_ENV_INTERFACE "mmc" -#define FAT_ENV_DEVICE_AND_PART "0" -#define FAT_ENV_FILE "uboot.env" + /* bootstrap + u-boot + env in sd card */ -#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; " \ - "fatload mmc 0:1 0x62000000 zImage; " \ +#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x61000000 at91-sama7g5ek.dtb; " \ + "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x62000000 zImage; " \ "bootz 0x62000000 - 0x61000000" -#undef CONFIG_BOOTARGS -#define CONFIG_BOOTARGS \ - "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" #endif /* Size of malloc() pool */ From patchwork Thu Dec 3 09:28:45 2020 Content-Type: text/plain; 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d="scan'208";a="98443061" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:34:02 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:34:02 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:33:57 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 29/34] configs: sama7g5: add mmc config for sdmmc0 Date: Thu, 3 Dec 2020 11:28:45 +0200 Message-ID: <20201203092850.7909-30-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add new config for storing environment from sdmmc0. Also clean-up sama7g5ek_emmc1 to point to the proper mmc device. Signed-off-by: Eugen Hristev --- board/atmel/sama7g5ek/MAINTAINERS | 1 + configs/sama7g5ek_mmc1_defconfig | 7 ++-- configs/sama7g5ek_mmc_defconfig | 67 +++++++++++++++++++++++++++++++ 3 files changed, 72 insertions(+), 3 deletions(-) create mode 100644 configs/sama7g5ek_mmc_defconfig diff --git a/board/atmel/sama7g5ek/MAINTAINERS b/board/atmel/sama7g5ek/MAINTAINERS index f66953ac4e..eac972968d 100644 --- a/board/atmel/sama7g5ek/MAINTAINERS +++ b/board/atmel/sama7g5ek/MAINTAINERS @@ -4,4 +4,5 @@ S: Maintained F: board/atmel/sama7g5ek.c F: include/configs/sama7g5ek.h F: configs/sama7g5ek_mmc1_defconfig +F: configs/sama7g5ek_mmc_defconfig diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index fa4c88ffa6..b6d2f4dd05 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -2,9 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x66f00000 CONFIG_TARGET_SAMA7G5EK=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MALLOC_F_LEN=0x11000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 +CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 @@ -14,6 +15,7 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk1p2 rw rootwait" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -35,6 +37,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y @@ -44,7 +47,6 @@ CONFIG_AT91_UTMI=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y CONFIG_CPU=y -CONFIG_DM_GPIO=y CONFIG_ATMEL_PIO4=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y @@ -56,7 +58,6 @@ CONFIG_DM_ETH=y CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y -# CONFIG_RAM_ROCKCHIP_DEBUG is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig new file mode 100644 index 0000000000..894a64983f --- /dev/null +++ b/configs/sama7g5ek_mmc_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x66f00000 +CONFIG_TARGET_SAMA7G5EK=y +CONFIG_SYS_MALLOC_F_LEN=0x11000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x4000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xe1824200 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" +CONFIG_DEBUG_UART=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_SD_BOOT=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" +CONFIG_MISC_INIT_R=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x70000000 +CONFIG_CMD_STRINGS=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_CCF=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_AT91_SAM9X60_PLL=y +CONFIG_CPU=y +CONFIG_ATMEL_PIO4=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_TIMER=y +CONFIG_MCHP_PIT64B_TIMER=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER_HII is not set From patchwork Thu Dec 3 09:28:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410267 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=qFEKoVAP; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrKd6GFjz9sPB for ; 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d="scan'208";a="95685806" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:34:12 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:34:12 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:34:05 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 30/34] ARM: dts: at91: sama7g5: add flexcom1 and i2c subnode Date: Thu, 3 Dec 2020 11:28:46 +0200 Message-ID: <20201203092850.7909-31-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add flexcom1 and i2c subnode. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 4c571befad..4846778ed9 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -121,6 +121,23 @@ status = "okay"; }; + flx1: flexcom@e181c000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe181c000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe181c000 0x800>; + status = "disabled"; + + i2c1: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; + }; + }; uart0: serial@e1824200 { compatible = "atmel,at91sam9260-usart"; reg = <0xe1824200 0x200>; From patchwork Thu Dec 3 09:28:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410268 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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d="scan'208";a="100718158" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:34:26 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:34:24 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:34:13 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 31/34] ARM: dts: sama7g5ek: add i2c1 bus and eeproms Date: Thu, 3 Dec 2020 11:28:47 +0200 Message-ID: <20201203092850.7909-32-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add node for flx1 i2c1 subnode (and alias to bus 0) This bus has two eeprom devices connected. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5ek.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 452bf425df..0812b0cc00 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -17,6 +17,7 @@ aliases { serial0 = &uart0; + i2c0 = &i2c1; }; chosen { @@ -62,6 +63,29 @@ }; }; +&flx1 { + atmel,flexcom-mode = <3>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx1_default>; + status = "okay"; + + eeprom@52 { + compatible = "atmel,24c32"; + reg = <0x52>; + pagesize = <16>; + }; + + eeprom@53 { + compatible = "atmel,24c32"; + reg = <0x53>; + pagesize = <16>; + }; +}; + &gmac0 { #address-cells = <1>; #size-cells = <0>; @@ -89,6 +113,12 @@ }; &pinctrl { + pinctrl_flx1_default: flx1_default { + pinmux = , + ; + bias-disable; + }; + pinctrl_flx3_default: flx3_default { pinmux = , ; From patchwork Thu Dec 3 09:28:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410269 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=OAhmMzpa; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrL16czTz9s1l for ; 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d="scan'208";a="95685839" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:34:32 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:34:30 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:34:27 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 32/34] board: atmel: sama7g5ek: add support for MAC address retreival Date: Thu, 3 Dec 2020 11:28:48 +0200 Message-ID: <20201203092850.7909-33-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Obtain two MAC addresses from the two EEPROMs and configure the two available Ethernet interfaces accordingly. Signed-off-by: Eugen Hristev --- board/atmel/sama7g5ek/sama7g5ek.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c index 1d7a01593d..ed1cf80da7 100644 --- a/board/atmel/sama7g5ek/sama7g5ek.c +++ b/board/atmel/sama7g5ek/sama7g5ek.c @@ -46,6 +46,19 @@ int board_early_init_f(void) return 0; } +#define MAC24AA_MAC_OFFSET 0xfa + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ +#ifdef CONFIG_I2C_EEPROM + at91_set_ethaddr(MAC24AA_MAC_OFFSET); + at91_set_eth1addr(MAC24AA_MAC_OFFSET); +#endif + return 0; +} +#endif + int board_init(void) { /* address of boot parameters */ @@ -61,8 +74,3 @@ int dram_init(void) return 0; } -int misc_init_r(void) -{ - return 0; -} - From patchwork Thu Dec 3 09:28:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410270 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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d="scan'208";a="101255675" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:34:48 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:34:47 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:34:32 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 33/34] configs: sama7g5ek: add i2c and eeprom Date: Thu, 3 Dec 2020 11:28:49 +0200 Message-ID: <20201203092850.7909-34-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add drivers for flexcom, i2c and eeproms Signed-off-by: Eugen Hristev --- configs/sama7g5ek_mmc1_defconfig | 3 +++ configs/sama7g5ek_mmc_defconfig | 3 +++ 2 files changed, 6 insertions(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index b6d2f4dd05..af362021b9 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -49,6 +49,9 @@ CONFIG_AT91_SAM9X60_PLL=y CONFIG_CPU=y CONFIG_ATMEL_PIO4=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_AT91=y +CONFIG_I2C_EEPROM=y +CONFIG_MICROCHIP_FLEXCOM=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 894a64983f..bbd1a0c659 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -49,6 +49,9 @@ CONFIG_AT91_SAM9X60_PLL=y CONFIG_CPU=y CONFIG_ATMEL_PIO4=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_AT91=y +CONFIG_I2C_EEPROM=y +CONFIG_MICROCHIP_FLEXCOM=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y From patchwork Thu Dec 3 09:28:50 2020 Content-Type: text/plain; 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d="scan'208";a="101255688" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:34:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:34:58 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:34:48 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 34/34] ARM: dts: sama7g5ek: fix TXC pin configuration Date: Thu, 3 Dec 2020 11:28:50 +0200 Message-ID: <20201203092850.7909-35-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203092850.7909-1-eugen.hristev@microchip.com> References: <20201203092850.7909-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Nicolas Ferre TXC line is directly connected from the SoC to the KSZ9131 PHY. There is a transient state on this signal, before configuring it to RGMII, which leads to packet transmit being blocked. Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes the issue. Signed-off-by: Nicolas Ferre --- arch/arm/dts/sama7g5ek.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 0812b0cc00..41818cc911 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -90,7 +90,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac0_default>; + pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>; phy-mode = "rgmii-id"; status = "okay"; @@ -173,7 +173,6 @@ , , , - , , , , @@ -182,6 +181,11 @@ bias-disable; }; + pinctrl_gmac0_txc_default: gmac0_txc_default { + pinmux = ; + bias-pull-up; + }; + pinctrl_gmac1_default: gmac1_default { pinmux = , ,