From patchwork Wed Dec 2 09:00:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1409504 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=IEv6YHl4; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CmCdK0v1Bz9sPB for ; Wed, 2 Dec 2020 20:01:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729057AbgLBJBY (ORCPT ); Wed, 2 Dec 2020 04:01:24 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:9207 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727006AbgLBJBY (ORCPT ); Wed, 2 Dec 2020 04:01:24 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Wed, 02 Dec 2020 01:00:44 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 2 Dec 2020 09:00:43 +0000 Received: from moonraker.nvidia.com (172.20.13.39) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Wed, 2 Dec 2020 09:00:42 +0000 From: Jon Hunter To: Thierry Reding CC: , , "Jon Hunter" Subject: [PATCH 1/2] arm64: defconfig: Enable Tegra SoC Thermal driver Date: Wed, 2 Dec 2020 09:00:11 +0000 Message-ID: <20201202090012.306327-1-jonathanh@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1606899644; bh=HZof7pDj52cslU0wQrFct0+zLVBBix8axsqJzdzx9Xw=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:MIME-Version: X-NVConfidentiality:Content-Transfer-Encoding:Content-Type; b=IEv6YHl4oyXAJ2Vt7Aaq6UqHGb3j8F+qGIuvKTKDFTD0CiIKvGG6uA+t+dSaNITkZ LtLJpXpwXkbCJ0wFvTIEI5T0ji4dMgqoA1kaJwRmSpJMbp2X+iTzB1fnCR0NSUysdY v7kv0ZogmO0Myfr3/AeinVsVSsvMDJIueyGZ5ZfjfxWumm03YCKH6RPeY0KgCfidGS Xeqqf7ISeTjg4SevucSTVmRs/+SGd9efsQjJeLgFkDFHq4KwnWIVd1xWZVNgT2rD9n KsWhadAc2+boHxRuNAFHbLC24BWwGO4OiCuz9rLREbfPR2uMC9hCfp/+5SV2rvgfn8 ofluahgHnoTVw== Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Enable the Tegra SoC Thermal driver that is used by Tegra132 and Tegra210 platforms to be built as a module by default for ARM64 builds. Signed-off-by: Jon Hunter --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 867cc4a5f00f..079d2762ce20 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -550,6 +550,7 @@ CONFIG_BCM2835_THERMAL=m CONFIG_BRCMSTB_THERMAL=m CONFIG_EXYNOS_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m +CONFIG_TEGRA_SOCTHERM=m CONFIG_QCOM_TSENS=y CONFIG_QCOM_SPMI_TEMP_ALARM=m CONFIG_UNIPHIER_THERMAL=y From patchwork Wed Dec 2 09:00:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1409505 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=SqATl/bF; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CmCdK3lG0z9sVl for ; Wed, 2 Dec 2020 20:01:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729114AbgLBJB0 (ORCPT ); Wed, 2 Dec 2020 04:01:26 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:19043 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729107AbgLBJB0 (ORCPT ); Wed, 2 Dec 2020 04:01:26 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Wed, 02 Dec 2020 01:00:45 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 2 Dec 2020 09:00:45 +0000 Received: from moonraker.nvidia.com (172.20.13.39) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Wed, 2 Dec 2020 09:00:44 +0000 From: Jon Hunter To: Thierry Reding CC: , , "Jon Hunter" Subject: [PATCH 2/2] ARM: config: Enable Tegra SoC Thermal driver Date: Wed, 2 Dec 2020 09:00:12 +0000 Message-ID: <20201202090012.306327-2-jonathanh@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201202090012.306327-1-jonathanh@nvidia.com> References: <20201202090012.306327-1-jonathanh@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1606899645; bh=8p7860+awh8IciLAhgRckW1Z7Nb8VlsgvEe2p448J4o=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=SqATl/bFmzPUFWTAD5eGIbdir1cu3lG2DPDlxzdFGcTrdhH/k19H/iGD51gsivz+g KWiD+ruvs7LtshH/4rZVVjdO+wwc5UsYeB5llrofO9VQkcK4P4MqgumL0pyXCzTI+o tYYq0Wu+aoaIeHMjeIKpoQzYcFfNMKWzadU1l1pPNxNk3rN81bNhOBuoxjg+MqK5QJ LtY3Vz9NOMVF1bFxJiB3AKb4ttYCJ1PZTfsvq5x62zlGEEFRGWnkwM1QYoAppM0S0X yxsjJUWeQ19/1Gz8bzexVybJStICG+5t2qAMwdQuuaBhr9GcxQ6XMt5XqgT4ouOfwP ZRb44dVZIOEvg== Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Enable the Tegra SoC Thermal driver that is used by Tegra124 platforms to be built as a module by default for ARM tegra_defconfig and multi_v7_defconfig builds. Signed-off-by: Jon Hunter --- arch/arm/configs/multi_v7_defconfig | 1 + arch/arm/configs/tegra_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 1bcfb8211e51..9398ffb016f7 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -513,6 +513,7 @@ CONFIG_BCM2711_THERMAL=m CONFIG_BCM2835_THERMAL=m CONFIG_BRCMSTB_THERMAL=m CONFIG_ST_THERMAL_MEMMAP=y +CONFIG_TEGRA_SOCTHERM=m CONFIG_UNIPHIER_THERMAL=y CONFIG_DA9063_WATCHDOG=m CONFIG_XILINX_WATCHDOG=y diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index fff5fae0db30..a4bce17447be 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -167,6 +167,7 @@ CONFIG_SENSORS_LM95245=y CONFIG_THERMAL=y CONFIG_THERMAL_STATISTICS=y CONFIG_CPU_THERMAL=y +CONFIG_TEGRA_SOCTHERM=m CONFIG_WATCHDOG=y CONFIG_MAX77620_WATCHDOG=y CONFIG_TEGRA_WATCHDOG=y