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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id da9sm841485edb.13.2020.12.01.05.35.25 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 Dec 2020 05:35:26 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Ashok Reddy Soma , Michal Simek Subject: [PATCH] serial: uartlite: Fix uninitialized ret in debug uartlite Date: Tue, 1 Dec 2020 14:35:24 +0100 Message-Id: X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Ashok Reddy Soma Endianness detection is checked against uninitialized ret variable. Assign ret with read value from status register to fix this. Fixes: 31a359f87eaa ("serial: uartlite: Add support to work with any endianness") Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- drivers/serial/serial_xuartlite.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index 236ab860ad87..1453fb42579b 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -148,7 +148,7 @@ static inline void _debug_uart_init(void) uart_out32(®s->control, 0); uart_out32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); - uart_in32(®s->status); + ret = uart_in32(®s->status); /* Endianness detection */ if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) { little_endian = true;