From patchwork Thu Nov 5 10:24:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sameer Pujar X-Patchwork-Id: 1394859 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=C8j4A4mk; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CRfm70RZ9z9sTR for ; Thu, 5 Nov 2020 21:25:11 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729862AbgKEKY5 (ORCPT ); Thu, 5 Nov 2020 05:24:57 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:6865 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729887AbgKEKYy (ORCPT ); Thu, 5 Nov 2020 05:24:54 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 05 Nov 2020 02:24:57 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 5 Nov 2020 10:24:53 +0000 Received: from audio.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 5 Nov 2020 10:24:50 +0000 From: Sameer Pujar To: , CC: , , , , , , , , , Sameer Pujar Subject: [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema Date: Thu, 5 Nov 2020 15:54:04 +0530 Message-ID: <1604571846-14037-3-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604571846-14037-1-git-send-email-spujar@nvidia.com> References: <1604571846-14037-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1604571897; bh=ZiE19ShmgN2M88iHqu8BwmdG3lh2LxfHHpvrRd1ZTf0=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type; b=C8j4A4mkuZePquw+wMSAN6W66eUQ/pp5DZwMiW8zHaQu+b8FMC9fLJfyWN+hbRXX7 rCfFZipm+O0R0fIHONVAVSYWg1b8lnsHVGo1i9OfG5HIX4Fyl04nXbDZNa3IZ0IBed 1NLV2mYJeoqNZDOdOEMboFwpBYPeEuQZWvO/2lihu62uz1wvM0RP0J1i1xVRSNlTjQ AvV97Kj7V1zzjMUMWQPeBxZFgSs8XYrua5iPgVsUmHPsxIkEPOY/0IUxmUjfUG9Eso bfO2AsJGM2ZrEHP6wTHaPMLWMjvshSFVXx/tz8Gl9Z6jiuxkdwHnwnNSNZDgimbQ/e A/+aGNIteiQLw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move ADMA documentation to YAML format. Signed-off-by: Sameer Pujar --- .../bindings/dma/nvidia,tegra210-adma.txt | 56 ------------- .../bindings/dma/nvidia,tegra210-adma.yaml | 95 ++++++++++++++++++++++ 2 files changed, 95 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt deleted file mode 100644 index 245d306..0000000 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt +++ /dev/null @@ -1,56 +0,0 @@ -* NVIDIA Tegra Audio DMA (ADMA) controller - -The Tegra Audio DMA controller that is used for transferring data -between system memory and the Audio Processing Engine (APE). - -Required properties: -- compatible: Should contain one of the following: - - "nvidia,tegra210-adma": for Tegra210 - - "nvidia,tegra186-adma": for Tegra186 and Tegra194 -- reg: Should contain DMA registers location and length. This should be - a single entry that includes all of the per-channel registers in one - contiguous bank. -- interrupts: Should contain all of the per-channel DMA interrupts in - ascending order with respect to the DMA channel index. -- clocks: Must contain one entry for the ADMA module clock - (TEGRA210_CLK_D_AUDIO). -- clock-names: Must contain the name "d_audio" for the corresponding - 'clocks' entry. -- #dma-cells : Must be 1. The first cell denotes the receive/transmit - request number and should be between 1 and the maximum number of - requests supported. This value corresponds to the RX/TX_REQUEST_SELECT - fields in the ADMA_CHn_CTRL register. - - -Example: - -adma: dma@702e2000 { - compatible = "nvidia,tegra210-adma"; - reg = <0x0 0x702e2000 0x0 0x2000>; - interrupt-parent = <&tegra_agic>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; - clock-names = "d_audio"; - #dma-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml new file mode 100644 index 0000000..b4e657d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Audio DMA (ADMA) controller + +description: | + The Tegra Audio DMA controller is used for transferring data + between system memory and the Audio Processing Engine (APE). + +maintainers: + - Jon Hunter + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + oneOf: + - enum: + - nvidia,tegra210-adma + - nvidia,tegra186-adma + - items: + - const: nvidia,tegra194-adma + - const: nvidia,tegra186-adma + + reg: + maxItems: 1 + + interrupts: + description: | + Should contain all of the per-channel DMA interrupts in + ascending order with respect to the DMA channel index. + + clocks: + description: Must contain one entry for the ADMA module clock + + clock-names: + const: d_audio + + "#dma-cells": + description: | + The first cell denotes the receive/transmit request number and + should be between 1 and the maximum number of requests supported. + This value corresponds to the RX/TX_REQUEST_SELECT fields in the + ADMA_CHn_CTRL register. + + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + #include + #include + + dma-controller@702e2000 { + compatible = "nvidia,tegra210-adma"; + reg = <0x702e2000 0x2000>; + interrupt-parent = <&tegra_agic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; + clock-names = "d_audio"; + #dma-cells = <1>; + }; + +... From patchwork Thu Nov 5 10:24:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sameer Pujar X-Patchwork-Id: 1394860 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=ec0vNVfB; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CRfm80H4Kz9sVT for ; Thu, 5 Nov 2020 21:25:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730068AbgKEKZK (ORCPT ); Thu, 5 Nov 2020 05:25:10 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:5888 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729944AbgKEKY5 (ORCPT ); Thu, 5 Nov 2020 05:24:57 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 05 Nov 2020 02:24:56 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 5 Nov 2020 10:24:57 +0000 Received: from audio.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 5 Nov 2020 10:24:54 +0000 From: Sameer Pujar To: , CC: , , , , , , , , , Sameer Pujar Subject: [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles Date: Thu, 5 Nov 2020 15:54:05 +0530 Message-ID: <1604571846-14037-4-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604571846-14037-1-git-send-email-spujar@nvidia.com> References: <1604571846-14037-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1604571896; bh=7YHCL0OJsQAfx9Zv1PlhR6NVOh4W6JdOVDVqiYu2yhY=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type; b=ec0vNVfBqk3IN5H1A1hOSyXF8mO3JQBOzAtEyhTzTOcx2gChLPYEk5C20/KZd8XOD 9HHDGU6yFzXrcXWK65S4lWeMtNdl1U0iH0l1ARrJeKgkyu0uw8iRApM2r74OcMS50J UGpAn3l9XOTDNVsS/N66OQsufzi2JgwbLD6x8rBEf1L6U7kg60mFfJ9NuK5zyjLbdF HkpGjzelhQtdOujNALTT1I5awMh0Pnz5NLHydQIwCDp5E/iAVketY36Pf15Tg1jmWq oklkOd66+h2vfBSeGPk82vrBWCz2jD16NY8omNQ6smUs6ppG3AR4QWGyqR17MfI2kq jw2XhNrqHKJsA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update Tegra compatibles to support newer Tegra chips and required combinations. Signed-off-by: Sameer Pujar Reviewed-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml index 0688996..614018f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml @@ -35,7 +35,6 @@ properties: - arm,gic-400 - arm,pl390 - arm,tc11mp-gic - - nvidia,tegra210-agic - qcom,msm-8660-qgic - qcom,msm-qgic2 @@ -53,6 +52,14 @@ properties: - const: brcm,brahma-b15-gic - const: arm,cortex-a15-gic + - oneOf: + - const: nvidia,tegra210-agic + - items: + - enum: + - nvidia,tegra186-agic + - nvidia,tegra194-agic + - const: nvidia,tegra210-agic + interrupt-controller: true "#address-cells": From patchwork Thu Nov 5 10:24:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sameer Pujar X-Patchwork-Id: 1394858 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=rhUmBaId; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CRfm62l4Wz9sSs for ; Thu, 5 Nov 2020 21:25:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729908AbgKEKZD (ORCPT ); Thu, 5 Nov 2020 05:25:03 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:6892 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730015AbgKEKZB (ORCPT ); Thu, 5 Nov 2020 05:25:01 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 05 Nov 2020 02:25:04 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 5 Nov 2020 10:25:00 +0000 Received: from audio.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 5 Nov 2020 10:24:57 +0000 From: Sameer Pujar To: , CC: , , , , , , , , , Sameer Pujar Subject: [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema Date: Thu, 5 Nov 2020 15:54:06 +0530 Message-ID: <1604571846-14037-5-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604571846-14037-1-git-send-email-spujar@nvidia.com> References: <1604571846-14037-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1604571904; bh=EJno3VbzOuyzb/wyka2F0PEnWEXtojA2Cq7GOlRFzzA=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type; b=rhUmBaIdGpuW7aG0n5KHFPbqvWBkqUL0QdzM7mU+61br1dUi2wDbgDnLjc3Pjkvxd ftF/9dYngokngSs9Gbuo4vVx7utmzs1943Xxh51ZRkiYmj4n9Nj3mjsIaPanhZWHNQ 6zVo976HUbW9Di5TzkblIOwyMaTtKsEtJY3mQ3aaRGXFJ1fz9TrD71qeecSxxAggmT izcU7a7XitBQfnhQ0oYrSLz1EAib36xyU59cofFj46M610ITC/DPa7Kw+Bj/nEBPNK hA7yqquWP/SpoqxAUaDUigP/LE4rcJA6UvsFVkns6lDLZ85VPbBCbe9sf2RaxZS4Iq XmfVM/2eVh1yA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move ACONNECT documentation to YAML format. Signed-off-by: Sameer Pujar --- .../bindings/bus/nvidia,tegra210-aconnect.txt | 44 ----------- .../bindings/bus/nvidia,tegra210-aconnect.yaml | 86 ++++++++++++++++++++++ 2 files changed, 86 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt create mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt deleted file mode 100644 index 3108d03..0000000 --- a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt +++ /dev/null @@ -1,44 +0,0 @@ -NVIDIA Tegra ACONNECT Bus - -The Tegra ACONNECT bus is an AXI switch which is used to connnect various -components inside the Audio Processing Engine (APE). All CPU accesses to -the APE subsystem go through the ACONNECT via an APB to AXI wrapper. - -Required properties: -- compatible: Must be "nvidia,tegra210-aconnect". -- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE), - and APE interface clock (TEGRA210_CLK_APB2APE). -- clock-names: Must contain the names "ape" and "apb2ape" for the corresponding - 'clocks' entries. -- power-domains: Must contain a phandle that points to the audio powergate - (namely 'aud') for Tegra210. -- #address-cells: The number of cells used to represent physical base addresses - in the aconnect address space. Should be 1. -- #size-cells: The number of cells used to represent the size of an address - range in the aconnect address space. Should be 1. -- ranges: Mapping of the aconnect address space to the CPU address space. - -All devices accessed via the ACONNNECT are described by child-nodes. - -Example: - - aconnect@702c0000 { - compatible = "nvidia,tegra210-aconnect"; - clocks = <&tegra_car TEGRA210_CLK_APE>, - <&tegra_car TEGRA210_CLK_APB2APE>; - clock-names = "ape", "apb2ape"; - power-domains = <&pd_audio>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; - - - child1 { - ... - }; - - child2 { - ... - }; - }; diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml new file mode 100644 index 0000000..f0161bc --- /dev/null +++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra ACONNECT Bus + +description: | + The Tegra ACONNECT bus is an AXI switch which is used to connnect various + components inside the Audio Processing Engine (APE). All CPU accesses to + the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All + devices accessed via the ACONNNECT are described by child-nodes. + +maintainers: + - Jon Hunter + +properties: + compatible: + oneOf: + - const: nvidia,tegra210-aconnect + - items: + - enum: + - nvidia,tegra186-aconnect + - nvidia,tegra194-aconnect + - const: nvidia,tegra210-aconnect + + clocks: + items: + - description: Must contain the entry for APE clock + - description: Must contain the entry for APE interface clock + + clock-names: + items: + - const: ape + - const: apb2ape + + power-domains: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^dma-controller(@[0-9a-f]+)?$": + $ref: /schemas/dma/nvidia,tegra210-adma.yaml# + "^interrupt-controller(@[0-9a-f]+)?$": + $ref: /schemas/interrupt-controller/arm,gic.yaml# + "^ahub(@[0-9a-f]+)?$": + $ref: /schemas/sound/nvidia,tegra210-ahub.yaml# + +required: + - compatible + - clocks + - clock-names + - power-domains + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + #include + + aconnect@702c0000 { + compatible = "nvidia,tegra210-aconnect"; + clocks = <&tegra_car TEGRA210_CLK_APE>, + <&tegra_car TEGRA210_CLK_APB2APE>; + clock-names = "ape", "apb2ape"; + power-domains = <&pd_audio>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x702c0000 0x702c0000 0x00040000>; + + // Child device nodes follow ... + }; + +...