From patchwork Tue Oct 27 00:16:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1388231 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CKtv70k14z9sRK for ; Tue, 27 Oct 2020 12:11:15 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Kt5A9TkJ; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4CKtv4505szDqFw for ; Tue, 27 Oct 2020 12:11:12 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::1041; helo=mail-pj1-x1041.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Kt5A9TkJ; dkim-atps=neutral Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4CKsgw2SrYzDqGF for ; Tue, 27 Oct 2020 11:16:27 +1100 (AEDT) Received: by mail-pj1-x1041.google.com with SMTP id g16so4101866pjv.3 for ; Mon, 26 Oct 2020 17:16:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=h1l3F1VibOhoNJ7TKDPTTdyw+oYKdpmWPwzj7OMrObE=; b=Kt5A9TkJZLQosYVXTS3Cuh0igFFmIize9/0iETYzSelQSWBVR0dLzGHXUI7uyfSjK/ g+HRAyEA2SzYrsNZ3C1irrq4xm7u0i3AH1TAzXCds5IFoWV9A6m2v7W54jq/GXTeBGkj +4ysh8jhvmXCPbQhoVnkrcY3iQDZMkx1XMAkwTZaXZv//JLVHtWZPid3jHswjbC+82r9 GWDq4wtmgEiLFZ7DdE0pSjVrG62YTToHXKr2rf+u7bLeDVt8xtPCjL60sswYHDpBS2k2 yFSyZUSBti4bai9Y5o93iLm55qQa0tAOQQzqS8Lu6l86V/G5WU2ZPgR1Dwh/1CvW5+Mp KVxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=h1l3F1VibOhoNJ7TKDPTTdyw+oYKdpmWPwzj7OMrObE=; b=U+LmFXuw9fPVr0VN85dyODNtpjje5tmfwN6AaZhPGjAsdKof7l0bACkkHjwvV4mk+j fnAQfYdAIsTk/w1KGUKMd2hN6Co4gJFyG/NvsjoDbOMZhS3egV6jxABOoqcmw8kQ31+r C3/DzVXI7DGU9vcjFKdnEK9C9WSAHxI6TPMdK9lRQDNgihqfd9nehk9lEBQC2RzTHlwC FaNZz26JL3XdIu+iqNGj2Yq4jkgzqT82GmT+FeAd31Kq7MSNvSEe4JdbmxPosEcQ0EHi mI1y7zTtU15xj4/srXBhrG93dnoGsZL95Tzti7I4SRn/6uesCPin413IBN668GM+i60l yKZA== X-Gm-Message-State: AOAM530GcctPmuuiC1xKYWSkWu9p9xEk1nSbq6MDpkT0NgDbJLwMBL1K KroJxcKozVBdP75+EZIcBTcKYSIrJS4= X-Google-Smtp-Source: ABdhPJzZI/yrAmfW37/TslDyMBx9dobKtkGabIKQBYnHo5sykWx6LJdhaT2U+B0jFPgjq1kYG7CFPw== X-Received: by 2002:a17:902:b18f:b029:d5:e3d3:9b87 with SMTP id s15-20020a170902b18fb02900d5e3d39b87mr251591plr.78.1603757784650; Mon, 26 Oct 2020 17:16:24 -0700 (PDT) Received: from localhost.ibm.com (123-243-71-5.static.tpgi.com.au. [123.243.71.5]) by smtp.gmail.com with ESMTPSA id y8sm12926267pfg.104.2020.10.26.17.16.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 17:16:24 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Oct 2020 11:16:09 +1100 Message-Id: <20201027001612.148724-1-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Subject: [Skiboot] [PATCH 1/4] hw/lpc: add helpers to copy in/out of fw space X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The normal LPC APIs are limited to 1/2/4 byte accesses. The existing SFC controller, mbox and HIOMAP flash drivers implement more or less the same copy loops to move data into and out of the LPC firmware space. Add a single generic helper that can replace the seperate implementations. Signed-off-by: Oliver O'Halloran Reviewed-by: Vasant Hegde --- hw/lpc.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/lpc.h | 7 +++++ 2 files changed, 81 insertions(+) diff --git a/hw/lpc.c b/hw/lpc.c index c2a07a0db5da..c7947c07fbe9 100644 --- a/hw/lpc.c +++ b/hw/lpc.c @@ -667,6 +667,80 @@ int64_t lpc_probe_read(enum OpalLPCAddressType addr_type, uint32_t addr, return __lpc_read_sanity(addr_type, addr, data, sz, true); } +int64_t lpc_fw_read(uint32_t off, void *buf, uint32_t len) +{ + int rc; + + prlog(PR_TRACE, "Reading 0x%08x bytes at FW offset 0x%08x\n", + len, off); + + while(len) { + uint32_t chunk; + uint32_t dat; + + /* XXX: make this read until it's aligned */ + if (len > 3 && !(off & 3)) { + rc = lpc_read(OPAL_LPC_FW, off, &dat, 4); + if (!rc) { + /* + * lpc_read swaps to CPU endian but it's not + * really a 32-bit value, so convert back. + */ + *(__be32 *)buf = cpu_to_be32(dat); + } + chunk = 4; + } else { + rc = lpc_read(OPAL_LPC_FW, off, &dat, 1); + if (!rc) + *(uint8_t *)buf = dat; + chunk = 1; + } + if (rc) { + prlog(PR_ERR, "lpc_read failure %d to FW 0x%08x\n", rc, off); + return rc; + } + len -= chunk; + off += chunk; + buf += chunk; + } + + return 0; +} + +int64_t lpc_fw_write(uint32_t off, const void *buf, uint32_t len) +{ + int rc; + + prlog(PR_TRACE, "Writing 0x%08x bytes at FW offset 0x%08x\n", + len, off); + + while(len) { + uint32_t chunk; + + if (len > 3 && !(off & 3)) { + /* endian swap: see lpc_window_write */ + uint32_t dat = be32_to_cpu(*(__be32 *)buf); + + rc = lpc_write(OPAL_LPC_FW, off, dat, 4); + chunk = 4; + } else { + uint8_t dat = *(uint8_t *)buf; + + rc = lpc_write(OPAL_LPC_FW, off, dat, 1); + chunk = 1; + } + if (rc) { + prlog(PR_ERR, "lpc_write failure %d to FW 0x%08x\n", rc, off); + return rc; + } + len -= chunk; + off += chunk; + buf += chunk; + } + + return 0; +} + /* * The "OPAL" variant add the emulation of 2 and 4 byte accesses using * byte accesses for IO and MEM space in order to be compatible with diff --git a/include/lpc.h b/include/lpc.h index b641aa4e6820..4d0efb8c7b55 100644 --- a/include/lpc.h +++ b/include/lpc.h @@ -102,6 +102,13 @@ extern int64_t lpc_probe_write(enum OpalLPCAddressType addr_type, uint32_t addr, extern int64_t lpc_probe_read(enum OpalLPCAddressType addr_type, uint32_t addr, uint32_t *data, uint32_t sz); +/* + * helpers for doing a bulk io to firmware space. These can be less restrictive + * since FW space generally acts like "normal memory." + */ +extern int64_t lpc_fw_read(uint32_t addr, void *buf, uint32_t sz); +extern int64_t lpc_fw_write(uint32_t addr, const void *buf, uint32_t sz); + /* Mark LPC bus as used by console */ extern void lpc_used_by_console(void); From patchwork Tue Oct 27 00:16:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1388232 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CKtvV72wyz9sRK for ; Tue, 27 Oct 2020 12:11:34 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=XCE88dHA; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4CKtvV50dPzDqDl for ; Tue, 27 Oct 2020 12:11:34 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::102a; helo=mail-pj1-x102a.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=XCE88dHA; dkim-atps=neutral Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4CKsgz0HfvzDqRj for ; Tue, 27 Oct 2020 11:16:30 +1100 (AEDT) Received: by mail-pj1-x102a.google.com with SMTP id lt2so3914244pjb.2 for ; Mon, 26 Oct 2020 17:16:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2EfO8+CYp/iM5LR+84EQI+/Ow5RTSexTSMm2qW7MUr0=; b=XCE88dHAIjPF73zY+5kn9DZeQZz/HaKfkdl67ff3BV9EePjBjlTS4RPYgdqvcv+u1d WHTm4Ml1POlCNPcyk9QgJ2etsJEdqFx16hnq6+6wFsoZIBKbbdoZ8ucsd5+jcGdUlyhz wdwWtOZCPIewGzxHJZWuvqwF64dVbnA5bUpOVOapVPqZQs/Zz5YhUafEIK8G+qWa4ReH Sr5X9RDtxI7TTra6DdTlohfD6pBxFtqt4BrvCZI3UI3yVHQDhjaInLgqayDzd2UeVcAo xmOHCKB/p3IbXsSatx9UzcnLEY+JaIxoJT9w9QlwUFH8ok1bvnDjCXFQn0PQe52TKx3x fKDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2EfO8+CYp/iM5LR+84EQI+/Ow5RTSexTSMm2qW7MUr0=; b=N+EVE/BlMCM0IhV//mET8xuGDBbpDp/3qADDKFlJn7kwXO+LR+DvE/FU9zq7vwtrV/ UUnRTjrIDbQ8rCMCzHNOt6nD5B+cy40sFatWiO83IeTpbrl6etkoBczNz2BMLrtQrkin UcaMLFaQxb+nRP49tEdes7tLlEkmG56KQQbLmNTiUfzLAqOutuNKM7CciqPuCp4Hfi1P ElWbuipRQjP+Uk778PZoL3nGTx4sUpr/c9mR3qEnJ/49xlARPvpNzT1zrB8da/rCkxGA D5B8T0ybyMgsbl6CGsY18X5Uq+iiDVbS04HEkl+jsT8JJIBAHbZxO+nQTwyqYljeC5hk jWBA== X-Gm-Message-State: AOAM531tXCLgokbFayYZoZ8TbYLGOeQsYjOgbR8MBEdHFv+gs0WAFipv 6rj8Qh5lQAVC+LAOiJ6F72o+z+GcIvU= X-Google-Smtp-Source: ABdhPJwMiaTnYjJL2LiDbUhVJJDy+lR7FmnpCm6R9ADQKWPG5tmWpXZz6phWde2bV5olSXMKGtv58g== X-Received: by 2002:a17:90a:8596:: with SMTP id m22mr18450040pjn.42.1603757786899; Mon, 26 Oct 2020 17:16:26 -0700 (PDT) Received: from localhost.ibm.com (123-243-71-5.static.tpgi.com.au. [123.243.71.5]) by smtp.gmail.com with ESMTPSA id y8sm12926267pfg.104.2020.10.26.17.16.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 17:16:26 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Oct 2020 11:16:10 +1100 Message-Id: <20201027001612.148724-2-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201027001612.148724-1-oohall@gmail.com> References: <20201027001612.148724-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 2/4] hw/ast-sfc: Use lpc fw space copy functions X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Oliver O'Halloran Reviewed-by: Vasant Hegde --- hw/ast-bmc/ast-sf-ctrl.c | 58 +++++----------------------------------- 1 file changed, 6 insertions(+), 52 deletions(-) diff --git a/hw/ast-bmc/ast-sf-ctrl.c b/hw/ast-bmc/ast-sf-ctrl.c index 03cc44318e71..fc43040f574d 100644 --- a/hw/ast-bmc/ast-sf-ctrl.c +++ b/hw/ast-bmc/ast-sf-ctrl.c @@ -71,30 +71,9 @@ static int ast_copy_to_ahb(uint32_t reg, const void *src, uint32_t len) /* SPI flash, use LPC->AHB bridge */ if ((reg >> 28) == (PNOR_AHB_ADDR >> 28)) { - uint32_t chunk, off = reg - PNOR_AHB_ADDR + pnor_lpc_offset; - int64_t rc; - - while(len) { - /* Chose access size */ - if (len > 3 && !(off & 3)) { - rc = lpc_write(OPAL_LPC_FW, off, - *(uint32_t *)src, 4); - chunk = 4; - } else { - rc = lpc_write(OPAL_LPC_FW, off, - *(uint8_t *)src, 1); - chunk = 1; - } - if (rc) { - prerror("AST_IO: lpc_write.sb failure %lld" - " to FW 0x%08x\n", rc, off); - return rc; - } - len -= chunk; - off += chunk; - src += chunk; - } - return 0; + uint32_t off = reg - PNOR_AHB_ADDR + pnor_lpc_offset; + + return lpc_fw_write(off, src, len); } /* Otherwise we don't do byte access (... yet) */ @@ -110,34 +89,9 @@ static int ast_copy_from_ahb(void *dst, uint32_t reg, uint32_t len) /* SPI flash, use LPC->AHB bridge */ if ((reg >> 28) == (PNOR_AHB_ADDR >> 28)) { - uint32_t chunk, off = reg - PNOR_AHB_ADDR + pnor_lpc_offset; - int64_t rc; - - while(len) { - uint32_t dat; - - /* Chose access size */ - if (len > 3 && !(off & 3)) { - rc = lpc_read(OPAL_LPC_FW, off, &dat, 4); - if (!rc) - *(uint32_t *)dst = dat; - chunk = 4; - } else { - rc = lpc_read(OPAL_LPC_FW, off, &dat, 1); - if (!rc) - *(uint8_t *)dst = dat; - chunk = 1; - } - if (rc) { - prerror("AST_IO: lpc_read.sb failure %lld" - " to FW 0x%08x\n", rc, off); - return rc; - } - len -= chunk; - off += chunk; - dst += chunk; - } - return 0; + uint32_t off = reg - PNOR_AHB_ADDR + pnor_lpc_offset; + + return lpc_fw_read(off, dst, len); } /* Otherwise we don't do byte access (... yet) */ prerror("AST_IO: Attempted read bytes access to %08x\n", reg); From patchwork Tue Oct 27 00:16:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1388233 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CKtvr0Dx3z9sRK for ; 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[123.243.71.5]) by smtp.gmail.com with ESMTPSA id y8sm12926267pfg.104.2020.10.26.17.16.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 17:16:28 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Oct 2020 11:16:11 +1100 Message-Id: <20201027001612.148724-3-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201027001612.148724-1-oohall@gmail.com> References: <20201027001612.148724-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 3/4] libflash/hiomap: Use lpc fw space copy functions X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Oliver O'Halloran Reviewed-by: Vasant Hegde --- libflash/ipmi-hiomap.c | 66 ++---------------------------------------- 1 file changed, 2 insertions(+), 64 deletions(-) diff --git a/libflash/ipmi-hiomap.c b/libflash/ipmi-hiomap.c index c889d6316429..93aaef45529d 100644 --- a/libflash/ipmi-hiomap.c +++ b/libflash/ipmi-hiomap.c @@ -555,45 +555,11 @@ static int lpc_window_read(struct ipmi_hiomap *ctx, uint32_t pos, void *buf, uint32_t len) { uint32_t off = ctx->current.lpc_addr + (pos - ctx->current.cur_pos); - int rc; if ((ctx->current.lpc_addr + ctx->current.size) < (off + len)) return FLASH_ERR_PARM_ERROR; - prlog(PR_TRACE, "Reading at 0x%08x for 0x%08x offset: 0x%08x\n", - pos, len, off); - - while(len) { - uint32_t chunk; - uint32_t dat; - - /* XXX: make this read until it's aligned */ - if (len > 3 && !(off & 3)) { - rc = lpc_read(OPAL_LPC_FW, off, &dat, 4); - if (!rc) { - /* - * lpc_read swaps to CPU endian but it's not - * really a 32-bit value, so convert back. - */ - *(__be32 *)buf = cpu_to_be32(dat); - } - chunk = 4; - } else { - rc = lpc_read(OPAL_LPC_FW, off, &dat, 1); - if (!rc) - *(uint8_t *)buf = dat; - chunk = 1; - } - if (rc) { - prlog(PR_ERR, "lpc_read failure %d to FW 0x%08x\n", rc, off); - return rc; - } - len -= chunk; - off += chunk; - buf += chunk; - } - - return 0; + return lpc_fw_read(off, buf, len); } static int lpc_window_write(struct ipmi_hiomap *ctx, uint32_t pos, @@ -601,7 +567,6 @@ static int lpc_window_write(struct ipmi_hiomap *ctx, uint32_t pos, { uint32_t off = ctx->current.lpc_addr + (pos - ctx->current.cur_pos); enum lpc_window_state state; - int rc; lock(&ctx->lock); state = ctx->window_state; @@ -613,34 +578,7 @@ static int lpc_window_write(struct ipmi_hiomap *ctx, uint32_t pos, if ((ctx->current.lpc_addr + ctx->current.size) < (off + len)) return FLASH_ERR_PARM_ERROR; - prlog(PR_TRACE, "Writing at 0x%08x for 0x%08x offset: 0x%08x\n", - pos, len, off); - - while(len) { - uint32_t chunk; - - if (len > 3 && !(off & 3)) { - /* endian swap: see lpc_window_write */ - uint32_t dat = be32_to_cpu(*(__be32 *)buf); - - rc = lpc_write(OPAL_LPC_FW, off, dat, 4); - chunk = 4; - } else { - uint8_t dat = *(uint8_t *)buf; - - rc = lpc_write(OPAL_LPC_FW, off, dat, 1); - chunk = 1; - } - if (rc) { - prlog(PR_ERR, "lpc_write failure %d to FW 0x%08x\n", rc, off); - return rc; - } - len -= chunk; - off += chunk; - buf += chunk; - } - - return 0; + return lpc_fw_write(off, buf, len); } /* Best-effort asynchronous event handling by blocklevel callbacks */ From patchwork Tue Oct 27 00:16:12 2020 Content-Type: text/plain; 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[123.243.71.5]) by smtp.gmail.com with ESMTPSA id y8sm12926267pfg.104.2020.10.26.17.16.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 17:16:30 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Oct 2020 11:16:12 +1100 Message-Id: <20201027001612.148724-4-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201027001612.148724-1-oohall@gmail.com> References: <20201027001612.148724-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 4/4] libflash/mbox: Use lpc fw space copy functions X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Oliver O'Halloran Reviewed-by: Vasant Hegde --- libflash/mbox-flash.c | 67 ++----------------------------------------- 1 file changed, 2 insertions(+), 65 deletions(-) diff --git a/libflash/mbox-flash.c b/libflash/mbox-flash.c index 6da77d7fc9a0..f2f808cb432e 100644 --- a/libflash/mbox-flash.c +++ b/libflash/mbox-flash.c @@ -147,79 +147,16 @@ static int lpc_window_read(struct mbox_flash_data *mbox_flash, uint32_t pos, void *buf, uint32_t len) { uint32_t off = mbox_flash->read.lpc_addr + (pos - mbox_flash->read.cur_pos); - int rc; - - prlog(PR_TRACE, "Reading at 0x%08x for 0x%08x offset: 0x%08x\n", - pos, len, off); - - while(len) { - uint32_t chunk; - uint32_t dat; - - /* XXX: make this read until it's aligned */ - if (len > 3 && !(off & 3)) { - rc = lpc_read(OPAL_LPC_FW, off, &dat, 4); - if (!rc) { - /* - * lpc_read swaps to CPU endian but it's not - * really a 32-bit value, so convert back. - */ - *(__be32 *)buf = cpu_to_be32(dat); - } - chunk = 4; - } else { - rc = lpc_read(OPAL_LPC_FW, off, &dat, 1); - if (!rc) - *(uint8_t *)buf = dat; - chunk = 1; - } - if (rc) { - prlog(PR_ERR, "lpc_read failure %d to FW 0x%08x\n", rc, off); - return rc; - } - len -= chunk; - off += chunk; - buf += chunk; - } - return 0; + return lpc_fw_read(off, buf, len); } static int lpc_window_write(struct mbox_flash_data *mbox_flash, uint32_t pos, const void *buf, uint32_t len) { uint32_t off = mbox_flash->write.lpc_addr + (pos - mbox_flash->write.cur_pos); - int rc; - - - prlog(PR_TRACE, "Writing at 0x%08x for 0x%08x offset: 0x%08x\n", - pos, len, off); - while(len) { - uint32_t chunk; - - if (len > 3 && !(off & 3)) { - /* endian swap: see lpc_window_write */ - uint32_t dat = be32_to_cpu(*(__be32 *)buf); - - rc = lpc_write(OPAL_LPC_FW, off, dat, 4); - chunk = 4; - } else { - uint8_t dat = *(uint8_t *)buf; - - rc = lpc_write(OPAL_LPC_FW, off, dat, 1); - chunk = 1; - } - if (rc) { - prlog(PR_ERR, "lpc_write failure %d to FW 0x%08x\n", rc, off); - return rc; - } - len -= chunk; - off += chunk; - buf += chunk; - } - - return 0; + return lpc_fw_write(off, buf, len); } static uint64_t mbox_flash_mask(struct mbox_flash_data *mbox_flash)