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Mon, 19 Oct 2020 12:55:23 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 01/16] include: sbi: Remove redundant includes from sbi_platform.h Date: Mon, 19 Oct 2020 18:24:38 +0530 Message-Id: <20201019125453.2460105-2-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:20 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 5af1faea-aab2-4f30-36c8-08d8742e3dc4 X-MS-TrafficTypeDiagnostic: DM6PR04MB6202: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:4125; 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This way sources requiring these headers will have to explicitly include it thereby reducing implicit includes. Signed-off-by: Anup Patel Reviewed-by: Atish Patra Reviewed-by: Alistair Francis --- include/sbi/sbi_platform.h | 4 ++-- lib/sbi/sbi_hart.c | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index 8087148..f51e36a 100644 --- a/include/sbi/sbi_platform.h +++ b/include/sbi/sbi_platform.h @@ -40,12 +40,12 @@ #ifndef __ASSEMBLY__ -#include #include #include -#include #include +struct sbi_trap_info; + /** Possible feature flags of a platform */ enum sbi_platform_features { /** Platform has timer value */ diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 6413194..55a04da 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -19,6 +19,7 @@ #include #include #include +#include extern void __sbi_expected_trap(void); extern void __sbi_expected_trap_hext(void); From patchwork Mon Oct 19 12:54:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384281 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:55:26 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 02/16] include: sbi: Remove pmp_region callbacks from sbi_platform_operations Date: Mon, 19 Oct 2020 18:24:39 +0530 Message-Id: <20201019125453.2460105-3-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:23 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 18ef457c-1916-4dac-8311-08d8742e3f98 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:1060; 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Signed-off-by: Anup Patel Reviewed-by: Atish Patra Reviewed-by: Alistair Francis --- include/sbi/sbi_platform.h | 50 -------------------------------------- lib/sbi/sbi_hart.c | 14 +---------- 2 files changed, 1 insertion(+), 63 deletions(-) diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index f51e36a..f2c3237 100644 --- a/include/sbi/sbi_platform.h +++ b/include/sbi/sbi_platform.h @@ -89,15 +89,6 @@ struct sbi_platform_operations { */ int (*misa_get_xlen)(void); - /** Get number of PMP regions for given HART */ - u32 (*pmp_region_count)(u32 hartid); - /** - * Get PMP regions details (namely: protection, base address, - * and size) for given HART - */ - int (*pmp_region_info)(u32 hartid, u32 index, ulong *prot, ulong *addr, - ulong *log2size); - /** Write a character to the platform console output */ void (*console_putc)(char ch); /** Read a character from the platform console input */ @@ -456,47 +447,6 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat) return -1; } -/** - * Get the number of PMP regions of a HART - * - * @param plat pointer to struct sbi_platform - * @param hartid HART ID - * - * @return number of PMP regions - */ -static inline u32 sbi_platform_pmp_region_count(const struct sbi_platform *plat, - u32 hartid) -{ - if (plat && sbi_platform_ops(plat)->pmp_region_count) - return sbi_platform_ops(plat)->pmp_region_count(hartid); - return 0; -} - -/** - * Get PMP regions details (namely: protection, base address, - * and size) of a HART - * - * @param plat pointer to struct sbi_platform - * @param hartid HART ID - * @param index index of PMP region for which we want details - * @param prot output pointer for PMP region protection - * @param addr output pointer for PMP region base address - * @param log2size output pointer for log-of-2 PMP region size - * - * @return 0 on success and negative error code on failure - */ -static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat, - u32 hartid, u32 index, - ulong *prot, ulong *addr, - ulong *log2size) -{ - if (plat && sbi_platform_ops(plat)->pmp_region_info) - return sbi_platform_ops(plat)->pmp_region_info(hartid, index, - prot, addr, - log2size); - return 0; -} - /** * Write a character to the platform console output * diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 55a04da..edf79b7 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -226,10 +226,8 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, static int pmp_init(struct sbi_scratch *scratch, u32 hartid) { - u32 i, pmp_idx = 0, pmp_count, count; + u32 pmp_idx = 0; unsigned long fw_start, fw_size_log2; - ulong prot, addr, log2size; - const struct sbi_platform *plat = sbi_platform_ptr(scratch); if (!sbi_hart_pmp_count(scratch)) return 0; @@ -239,16 +237,6 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid) fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL); pmp_set(pmp_idx++, 0, fw_start, fw_size_log2); - /* Platform specific PMP regions */ - count = sbi_platform_pmp_region_count(plat, hartid); - pmp_count = sbi_hart_pmp_count(scratch); - for (i = 0; i < count && pmp_idx < (pmp_count - 1); i++) { - if (sbi_platform_pmp_region_info(plat, hartid, i, &prot, &addr, - &log2size)) - continue; - pmp_set(pmp_idx++, prot, addr, log2size); - } - /* * Default PMP region for allowing S-mode and U-mode access to * memory not covered by: From patchwork Mon Oct 19 12:54:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384280 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1231::1; helo=merlin.infradead.org; envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=merlin.20170209 header.b=Vkqprz0S; dkim=permerror header.d=wdc.com header.i=@wdc.com header.a=rsa-sha1 header.s=dkim.wdc.com header.b=FjUbfHqs; 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Mon, 19 Oct 2020 12:55:29 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 03/16] lib: sbi: Configure PMP late in coldboot and warmboot path Date: Mon, 19 Oct 2020 18:24:40 +0530 Message-Id: <20201019125453.2460105-4-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:26 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 9c4b84ae-204f-4d6a-28cc-08d8742e414e X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:8273; 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Eventually, this enable us to configure PMP totally based on OpenSBI domain where OpenSBI domains can be parsed from device-tree in any of the platform operations except platform_final_init(). Signed-off-by: Anup Patel Reviewed-by: Atish Patra Reviewed-by: Alistair Francis --- include/sbi/sbi_hart.h | 1 + lib/sbi/sbi_hart.c | 4 ++-- lib/sbi/sbi_init.c | 8 ++++++++ 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 0ba68f0..9207f4c 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -45,6 +45,7 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch); int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr, unsigned long mode, unsigned long attr); +int sbi_hart_pmp_configure(struct sbi_scratch *scratch); bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature); void sbi_hart_get_features_str(struct sbi_scratch *scratch, char *features_str, int nfstr); diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index edf79b7..7244f1c 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -224,7 +224,7 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, return SBI_OK; } -static int pmp_init(struct sbi_scratch *scratch, u32 hartid) +int sbi_hart_pmp_configure(struct sbi_scratch *scratch) { u32 pmp_idx = 0; unsigned long fw_start, fw_size_log2; @@ -462,7 +462,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot) if (rc) return rc; - return pmp_init(scratch, hartid); + return 0; } void __attribute__((noreturn)) sbi_hart_hang(void) diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c index 65d81ba..85a5f13 100644 --- a/lib/sbi/sbi_init.c +++ b/lib/sbi/sbi_init.c @@ -210,6 +210,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid) if (rc) sbi_hart_hang(); + rc = sbi_hart_pmp_configure(scratch); + if (rc) + sbi_hart_hang(); + rc = sbi_platform_final_init(plat, TRUE); if (rc) sbi_hart_hang(); @@ -266,6 +270,10 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid) if (rc) sbi_hart_hang(); + rc = sbi_hart_pmp_configure(scratch); + if (rc) + sbi_hart_hang(); + rc = sbi_platform_final_init(plat, FALSE); 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Mon, 19 Oct 2020 12:55:31 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 04/16] lib: sbi: Remove redundant hartid parameter from sbi_hart_init() Date: Mon, 19 Oct 2020 18:24:41 +0530 Message-Id: <20201019125453.2460105-5-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:29 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 8bbfc341-8507-4092-bb11-08d8742e42e9 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:2512; 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Signed-off-by: Anup Patel Reviewed-by: Atish Patra Reviewed-by: Alistair Francis --- include/sbi/sbi_hart.h | 2 +- lib/sbi/sbi_hart.c | 14 +++++++------- lib/sbi/sbi_init.c | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 9207f4c..2efe44d 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -27,7 +27,7 @@ enum sbi_hart_features { struct sbi_scratch; -int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot); +int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot); extern void (*sbi_hart_expected_trap)(void); static inline ulong sbi_hart_expected_trap_addr(void) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 7244f1c..88ffab0 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -33,7 +33,7 @@ struct hart_features { }; static unsigned long hart_features_offset; -static void mstatus_init(struct sbi_scratch *scratch, u32 hartid) +static void mstatus_init(struct sbi_scratch *scratch) { unsigned long mstatus_val = 0; @@ -62,7 +62,7 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid) csr_write(CSR_SATP, 0); } -static int fp_init(u32 hartid) +static int fp_init(struct sbi_scratch *scratch) { #ifdef __riscv_flen int i; @@ -83,7 +83,7 @@ static int fp_init(u32 hartid) return 0; } -static int delegate_traps(struct sbi_scratch *scratch, u32 hartid) +static int delegate_traps(struct sbi_scratch *scratch) { const struct sbi_platform *plat = sbi_platform_ptr(scratch); unsigned long interrupts, exceptions; @@ -435,7 +435,7 @@ __mhpm_skip: hfeatures->features |= SBI_HART_HAS_TIME; } -int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot) +int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot) { int rc; @@ -452,13 +452,13 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot) hart_detect_features(scratch); - mstatus_init(scratch, hartid); + mstatus_init(scratch); - rc = fp_init(hartid); + rc = fp_init(scratch); if (rc) return rc; - rc = delegate_traps(scratch, hartid); + rc = delegate_traps(scratch); if (rc) return rc; diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c index 85a5f13..5cedb15 100644 --- a/lib/sbi/sbi_init.c +++ b/lib/sbi/sbi_init.c @@ -182,7 +182,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid) if (rc) sbi_hart_hang(); - rc = sbi_hart_init(scratch, hartid, TRUE); + rc = sbi_hart_init(scratch, TRUE); if (rc) sbi_hart_hang(); @@ -250,7 +250,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid) if (rc) sbi_hart_hang(); - rc = sbi_hart_init(scratch, hartid, FALSE); + rc = sbi_hart_init(scratch, FALSE); if (rc) sbi_hart_hang(); From patchwork Mon Oct 19 12:54:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384283 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1231::1; 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Mon, 19 Oct 2020 12:55:34 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 05/16] include: sbi: Make hartmask pointer const in sbi_hartmask_test_hart() Date: Mon, 19 Oct 2020 18:24:42 +0530 Message-Id: <20201019125453.2460105-6-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:31 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: cdf41b7e-0d19-4510-7f94-08d8742e449a X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:2803; 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Signed-off-by: Anup Patel Reviewed-by: Atish Patra Reviewed-by: Alistair Francis --- include/sbi/sbi_hartmask.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/sbi/sbi_hartmask.h b/include/sbi/sbi_hartmask.h index 77e42cb..f1cef0c 100644 --- a/include/sbi/sbi_hartmask.h +++ b/include/sbi/sbi_hartmask.h @@ -67,7 +67,7 @@ static inline void sbi_hartmask_clear_hart(u32 h, struct sbi_hartmask *m) * @param h HART id to test * @param m the hartmask pointer */ -static inline int sbi_hartmask_test_hart(u32 h, struct sbi_hartmask *m) +static inline int sbi_hartmask_test_hart(u32 h, const struct sbi_hartmask *m) { if (h < SBI_HARTMASK_MAX_BITS) return __test_bit(h, m->bits); From patchwork Mon Oct 19 12:54:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384284 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:55:37 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 06/16] lib: sbi: Add initial domain support Date: Mon, 19 Oct 2020 18:24:43 +0530 Message-Id: <20201019125453.2460105-7-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:35 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: ff86d16c-8b02-408b-0e8e-08d8742e468e X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:6790; 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The OpenSBI domains support will allow OpenSBI platforms and previous booting stage (i.e. U-Boot SPL, Coreboot, etc) to partition a system into multiple domains where each domain will run it's own software. For inter-domain isolation, OpenSBI will eventually use various HW features such as PMP, ePMP, IOPMP, SiFive shield, etc but initial implementation only use HW PMP support. This patch provides initial implementation of OpenSBI domains where we have a root/default domain and OpenSBI platforms can provide non-root/custom domains using domain_get() callback. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis Reviewed-by: Atish Patra --- include/sbi/sbi_domain.h | 147 ++++++++++++++ include/sbi/sbi_platform.h | 20 ++ lib/sbi/objects.mk | 1 + lib/sbi/sbi_domain.c | 380 +++++++++++++++++++++++++++++++++++++ lib/sbi/sbi_init.c | 20 ++ 5 files changed, 568 insertions(+) create mode 100644 include/sbi/sbi_domain.h create mode 100644 lib/sbi/sbi_domain.c diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h new file mode 100644 index 0000000..4bb08dc --- /dev/null +++ b/include/sbi/sbi_domain.h @@ -0,0 +1,147 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel + */ + +#ifndef __SBI_DOMAIN_H__ +#define __SBI_DOMAIN_H__ + +#include +#include + +struct sbi_scratch; + +/** Domain access types */ +enum sbi_domain_access { + SBI_DOMAIN_READ = (1UL << 0), + SBI_DOMAIN_WRITE = (1UL << 1), + SBI_DOMAIN_EXECUTE = (1UL << 2), + SBI_DOMAIN_MMIO = (1UL << 3) +}; + +/** Representation of OpenSBI domain memory region */ +struct sbi_domain_memregion { + /** + * Size of memory region as power of 2 + * It has to be minimum 3 and maximum __riscv_xlen + */ + unsigned long order; + /** + * Base address of memory region + * It must be 2^order aligned address + */ + unsigned long base; + /** Flags representing memory region attributes */ +#define SBI_DOMAIN_MEMREGION_READABLE (1UL << 0) +#define SBI_DOMAIN_MEMREGION_WRITEABLE (1UL << 1) +#define SBI_DOMAIN_MEMREGION_EXECUTABLE (1UL << 2) +#define SBI_DOMAIN_MEMREGION_MMIO (1UL << 3) +#define SBI_DOMAIN_MEMREGION_MMODE (1UL << 4) + unsigned long flags; +}; + +/** Maximum number of domains */ +#define SBI_DOMAIN_MAX_INDEX 32 + +/** Representation of OpenSBI domain */ +struct sbi_domain { + /** + * Logical index of this domain + * Note: This set by sbi_domain_finalize() in the coldboot path + */ + u32 index; + /** + * HARTs assigned to this domain + * Note: This set by sbi_domain_init() and sbi_domain_finalize() + * in the coldboot path + */ + struct sbi_hartmask assigned_harts; + /** Name of this domain */ + char name[64]; + /** Possible HARTs in this domain */ + const struct sbi_hartmask *possible_harts; + /** Array of memory regions terminated by a region with order zero */ + struct sbi_domain_memregion *regions; + /** HART id of the HART booting this domain */ + u32 boot_hartid; + /** Arg1 (or 'a1' register) of next booting stage for this domain */ + unsigned long next_arg1; + /** Address of next booting stage for this domain */ + unsigned long next_addr; + /** Privilege mode of next booting stage for this domain */ + unsigned long next_mode; + /** Is domain allowed to reset the system */ + bool system_reset_allowed; +}; + +/** HART id to domain table */ +extern struct sbi_domain *hartid_to_domain_table[]; + +/** Get pointer to sbi_domain from HART id */ +#define sbi_hartid_to_domain(__hartid) \ + hartid_to_domain_table[__hartid] + +/** Get pointer to sbi_domain for current HART */ +#define sbi_domain_thishart_ptr() \ + sbi_hartid_to_domain(current_hartid()) + +/** Index to domain table */ +extern struct sbi_domain *domidx_to_domain_table[]; + +/** Get pointer to sbi_domain from index */ +#define sbi_index_to_domain(__index) \ + domidx_to_domain_table[__index] + +/** Iterate over each domain */ +#define sbi_domain_for_each(__i, __d) \ + for ((__i) = 0; ((__d) = sbi_index_to_domain(__i)); (__i)++) + +/** Iterate over each memory region of a domain */ +#define sbi_domain_for_each_memregion(__d, __r) \ + for ((__r) = (__d)->regions; (__r)->order; (__r)++) + +/** + * Check whether given HART is assigned to specified domain + * @param dom pointer to domain + * @param hartid the HART ID + * @return TRUE if HART is assigned to domain otherwise FALSE + */ +bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid); + +/** + * Get ulong assigned HART mask for given domain and HART base ID + * @param dom pointer to domain + * @param hbase the HART base ID + * @return ulong possible HART mask + * Note: the return ulong mask will be set to zero on failure. + */ +ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom, + ulong hbase); + +/** Initialize a domain memory region as firmware region */ +void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg); + +/** + * Check whether we can access specified address for given mode and + * memory region flags under a domain + * @param dom pointer to domain + * @param addr the address to be checked + * @param mode the privilege mode of access + * @param access_flags bitmask of domain access types (enum sbi_domain_access) + * @return TRUE if access allowed otherwise FALSE + */ +bool sbi_domain_check_addr(const struct sbi_domain *dom, + unsigned long addr, unsigned long mode, + unsigned long access_flags); + +/** Finalize domain tables and startup non-root domains */ +int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid); + +/** Initialize domains */ +int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid); + +#endif diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index f2c3237..e1355d8 100644 --- a/include/sbi/sbi_platform.h +++ b/include/sbi/sbi_platform.h @@ -44,6 +44,7 @@ #include #include +struct sbi_domain; struct sbi_trap_info; /** Possible feature flags of a platform */ @@ -89,6 +90,9 @@ struct sbi_platform_operations { */ int (*misa_get_xlen)(void); + /** Get domain pointer for given HART id */ + struct sbi_domain *(*domain_get)(u32 hartid); + /** Write a character to the platform console output */ void (*console_putc)(char ch); /** Read a character from the platform console input */ @@ -447,6 +451,22 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat) return -1; } +/** + * Get domain pointer for given HART + * + * @param plat pointer to struct sbi_platform + * @param hartid shorthand letter for CPU extensions + * + * @return non-NULL domain pointer on success and NULL on failure + */ +static inline struct sbi_domain *sbi_platform_domain_get( + const struct sbi_platform *plat, u32 hartid) +{ + if (plat && sbi_platform_ops(plat)->domain_get) + return sbi_platform_ops(plat)->domain_get(hartid); + return NULL; +} + /** * Write a character to the platform console output * diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk index fa808a0..6f2c06f 100644 --- a/lib/sbi/objects.mk +++ b/lib/sbi/objects.mk @@ -15,6 +15,7 @@ libsbi-objs-y += riscv_locks.o libsbi-objs-y += sbi_bitmap.o libsbi-objs-y += sbi_bitops.o libsbi-objs-y += sbi_console.o +libsbi-objs-y += sbi_domain.o libsbi-objs-y += sbi_ecall.o libsbi-objs-y += sbi_ecall_base.o libsbi-objs-y += sbi_ecall_hsm.o diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c new file mode 100644 index 0000000..ed0053f --- /dev/null +++ b/lib/sbi/sbi_domain.c @@ -0,0 +1,380 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct sbi_domain *hartid_to_domain_table[SBI_HARTMASK_MAX_BITS] = { 0 }; +struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX] = { 0 }; + +static u32 domain_count = 0; + +static struct sbi_hartmask root_hmask = { 0 }; + +#define ROOT_FW_REGION 0 +#define ROOT_ALL_REGION 1 +#define ROOT_END_REGION 2 +static struct sbi_domain_memregion root_memregs[ROOT_END_REGION + 1] = { 0 }; + +static struct sbi_domain root = { + .name = "root", + .possible_harts = &root_hmask, + .regions = root_memregs, + .system_reset_allowed = TRUE, +}; + +bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid) +{ + if (dom) + return sbi_hartmask_test_hart(hartid, &dom->assigned_harts); + + return FALSE; +} + +ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom, + ulong hbase) +{ + ulong ret, bword, boff; + + if (!dom) + return 0; + + bword = BIT_WORD(hbase); + boff = BIT_WORD_OFFSET(hbase); + + ret = sbi_hartmask_bits(&dom->assigned_harts)[bword++] >> boff; + if (boff && bword < BIT_WORD(SBI_HARTMASK_MAX_BITS)) { + ret |= (sbi_hartmask_bits(&dom->assigned_harts)[bword] & + (BIT(boff) - 1UL)) << (BITS_PER_LONG - boff); + } + + return ret; +} + +void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg) +{ + if (!reg) + return; + + sbi_memcpy(reg, &root_memregs[ROOT_FW_REGION], sizeof(*reg)); +} + +bool sbi_domain_check_addr(const struct sbi_domain *dom, + unsigned long addr, unsigned long mode, + unsigned long access_flags) +{ + bool mmio = FALSE; + struct sbi_domain_memregion *reg; + unsigned long rstart, rend, rflags, rwx = 0; + + if (!dom) + return FALSE; + + if (access_flags & SBI_DOMAIN_READ) + rwx |= SBI_DOMAIN_MEMREGION_READABLE; + if (access_flags & SBI_DOMAIN_WRITE) + rwx |= SBI_DOMAIN_MEMREGION_WRITEABLE; + if (access_flags & SBI_DOMAIN_EXECUTE) + rwx |= SBI_DOMAIN_MEMREGION_EXECUTABLE; + if (access_flags & SBI_DOMAIN_MMIO) + mmio = TRUE; + + sbi_domain_for_each_memregion(dom, reg) { + rflags = reg->flags; + if (mode == PRV_M && !(rflags & SBI_DOMAIN_MEMREGION_MMODE)) + continue; + + rstart = reg->base; + rend = (reg->order < __riscv_xlen) ? + rstart + ((1UL << reg->order) - 1) : -1UL; + if (rstart <= addr && addr <= rend) { + if ((mmio && !(rflags & SBI_DOMAIN_MEMREGION_MMIO)) || + (!mmio && (rflags & SBI_DOMAIN_MEMREGION_MMIO))) + return FALSE; + return ((rflags & rwx) == rwx) ? TRUE : FALSE; + } + } + + return (mode == PRV_M) ? TRUE : FALSE; +} + +/* Check if region comply with constraints */ +static bool is_region_valid(const struct sbi_domain_memregion *reg) +{ + if (reg->order < 3 || __riscv_xlen < reg->order) + return FALSE; + + if (reg->base & (BIT(reg->order) - 1)) + return FALSE; + + return TRUE; +} + +/** Check if regionA is sub-region of regionB */ +static bool is_region_subset(const struct sbi_domain_memregion *regA, + const struct sbi_domain_memregion *regB) +{ + ulong regA_start = regA->base; + ulong regA_end = regA->base + (BIT(regA->order) - 1); + ulong regB_start = regB->base; + ulong regB_end = regB->base + (BIT(regA->order) - 1); + + if ((regB_start <= regA_start) && + (regA_start < regB_end) && + (regB_start < regA_end) && + (regA_end <= regB_end)) + return TRUE; + + return FALSE; +} + +/** Check if regionA conflicts regionB */ +static bool is_region_conflict(const struct sbi_domain_memregion *regA, + const struct sbi_domain_memregion *regB) +{ + if ((is_region_subset(regA, regB) || is_region_subset(regB, regA)) && + regA->flags == regB->flags) + return TRUE; + + return FALSE; +} + +/** Check if regionA should be placed before regionB */ +static bool is_region_before(const struct sbi_domain_memregion *regA, + const struct sbi_domain_memregion *regB) +{ + if (regA->order < regB->order) + return TRUE; + + if ((regA->order == regB->order) && + (regA->base < regB->base)) + return TRUE; + + return FALSE; +} + +static int sanitize_domain(const struct sbi_platform *plat, + struct sbi_domain *dom) +{ + u32 i, j, count; + bool have_fw_reg; + struct sbi_domain_memregion treg, *reg, *reg1; + + /* Check possible HARTs */ + if (!dom->possible_harts) + return SBI_EINVAL; + sbi_hartmask_for_each_hart(i, dom->possible_harts) { + if (sbi_platform_hart_invalid(plat, i)) + return SBI_EINVAL; + }; + + /* Check memory regions */ + if (!dom->regions) + return SBI_EINVAL; + sbi_domain_for_each_memregion(dom, reg) { + if (!is_region_valid(reg)) + return SBI_EINVAL; + } + + /* Count memory regions and check presence of firmware region */ + count = 0; + have_fw_reg = FALSE; + sbi_domain_for_each_memregion(dom, reg) { + if (reg->order == root_memregs[ROOT_FW_REGION].order && + reg->base == root_memregs[ROOT_FW_REGION].base && + reg->flags == root_memregs[ROOT_FW_REGION].flags) + have_fw_reg = TRUE; + count++; + } + if (!have_fw_reg) + return SBI_EINVAL; + + /* Sort the memory regions */ + for (i = 0; i < (count - 1); i++) { + reg = &dom->regions[i]; + for (j = i + 1; j < count; j++) { + reg1 = &dom->regions[j]; + + if (is_region_conflict(reg1, reg)) + return SBI_EINVAL; + + if (!is_region_before(reg1, reg)) + continue; + + sbi_memcpy(&treg, reg1, sizeof(treg)); + sbi_memcpy(reg1, reg, sizeof(treg)); + sbi_memcpy(reg, &treg, sizeof(treg)); + } + } + + /* + * We don't need to check boot HART id of domain because if boot + * HART id is not possible/assigned to this domain then it won't + * be started at boot-time by sbi_domain_finalize(). + */ + + /* + * Check next mode + * + * We only allow next mode to be S-mode or U-mode.so that we can + * protect M-mode context and enforce checks on memory accesses. + */ + if (dom->next_mode != PRV_S && + dom->next_mode != PRV_U) + return SBI_EINVAL; + + /* Check next address and next mode*/ + if (!sbi_domain_check_addr(dom, dom->next_addr, dom->next_mode, + SBI_DOMAIN_EXECUTE)) + return SBI_EINVAL; + + return 0; +} + +int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid) +{ + int rc; + u32 i, j, dhart; + bool dom_exists; + struct sbi_domain *dom, *tdom; + const struct sbi_platform *plat = sbi_platform_ptr(scratch); + + /* Discover domains */ + for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) { + /* Ignore invalid HART */ + if (sbi_platform_hart_invalid(plat, i)) + continue; + + /* Get domain assigned to HART */ + dom = sbi_platform_domain_get(plat, i); + if (!dom) + continue; + + /* Check if domain already discovered */ + dom_exists = FALSE; + sbi_domain_for_each(j, tdom) { + if (tdom == dom) { + dom_exists = TRUE; + break; + } + } + + /* Newly discovered domain */ + if (!dom_exists) { + /* + * Ensure that we have room for Domain Index to + * HART ID mapping + */ + if (domain_count <= SBI_DOMAIN_MAX_INDEX) + return SBI_ENOSPC; + + /* Sanitize discovered domain */ + rc = sanitize_domain(plat, dom); + if (rc) + return rc; + + /* Assign index to domain */ + dom->index = domain_count++; + domidx_to_domain_table[dom->index] = dom; + + /* Clear assigned HARTs of domain */ + sbi_hartmask_clear_all(&dom->assigned_harts); + } + + /* Assign domain to HART if HART is a possible HART */ + if (sbi_hartmask_test_hart(i, dom->possible_harts)) { + tdom = hartid_to_domain_table[i]; + if (tdom) + sbi_hartmask_clear_hart(i, + &tdom->assigned_harts); + hartid_to_domain_table[i] = dom; + sbi_hartmask_set_hart(i, &dom->assigned_harts); + } + } + + /* Startup boot HART of domains */ + sbi_domain_for_each(i, dom) { + /* Domain boot HART */ + dhart = dom->boot_hartid; + + /* Ignore if boot HART not possible for this domain */ + if (!sbi_hartmask_test_hart(i, dom->possible_harts)) + continue; + + /* Ignore if boot HART assigned different domain */ + if (sbi_hartid_to_domain(dhart) != dom || + !sbi_hartmask_test_hart(i, &dom->assigned_harts)) + continue; + + /* Startup boot HART of domain */ + if (dhart == cold_hartid) { + scratch->next_addr = dom->next_addr; + scratch->next_mode = dom->next_mode; + scratch->next_arg1 = dom->next_arg1; + } else { + rc = sbi_hsm_hart_start(scratch, dhart, dom->next_addr, + dom->next_mode, dom->next_arg1); + if (rc) + return rc; + } + } + + return 0; +} + +int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid) +{ + u32 i; + const struct sbi_platform *plat = sbi_platform_ptr(scratch); + + /* Root domain firmware memory region */ + root_memregs[ROOT_FW_REGION].order = log2roundup(scratch->fw_size); + root_memregs[ROOT_FW_REGION].base = scratch->fw_start & + ~((1UL << root_memregs[0].order) - 1UL); + root_memregs[ROOT_FW_REGION].flags = 0; + + /* Root domain allow everything memory region */ + root_memregs[ROOT_ALL_REGION].order = __riscv_xlen; + root_memregs[ROOT_ALL_REGION].base = 0; + root_memregs[ROOT_ALL_REGION].flags = (SBI_DOMAIN_MEMREGION_READABLE | + SBI_DOMAIN_MEMREGION_WRITEABLE | + SBI_DOMAIN_MEMREGION_EXECUTABLE); + + /* Root domain memory region end */ + root_memregs[ROOT_END_REGION].order = 0; + + /* Root domain boot HART id is same as coldboot HART id */ + root.boot_hartid = cold_hartid; + + /* Root domain next booting stage details */ + root.next_arg1 = scratch->next_arg1; + root.next_addr = scratch->next_addr; + root.next_mode = scratch->next_mode; + + /* Select root domain for all valid HARTs */ + for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) { + if (sbi_platform_hart_invalid(plat, i)) + continue; + sbi_hartmask_set_hart(i, &root_hmask); + hartid_to_domain_table[i] = &root; + sbi_hartmask_set_hart(i, &root.assigned_harts); + } + + /* Set root domain index */ + root.index = domain_count++; + domidx_to_domain_table[root.index] = &root; + + return 0; +} diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c index 5cedb15..406cb3f 100644 --- a/lib/sbi/sbi_init.c +++ b/lib/sbi/sbi_init.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -169,6 +170,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid) if (rc) sbi_hart_hang(); + /* Note: This has to be second thing in coldboot init sequence */ + rc = sbi_domain_init(scratch, hartid); + if (rc) + sbi_hart_hang(); + init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__, "INIT_COUNT"); if (!init_count_offset) @@ -210,10 +216,24 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid) if (rc) sbi_hart_hang(); + /* + * Note: Finalize domains after HSM initialization so that we + * can startup non-root domains. + * Note: Finalize domains before HART PMP configuration so + * that we use correct domain for configuring PMP. + */ + rc = sbi_domain_finalize(scratch, hartid); + if (rc) + sbi_hart_hang(); + rc = sbi_hart_pmp_configure(scratch); if (rc) sbi_hart_hang(); + /* + * Note: Platform final initialization should be last so that + * it sees correct domain assignment and PMP configuration. + */ rc = sbi_platform_final_init(plat, TRUE); if (rc) sbi_hart_hang(); From patchwork Mon Oct 19 12:54:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384286 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:55:41 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 07/16] lib: sbi: Extend sbi_hsm_hart_started_mask() for domains Date: Mon, 19 Oct 2020 18:24:44 +0530 Message-Id: <20201019125453.2460105-8-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:38 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 05edada9-c8d3-4e42-81d3-08d8742e4862 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:1284; 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Further, the sbi_hsm_hart_started_mask() depends on sbi_hsm_hart_get_state() which also should return HART state under specified domain. This patch updates both sbi_hsm_hart_started_mask() and sbi_hsm_hart_get_state() as-per above. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- include/sbi/sbi_hsm.h | 7 ++++--- lib/sbi/sbi_ecall_hsm.c | 4 +++- lib/sbi/sbi_ecall_legacy.c | 4 +++- lib/sbi/sbi_hsm.c | 17 ++++++++++------- lib/sbi/sbi_ipi.c | 6 ++++-- lib/sbi/sbi_system.c | 4 +++- 6 files changed, 27 insertions(+), 15 deletions(-) diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h index 18d129b..296b267 100644 --- a/include/sbi/sbi_hsm.h +++ b/include/sbi/sbi_hsm.h @@ -19,6 +19,7 @@ #define SBI_HART_STARTED 3 #define SBI_HART_UNKNOWN 4 +struct sbi_domain; struct sbi_scratch; int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot); @@ -27,10 +28,10 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch); int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid, ulong saddr, ulong smode, ulong priv); int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow); -int sbi_hsm_hart_get_state(u32 hartid); +int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid); int sbi_hsm_hart_state_to_status(int state); -bool sbi_hsm_hart_started(u32 hartid); -int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask); +int sbi_hsm_hart_started_mask(const struct sbi_domain *dom, + ulong hbase, ulong *out_hmask); void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid); #endif diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c index 992c93a..3698a41 100644 --- a/lib/sbi/sbi_ecall_hsm.c +++ b/lib/sbi/sbi_ecall_hsm.c @@ -7,6 +7,7 @@ * Atish Patra */ +#include #include #include #include @@ -34,7 +35,8 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid, ret = sbi_hsm_hart_stop(scratch, TRUE); break; case SBI_EXT_HSM_HART_GET_STATUS: - hstate = sbi_hsm_hart_get_state(args[0]); + hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(), + args[0]); ret = sbi_hsm_hart_state_to_status(hstate); break; default: diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c index 3bfe749..909cbe3 100644 --- a/lib/sbi/sbi_ecall_legacy.c +++ b/lib/sbi/sbi_ecall_legacy.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -33,7 +34,8 @@ static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask, if (uptrap->cause) return SBI_ETRAP; } else { - sbi_hsm_hart_started_mask(0, &mask); + sbi_hsm_hart_started_mask(sbi_domain_thishart_ptr(), + 0, &mask); } *hmask = mask; diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c index 8c1b7b0..65e7f3d 100644 --- a/lib/sbi/sbi_hsm.c +++ b/lib/sbi/sbi_hsm.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -56,13 +57,13 @@ int sbi_hsm_hart_state_to_status(int state) return ret; } -int sbi_hsm_hart_get_state(u32 hartid) +int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid) { struct sbi_hsm_data *hdata; struct sbi_scratch *scratch; scratch = sbi_hartid_to_scratch(hartid); - if (!scratch) + if (!scratch || !sbi_domain_is_assigned_hart(dom, hartid)) return SBI_HART_UNKNOWN; hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset); @@ -70,9 +71,9 @@ int sbi_hsm_hart_get_state(u32 hartid) return atomic_read(&hdata->state); } -bool sbi_hsm_hart_started(u32 hartid) +static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid) { - if (sbi_hsm_hart_get_state(hartid) == SBI_HART_STARTED) + if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HART_STARTED) return TRUE; else return FALSE; @@ -80,12 +81,14 @@ bool sbi_hsm_hart_started(u32 hartid) /** * Get ulong HART mask for given HART base ID + * @param dom the domain to be used for output HART mask * @param hbase the HART base ID * @param out_hmask the output ulong HART mask * @return 0 on success and SBI_Exxx (< 0) on failure * Note: the output HART mask will be set to zero on failure as well. */ -int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask) +int sbi_hsm_hart_started_mask(const struct sbi_domain *dom, + ulong hbase, ulong *out_hmask) { ulong i; ulong hcount = sbi_scratch_last_hartid() + 1; @@ -97,7 +100,7 @@ int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask) hcount = BITS_PER_LONG; for (i = hbase; i < hcount; i++) { - if (sbi_hsm_hart_get_state(i) == SBI_HART_STARTED) + if (sbi_hsm_hart_get_state(dom, i) == SBI_HART_STARTED) *out_hmask |= 1UL << (i - hbase); } @@ -259,7 +262,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow) struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset); - if (!sbi_hsm_hart_started(hartid)) + if (!sbi_hsm_hart_started(sbi_domain_thishart_ptr(), hartid)) return SBI_EINVAL; oldstate = atomic_cmpxchg(&hdata->state, SBI_HART_STARTED, diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c index a27dea0..4347832 100644 --- a/lib/sbi/sbi_ipi.c +++ b/lib/sbi/sbi_ipi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -77,10 +78,11 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data) { int rc; ulong i, m; + struct sbi_domain *dom = sbi_domain_thishart_ptr(); struct sbi_scratch *scratch = sbi_scratch_thishart_ptr(); if (hbase != -1UL) { - rc = sbi_hsm_hart_started_mask(hbase, &m); + rc = sbi_hsm_hart_started_mask(dom, hbase, &m); if (rc) return rc; m &= hmask; @@ -92,7 +94,7 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data) } } else { hbase = 0; - while (!sbi_hsm_hart_started_mask(hbase, &m)) { + while (!sbi_hsm_hart_started_mask(dom, hbase, &m)) { /* Send IPIs */ for (i = hbase; m; i++, m >>= 1) { if (m & 1UL) diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c index 6f7be14..a938003 100644 --- a/lib/sbi/sbi_system.c +++ b/lib/sbi/sbi_system.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -21,10 +22,11 @@ void __noreturn sbi_system_reset(u32 platform_reset_type) { ulong hbase = 0, hmask; u32 cur_hartid = current_hartid(); + struct sbi_domain *dom = sbi_domain_thishart_ptr(); struct sbi_scratch *scratch = sbi_scratch_thishart_ptr(); /* Send HALT IPI to every hart other than the current hart */ - while (!sbi_hsm_hart_started_mask(hbase, &hmask)) { + while (!sbi_hsm_hart_started_mask(dom, hbase, &hmask)) { if (hbase <= cur_hartid) hmask &= ~(1UL << (cur_hartid - hbase)); if (hmask) From patchwork Mon Oct 19 12:54:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384285 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:55:44 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 08/16] lib: sbi: Extend sbi_hsm_hart_start() for domains Date: Mon, 19 Oct 2020 18:24:45 +0530 Message-Id: <20201019125453.2460105-9-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:41 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 63e6318a-dba1-48da-4621-08d8742e4a47 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:2582; 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This will help ensure that HART A can start HART B only if both HARTs A and B belong to the same domain. We also have a special case when we bring-up boot HART of non-root domains in sbi_domain_finalize() where we should skip domain checks in sbi_hsm_hart_start(). To achieve this, sbi_hsm_hart_start() should do domain checks only when domain parameter is non-NULL. This patch extends sbi_hsm_hart_start() as-per above. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- include/sbi/sbi_hsm.h | 5 +++-- lib/sbi/sbi_domain.c | 6 ++++-- lib/sbi/sbi_ecall_hsm.c | 4 ++-- lib/sbi/sbi_hsm.c | 16 ++++++++-------- 4 files changed, 17 insertions(+), 14 deletions(-) diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h index 296b267..4823383 100644 --- a/include/sbi/sbi_hsm.h +++ b/include/sbi/sbi_hsm.h @@ -25,8 +25,9 @@ struct sbi_scratch; int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot); void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch); -int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid, - ulong saddr, ulong smode, ulong priv); +int sbi_hsm_hart_start(struct sbi_scratch *scratch, + const struct sbi_domain *dom, + u32 hartid, ulong saddr, ulong smode, ulong priv); int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow); int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid); int sbi_hsm_hart_state_to_status(int state); diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c index ed0053f..2b6fa79 100644 --- a/lib/sbi/sbi_domain.c +++ b/lib/sbi/sbi_domain.c @@ -324,8 +324,10 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid) scratch->next_mode = dom->next_mode; scratch->next_arg1 = dom->next_arg1; } else { - rc = sbi_hsm_hart_start(scratch, dhart, dom->next_addr, - dom->next_mode, dom->next_arg1); + rc = sbi_hsm_hart_start(scratch, NULL, dhart, + dom->next_addr, + dom->next_mode, + dom->next_arg1); if (rc) return rc; } diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c index 3698a41..376740c 100644 --- a/lib/sbi/sbi_ecall_hsm.c +++ b/lib/sbi/sbi_ecall_hsm.c @@ -28,8 +28,8 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid, case SBI_EXT_HSM_HART_START: smode = csr_read(CSR_MSTATUS); smode = (smode & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT; - ret = sbi_hsm_hart_start(scratch, args[0], args[1], - smode, args[2]); + ret = sbi_hsm_hart_start(scratch, sbi_domain_thishart_ptr(), + args[0], args[1], smode, args[2]); break; case SBI_EXT_HSM_HART_STOP: ret = sbi_hsm_hart_stop(scratch, TRUE); diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c index 65e7f3d..8ecf90f 100644 --- a/lib/sbi/sbi_hsm.c +++ b/lib/sbi/sbi_hsm.c @@ -205,10 +205,10 @@ fail_exit: sbi_hart_hang(); } -int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid, - ulong saddr, ulong smode, ulong priv) +int sbi_hsm_hart_start(struct sbi_scratch *scratch, + const struct sbi_domain *dom, + u32 hartid, ulong saddr, ulong smode, ulong priv) { - int rc; unsigned long init_count; unsigned int hstate; struct sbi_scratch *rscratch; @@ -217,6 +217,11 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid, if (smode != PRV_M && smode != PRV_S && smode != PRV_U) return SBI_EINVAL; + if (dom && !sbi_domain_is_assigned_hart(dom, hartid)) + return SBI_EINVAL; + if (dom && !sbi_domain_check_addr(dom, saddr, smode, + SBI_DOMAIN_EXECUTE)) + return SBI_EINVAL; rscratch = sbi_hartid_to_scratch(hartid); if (!rscratch) @@ -234,11 +239,6 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid, if (hstate != SBI_HART_STOPPED) return SBI_EINVAL; - rc = sbi_hart_pmp_check_addr(scratch, saddr, smode, PMP_X); - if (rc) - return rc; - //TODO: We also need to check saddr for valid physical address as well. - init_count = sbi_init_count(hartid); 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Mon, 19 Oct 2020 12:55:46 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 09/16] lib: sbi: Optimize sbi_hsm_hart_started_mask() implementation Date: Mon, 19 Oct 2020 18:24:46 +0530 Message-Id: <20201019125453.2460105-10-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:44 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 16d725c1-93fe-458b-d9fc-08d8742e4bd0 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:1850; 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This patch optimizes sbi_hsm_hart_started_mask() as-per above. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- lib/sbi/sbi_hsm.c | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c index 8ecf90f..3ff671f 100644 --- a/lib/sbi/sbi_hsm.c +++ b/lib/sbi/sbi_hsm.c @@ -57,20 +57,27 @@ int sbi_hsm_hart_state_to_status(int state) return ret; } -int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid) +static inline int __sbi_hsm_hart_get_state(u32 hartid) { struct sbi_hsm_data *hdata; struct sbi_scratch *scratch; scratch = sbi_hartid_to_scratch(hartid); - if (!scratch || !sbi_domain_is_assigned_hart(dom, hartid)) + if (!scratch) return SBI_HART_UNKNOWN; hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset); - return atomic_read(&hdata->state); } +int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid) +{ + if (!sbi_domain_is_assigned_hart(dom, hartid)) + return SBI_HART_UNKNOWN; + + return __sbi_hsm_hart_get_state(hartid); +} + static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid) { if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HART_STARTED) @@ -90,18 +97,21 @@ static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid) int sbi_hsm_hart_started_mask(const struct sbi_domain *dom, ulong hbase, ulong *out_hmask) { - ulong i; - ulong hcount = sbi_scratch_last_hartid() + 1; + ulong i, hmask, dmask; + ulong hend = sbi_scratch_last_hartid() + 1; *out_hmask = 0; - if (hcount <= hbase) + if (hend <= hbase) return SBI_EINVAL; - if (BITS_PER_LONG < (hcount - hbase)) - hcount = BITS_PER_LONG; - - for (i = hbase; i < hcount; i++) { - if (sbi_hsm_hart_get_state(dom, i) == SBI_HART_STARTED) - *out_hmask |= 1UL << (i - hbase); + if (BITS_PER_LONG < (hend - hbase)) + hend = hbase + BITS_PER_LONG; + + dmask = sbi_domain_get_assigned_hartmask(dom, hbase); + for (i = hbase; i < hend; i++) { + hmask = 1UL << (i - hbase); + if ((dmask & hmask) && + (__sbi_hsm_hart_get_state(i) == SBI_HART_STARTED)) + *out_hmask |= hmask; } return 0; From patchwork Mon Oct 19 12:54:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384287 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:55:49 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 10/16] lib: sbi: Extend sbi_system_reset() for domains Date: Mon, 19 Oct 2020 18:24:47 +0530 Message-Id: <20201019125453.2460105-11-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:47 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: a7450a4c-17d9-4211-72f4-08d8742e4d83 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:270; 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This patch extends sbi_system_reset() as-per above. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- lib/sbi/sbi_system.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c index a938003..96290b3 100644 --- a/lib/sbi/sbi_system.c +++ b/lib/sbi/sbi_system.c @@ -37,9 +37,10 @@ void __noreturn sbi_system_reset(u32 platform_reset_type) /* Stop current HART */ sbi_hsm_hart_stop(scratch, FALSE); - /* Platform specific reset */ - sbi_platform_system_reset(sbi_platform_ptr(scratch), - platform_reset_type); + /* Platform specific reset if domain allowed system reset */ + if (dom->system_reset_allowed) + sbi_platform_system_reset(sbi_platform_ptr(scratch), + platform_reset_type); /* If platform specific reset did not work then do sbi_exit() */ sbi_exit(scratch); From patchwork Mon Oct 19 12:54:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384289 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:55:52 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 11/16] lib: utils: Update fdt_reserved_memory_fixup() to use current domain Date: Mon, 19 Oct 2020 18:24:48 +0530 Message-Id: <20201019125453.2460105-12-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:50 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: ca215db3-5833-4876-a679-08d8742e4f48 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:5797; 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We also change reserved memory node name prefix from "mmode_pmp" to "mmode_resv" because domain memory regions can impact other hardware configurations (such as IOPMP, etc) along with PMP. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- lib/utils/fdt/fdt_fixup.c | 47 ++++++++++++++++++--------------------- 1 file changed, 22 insertions(+), 25 deletions(-) diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c index 8f554e1..e9e1dff 100644 --- a/lib/utils/fdt/fdt_fixup.c +++ b/lib/utils/fdt/fdt_fixup.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include @@ -97,11 +98,11 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr, if (na > 1 && addr_high) sbi_snprintf(name, sizeof(name), - "mmode_pmp%d@%x,%x", index, + "mmode_resv%d@%x,%x", index, addr_high, addr_low); else sbi_snprintf(name, sizeof(name), - "mmode_pmp%d@%x", index, + "mmode_resv%d@%x", index, addr_low); subnode = fdt_add_subnode(fdt, parent, name); @@ -153,10 +154,11 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr, */ int fdt_reserved_memory_fixup(void *fdt) { + struct sbi_domain_memregion *reg; + struct sbi_domain *dom = sbi_domain_thishart_ptr(); struct sbi_scratch *scratch = sbi_scratch_thishart_ptr(); - unsigned long prot, addr, size; - int parent, i, j; - int err; + unsigned long addr, size; + int err, parent, i; int na = fdt_address_cells(fdt, 0); int ns = fdt_size_cells(fdt, 0); @@ -203,34 +205,29 @@ int fdt_reserved_memory_fixup(void *fdt) * We assume the given device tree does not contain any memory region * child node protected by PMP. Normally PMP programming happens at * M-mode firmware. The memory space used by OpenSBI is protected. - * Some additional memory spaces may be protected by platform codes. + * Some additional memory spaces may be protected by domain memory + * regions. * * With above assumption, we create child nodes directly. */ - if (!sbi_hart_pmp_count(scratch)) { - /* - * Update the DT with firmware start & size even if PMP is not - * supported. This makes sure that supervisor OS is always - * aware of OpenSBI resident memory area. - */ - addr = scratch->fw_start & ~(scratch->fw_size - 1UL); - size = (1UL << log2roundup(scratch->fw_size)); - return fdt_resv_memory_update_node(fdt, addr, size, - 0, parent, true); - } - - for (i = 0, j = 0; i < sbi_hart_pmp_count(scratch); i++) { - err = sbi_hart_pmp_get(scratch, i, &prot, &addr, &size); - if (err) + i = 0; + sbi_domain_for_each_memregion(dom, reg) { + /* Ignore MMIO or READABLE or WRITABLE or EXECUTABLE regions */ + if (reg->flags & SBI_DOMAIN_MEMREGION_MMIO) + continue; + if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE) continue; - if (!(prot & PMP_A)) + if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE) continue; - if (prot & (PMP_R | PMP_W | PMP_X)) + if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE) continue; - fdt_resv_memory_update_node(fdt, addr, size, j, parent, false); - j++; + addr = reg->base; + size = 1UL << reg->order; + fdt_resv_memory_update_node(fdt, addr, size, i, parent, + (sbi_hart_pmp_count(scratch)) ? false : true); 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Mon, 19 Oct 2020 12:55:55 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 12/16] lib: utils: Update fdt_cpu_fixup() to use current domain Date: Mon, 19 Oct 2020 18:24:49 +0530 Message-Id: <20201019125453.2460105-13-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:52 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: fb054953-e2b1-43ef-fe17-08d8742e50fd X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:6430; 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This patch updates fdt_cpu_fixup() accordingly. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- lib/utils/fdt/fdt_fixup.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c index e9e1dff..eea450d 100644 --- a/lib/utils/fdt/fdt_fixup.c +++ b/lib/utils/fdt/fdt_fixup.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -20,8 +19,7 @@ void fdt_cpu_fixup(void *fdt) { - struct sbi_scratch *scratch = sbi_scratch_thishart_ptr(); - const struct sbi_platform *plat = sbi_platform_ptr(scratch); + struct sbi_domain *dom = sbi_domain_thishart_ptr(); int err, cpu_offset, cpus_offset, len; const char *mmu_type; u32 hartid; @@ -41,12 +39,12 @@ void fdt_cpu_fixup(void *fdt) /* * Disable a HART DT node if one of the following is true: - * 1. The HART is marked invalid by platform support + * 1. The HART is not assigned to the current domain * 2. MMU is not available for the HART */ mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len); - if (sbi_platform_hart_invalid(plat, hartid) || + if (!sbi_domain_is_assigned_hart(dom, hartid) || !mmu_type || !len) fdt_setprop_string(fdt, cpu_offset, "status", "disabled"); From patchwork Mon Oct 19 12:54:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384291 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1231::1; helo=merlin.infradead.org; envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=merlin.20170209 header.b=yrEI2OSH; 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Mon, 19 Oct 2020 12:55:58 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 13/16] lib: sbi: Remove redundant sbi_hart_pmp_xyz() functions Date: Mon, 19 Oct 2020 18:24:50 +0530 Message-Id: <20201019125453.2460105-14-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:55 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 327bdcde-b7ae-4825-79d0-08d8742e52a3 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:949; 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Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- include/sbi/sbi_hart.h | 6 ------ lib/sbi/sbi_hart.c | 42 ------------------------------------------ 2 files changed, 48 deletions(-) diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 2efe44d..79d745a 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -38,13 +38,7 @@ static inline ulong sbi_hart_expected_trap_addr(void) unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch); void sbi_hart_delegation_dump(struct sbi_scratch *scratch); unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch); -int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n, - unsigned long *prot_out, unsigned long *addr_out, - unsigned long *size); void sbi_hart_pmp_dump(struct sbi_scratch *scratch); -int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, - unsigned long daddr, unsigned long mode, - unsigned long attr); int sbi_hart_pmp_configure(struct sbi_scratch *scratch); bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature); void sbi_hart_get_features_str(struct sbi_scratch *scratch, diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 88ffab0..ea5d479 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -153,24 +153,6 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch) return hfeatures->pmp_count; } -int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n, - unsigned long *prot_out, unsigned long *addr_out, - unsigned long *size) -{ - int err; - unsigned long log2size; - - if (sbi_hart_pmp_count(scratch) <= n) - return SBI_EINVAL; - - err = pmp_get(n, prot_out, addr_out, &log2size); - if (err) - return err; - *size = (log2size < __riscv_xlen) ? 1UL << log2size : 0; - - return 0; -} - void sbi_hart_pmp_dump(struct sbi_scratch *scratch) { unsigned long prot, addr, size, log2size; @@ -200,30 +182,6 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch) } } -int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, - unsigned long addr, unsigned long mode, - unsigned long attr) -{ - unsigned long prot, size, log2size, tempaddr; - unsigned int i, pmp_count; - - pmp_count = sbi_hart_pmp_count(scratch); - for (i = 0; i < pmp_count; i++) { - pmp_get(i, &prot, &tempaddr, &log2size); - if (!(prot & PMP_A)) - continue; - if (mode == PRV_M && !(prot & PMP_L)) - continue; - size = 1UL << log2size; - if ((log2size >= __riscv_xlen) || - ((tempaddr <= addr && addr <= tempaddr + size))) - if (!(prot & attr)) - return SBI_EINVALID_ADDR; - } - - return SBI_OK; -} - int sbi_hart_pmp_configure(struct sbi_scratch *scratch) { u32 pmp_idx = 0; From patchwork Mon Oct 19 12:54:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384292 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2001:8b0:10b:1231::1; helo=merlin.infradead.org; envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; 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Mon, 19 Oct 2020 12:56:01 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 14/16] lib: sbi: Configure PMP based on domain memory regions Date: Mon, 19 Oct 2020 18:24:51 +0530 Message-Id: <20201019125453.2460105-15-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:55:59 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: e3a64f10-770d-4f9f-41a4-08d8742e54c3 X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:4502; 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This patch updates the sbi_hart_pmp_configure() function accordingly. Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- lib/sbi/sbi_hart.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index ea5d479..1871a1e 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -184,24 +185,30 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch) int sbi_hart_pmp_configure(struct sbi_scratch *scratch) { - u32 pmp_idx = 0; - unsigned long fw_start, fw_size_log2; + struct sbi_domain_memregion *reg; + struct sbi_domain *dom = sbi_domain_thishart_ptr(); + unsigned int pmp_idx = 0, pmp_flags; + unsigned int pmp_count = sbi_hart_pmp_count(scratch); - if (!sbi_hart_pmp_count(scratch)) + if (!pmp_count) return 0; - /* Firmware PMP region to protect OpenSBI firmware */ - fw_size_log2 = log2roundup(scratch->fw_size); - fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL); - pmp_set(pmp_idx++, 0, fw_start, fw_size_log2); - - /* - * Default PMP region for allowing S-mode and U-mode access to - * memory not covered by: - * 1) Firmware PMP region - * 2) Platform specific PMP regions - */ - pmp_set(pmp_idx++, PMP_R | PMP_W | PMP_X, 0, __riscv_xlen); + sbi_domain_for_each_memregion(dom, reg) { + if (pmp_count <= pmp_idx) + break; + + pmp_flags = 0; + if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE) + pmp_flags |= PMP_R; + if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE) + pmp_flags |= PMP_W; + if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE) + pmp_flags |= PMP_X; + if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE) + pmp_flags |= PMP_L; + + pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order); + } return 0; } From patchwork Mon Oct 19 12:54:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1384293 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Mon, 19 Oct 2020 12:56:04 +0000 From: Anup Patel To: Atish Patra , Alistair Francis Subject: [PATCH v3 15/16] lib: sbi: Display domain details in boot prints Date: Mon, 19 Oct 2020 18:24:52 +0530 Message-Id: <20201019125453.2460105-16-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201019125453.2460105-1-anup.patel@wdc.com> References: <20201019125453.2460105-1-anup.patel@wdc.com> X-Originating-IP: [122.172.253.92] X-ClientProxiedBy: MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.172.253.92) by MAXPR0101CA0060.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; Mon, 19 Oct 2020 12:56:02 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 14ab3e00-2f09-48d4-5ade-08d8742e568b X-MS-TrafficTypeDiagnostic: DM6PR04MB5548: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:343; 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In the process, we remove sbi_hart_pmp_dump() because it shows redundant information which domain details already show. Signed-off-by: Anup Patel --- include/sbi/sbi_domain.h | 6 +++ include/sbi/sbi_hart.h | 4 +- lib/sbi/sbi_domain.c | 94 ++++++++++++++++++++++++++++++++++++++++ lib/sbi/sbi_hart.c | 44 +++++-------------- lib/sbi/sbi_init.c | 27 +++++++----- 5 files changed, 127 insertions(+), 48 deletions(-) diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h index 4bb08dc..6f90b26 100644 --- a/include/sbi/sbi_domain.h +++ b/include/sbi/sbi_domain.h @@ -138,6 +138,12 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom, unsigned long addr, unsigned long mode, unsigned long access_flags); +/** Dump domain details on the console */ +void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix); + +/** Dump all domain details on the console */ +void sbi_domain_dump_all(const char *suffix); + /** Finalize domain tables and startup non-root domains */ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid); diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index 79d745a..3ac1500 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -36,9 +36,9 @@ static inline ulong sbi_hart_expected_trap_addr(void) } unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch); -void sbi_hart_delegation_dump(struct sbi_scratch *scratch); +void sbi_hart_delegation_dump(struct sbi_scratch *scratch, + const char *prefix, const char *suffix); unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch); -void sbi_hart_pmp_dump(struct sbi_scratch *scratch); int sbi_hart_pmp_configure(struct sbi_scratch *scratch); bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature); void sbi_hart_get_features_str(struct sbi_scratch *scratch, diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c index 2b6fa79..43c0599 100644 --- a/lib/sbi/sbi_domain.c +++ b/lib/sbi/sbi_domain.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -243,6 +244,99 @@ static int sanitize_domain(const struct sbi_platform *plat, return 0; } +void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix) +{ + u32 i, k; + unsigned long rstart, rend; + struct sbi_domain_memregion *reg; + + sbi_printf("Domain%d Name %s: %s\n", + dom->index, suffix, dom->name); + + sbi_printf("Domain%d Boot HART %s: %d\n", + dom->index, suffix, dom->boot_hartid); + + k = 0; + sbi_printf("Domain%d HARTs %s: ", dom->index, suffix); + sbi_hartmask_for_each_hart(i, dom->possible_harts) + sbi_printf("%s%d%s", (k++) ? "," : "", + i, sbi_domain_is_assigned_hart(dom, i) ? "*" : ""); + sbi_printf("\n"); + + i = 0; + sbi_domain_for_each_memregion(dom, reg) { + rstart = reg->base; + rend = (reg->order < __riscv_xlen) ? + rstart + ((1UL << reg->order) - 1) : -1UL; + +#if __riscv_xlen == 32 + sbi_printf("Domain%d Region%02d %s: 0x%08lx-0x%08lx ", +#else + sbi_printf("Domain%d Region%02d %s: 0x%016lx-0x%016lx ", +#endif + dom->index, i, suffix, rstart, rend); + + k = 0; + if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE) + sbi_printf("%cM", (k++) ? ',' : '('); + if (reg->flags & SBI_DOMAIN_MEMREGION_MMIO) + sbi_printf("%cI", (k++) ? ',' : '('); + if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE) + sbi_printf("%cR", (k++) ? ',' : '('); + if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE) + sbi_printf("%cW", (k++) ? ',' : '('); + if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE) + sbi_printf("%cX", (k++) ? ',' : '('); + sbi_printf("%s\n", (k++) ? ")" : "()"); + + i++; + } + +#if __riscv_xlen == 32 + sbi_printf("Domain%d Next Address%s: 0x%08lx\n", +#else + sbi_printf("Domain%d Next Address%s: 0x%016lx\n", +#endif + dom->index, suffix, dom->next_addr); + +#if __riscv_xlen == 32 + sbi_printf("Domain%d Next Arg1 %s: 0x%08lx\n", +#else + sbi_printf("Domain%d Next Arg1 %s: 0x%016lx\n", +#endif + dom->index, suffix, dom->next_arg1); + + sbi_printf("Domain%d Next Mode %s: ", dom->index, suffix); + switch (dom->next_mode) { + case PRV_M: + sbi_printf("M-mode\n"); + break; + case PRV_S: + sbi_printf("S-mode\n"); + break; + case PRV_U: + sbi_printf("U-mode\n"); + break; + default: + sbi_printf("Unknown\n"); + break; + }; + + sbi_printf("Domain%d SysReset %s: %s\n", + dom->index, suffix, (dom->system_reset_allowed) ? "yes" : "no"); +} + +void sbi_domain_dump_all(const char *suffix) +{ + u32 i; + const struct sbi_domain *dom; + + sbi_domain_for_each(i, dom) { + sbi_domain_dump(dom, suffix); + sbi_printf("\n"); + } +} + int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid) { int rc; diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 1871a1e..ff18c9d 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -123,18 +123,23 @@ static int delegate_traps(struct sbi_scratch *scratch) return 0; } -void sbi_hart_delegation_dump(struct sbi_scratch *scratch) +void sbi_hart_delegation_dump(struct sbi_scratch *scratch, + const char *prefix, const char *suffix) { if (!misa_extension('S')) /* No delegation possible as mideleg does not exist*/ return; #if __riscv_xlen == 32 - sbi_printf("MIDELEG : 0x%08lx\n", csr_read(CSR_MIDELEG)); - sbi_printf("MEDELEG : 0x%08lx\n", csr_read(CSR_MEDELEG)); + sbi_printf("%sMIDELEG%s: 0x%08lx\n", + prefix, suffix, csr_read(CSR_MIDELEG)); + sbi_printf("%sMEDELEG%s: 0x%08lx\n", + prefix, suffix, csr_read(CSR_MEDELEG)); #else - sbi_printf("MIDELEG : 0x%016lx\n", csr_read(CSR_MIDELEG)); - sbi_printf("MEDELEG : 0x%016lx\n", csr_read(CSR_MEDELEG)); + sbi_printf("%sMIDELEG%s: 0x%016lx\n", + prefix, suffix, csr_read(CSR_MIDELEG)); + sbi_printf("%sMEDELEG%s: 0x%016lx\n", + prefix, suffix, csr_read(CSR_MEDELEG)); #endif } @@ -154,35 +159,6 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch) return hfeatures->pmp_count; } -void sbi_hart_pmp_dump(struct sbi_scratch *scratch) -{ - unsigned long prot, addr, size, log2size; - unsigned int i, pmp_count; - - pmp_count = sbi_hart_pmp_count(scratch); - for (i = 0; i < pmp_count; i++) { - pmp_get(i, &prot, &addr, &log2size); - if (!(prot & PMP_A)) - continue; - size = (log2size < __riscv_xlen) ? 1UL << log2size : 0; -#if __riscv_xlen == 32 - sbi_printf("PMP%d : 0x%08lx-0x%08lx (A", -#else - sbi_printf("PMP%d : 0x%016lx-0x%016lx (A", -#endif - i, addr, addr + size - 1); - if (prot & PMP_L) - sbi_printf(",L"); - if (prot & PMP_R) - sbi_printf(",R"); - if (prot & PMP_W) - sbi_printf(",W"); - if (prot & PMP_X) - sbi_printf(",X"); - sbi_printf(")\n"); - } -} - int sbi_hart_pmp_configure(struct sbi_scratch *scratch) { struct sbi_domain_memregion *reg; diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c index 406cb3f..5151d36 100644 --- a/lib/sbi/sbi_init.c +++ b/lib/sbi/sbi_init.c @@ -39,6 +39,7 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid) { int xlen; char str[128]; + const struct sbi_domain *dom = sbi_domain_thishart_ptr(); const struct sbi_platform *plat = sbi_platform_ptr(scratch); #ifdef OPENSBI_VERSION_GIT @@ -64,27 +65,29 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid) sbi_printf("Platform HART Count : %u\n", sbi_platform_hart_count(plat)); - /* Boot HART details */ - sbi_printf("Boot HART ID : %u\n", hartid); - misa_string(xlen, str, sizeof(str)); - sbi_printf("Boot HART ISA : %s\n", str); - sbi_hart_get_features_str(scratch, str, sizeof(str)); - sbi_printf("BOOT HART Features : %s\n", str); - sbi_printf("BOOT HART PMP Count : %d\n", sbi_hart_pmp_count(scratch)); - sbi_printf("BOOT HART MHPM Count: %d\n", sbi_hart_mhpm_count(scratch)); - /* Firmware details */ sbi_printf("Firmware Base : 0x%lx\n", scratch->fw_start); sbi_printf("Firmware Size : %d KB\n", (u32)(scratch->fw_size / 1024)); - /* Generic details */ + /* SBI details */ sbi_printf("Runtime SBI Version : %d.%d\n", sbi_ecall_version_major(), sbi_ecall_version_minor()); sbi_printf("\n"); - sbi_hart_delegation_dump(scratch); - sbi_hart_pmp_dump(scratch); + /* Domain details */ + sbi_domain_dump_all(""); + + /* Boot HART details */ + sbi_printf("Boot HART ID : %u\n", hartid); + sbi_printf("Boot HART Domain : %s\n", dom->name); + misa_string(xlen, str, sizeof(str)); + sbi_printf("Boot HART ISA : %s\n", str); + sbi_hart_get_features_str(scratch, str, sizeof(str)); + sbi_printf("Boot HART Features : %s\n", str); + sbi_printf("Boot HART PMP Count : %d\n", sbi_hart_pmp_count(scratch)); + sbi_printf("Boot HART MHPM Count: %d\n", sbi_hart_mhpm_count(scratch)); + sbi_hart_delegation_dump(scratch, "Boot HART ", " "); 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Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- README.md | 3 ++ docs/domain_support.md | 106 +++++++++++++++++++++++++++++++++++++++++ docs/doxygen.cfg | 1 + 3 files changed, 110 insertions(+) create mode 100644 docs/domain_support.md diff --git a/README.md b/README.md index bd41ba3..03c02fb 100644 --- a/README.md +++ b/README.md @@ -225,6 +225,8 @@ Detailed documentation of various aspects of OpenSBI can be found under the * [Platform Documentation]: Documentation of the platforms currently supported. * [Firmware Documentation]: Documentation for the different types of firmware examples build supported by OpenSBI. +* [Domain Support]: Documentation for the OpenSBI domain support which helps + users achieve system-level partitioning using OpenSBI. OpenSBI source code is also well documented. For source level documentation, doxygen style is used. Please refer to the [Doxygen manual] for details on this @@ -278,6 +280,7 @@ make I= install_docs [Platform Support Guide]: docs/platform_guide.md [Platform Documentation]: docs/platform/platform.md [Firmware Documentation]: docs/firmware/fw.md +[Domain Support]: docs/domain_support.md [Doxygen manual]: http://www.doxygen.nl/manual/index.html [Kendryte standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk [third party notices]: ThirdPartyNotices.md diff --git a/docs/domain_support.md b/docs/domain_support.md new file mode 100644 index 0000000..53967dd --- /dev/null +++ b/docs/domain_support.md @@ -0,0 +1,106 @@ +OpenSBI Domain Support +====================== + +An OpenSBI domain is a system-level partition (subset) of underlying hardware +having it's own memory regions (RAM and MMIO devices) and HARTs. The OpenSBI +will try to achieve secure isolation between domains using RISC-V platform +features such as PMP, ePMP, IOPMP, SiFive Shield, etc. + +Important entities which help implement OpenSBI domain support are: + +* **struct sbi_domain_memregion** - Representation of a domain memory region +* **struct sbi_hartmask** - Representation of domain HART set +* **struct sbi_domain** - Representation of a domain instance + +Each HART of a RISC-V platform must have an OpenSBI domain assigned to it. +The OpenSBI platform support is responsible for populating domains and +providing HART id to domain mapping. The OpenSBI domain support will by +default assign **the ROOT domain** to all HARTs of a RISC-V platform so +it is not mandatory for the OpenSBI platform support to populate domains. + +Domain Memory Region +-------------------- + +A domain memory region is represented by **struct sbi_domain_memregion** in +OpenSBI and has following details: + +* **order** - The size of a memory region is **2 ^ order** where **order** + must be **3 <= order <= __riscv_xlen** +* **base** - The base address of a memory region is **2 ^ order** + aligned start address +* **flags** - The flags of a memory region represent memory type (i.e. + RAM or MMIO) and allowed accesses (i.e. READ, WRITE, EXECUTE, etc) + +Domain Instance +--------------- + +A domain instance is represented by **struct sbi_domain** in OpenSBI and +has following details: + +* **index** - Logical index of this domain +* **name** - Name of this domain +* **assigned_harts** - HARTs assigned to this domain +* **possible_harts** - HARTs possible in this domain +* **regions** - Array of memory regions terminated by a memory region + with order zero +* **boot_hartid** - HART id of the HART booting this domain. The domain + boot HART will be started at boot-time if boot HART is a possible and + assigned for this domain. +* **next_addr** - Address of the next booting stage for this domain +* **next_arg1** - Arg1 (or 'a1' register) of the next booting stage for + this domain +* **next_mode** - Priviledge mode of the next booting stage for this + domain. This can be either S-mode or U-mode. +* **system_reset_allowed** - Is domain allowed to reset the system? + +The memory regions represented by **regions** in **struct sbi_domain** have +following additional constraints to align with RISC-V PMP requirements: + +* A memory region to protect OpenSBI firmware from S-mode and U-mode + should always be present +* For two overlapping memory regions, one should be sub-region of another +* Two overlapping memory regions should not be of same size +* Two overlapping memory regions cannot have same flags +* Memory access checks on overlapping address should prefer smallest + overlapping memory region flags. + +ROOT Domain +----------- + +**The ROOT domain** is the default OpenSBI domain which is assigned by +default to all HARTs of a RISC-V platform. The OpenSBI domain support +will hand-craft **the ROOT domain** very early at boot-time in the +following manner: + +* **index** - Logical index of the ROOT domain is always zero +* **name** - Name of the ROOT domain is "root" +* **assigned_harts** - At boot-time all valid HARTs of a RISC-V platform + are assigned the ROOT domain which changes later based on OpenSBI + platform support +* **possible_harts** - All valid HARTs of a RISC-V platform are possible + HARTs of the ROOT domain +* **regions** - Two memory regions available to the ROOT domain: + **A)** A memory region to protect OpenSBI firmware from S-mode and U-mode + **B)** A memory region of **order=__riscv_xlen** allowing S-mode and + U-mode access to full memory address space +* **boot_hartid** - Coldboot HART is the HART booting the ROOT domain +* **next_addr** - Next booting stage address in coldboot HART scratch + space is the next address for the ROOT domain +* **next_arg1** - Next booting stage arg1 in coldboot HART scratch space + is the next arg1 for the ROOT domain +* **next_mode** - Next booting stage mode in coldboot HART scratch space + is the next mode for the ROOT domain +* **system_reset_allowed** - The ROOT domain is allowed to reset the system + +Domain Effects +-------------- + +Few noteworthy effects of a system partitioned into domains are as follows: + +* At any point in time, a HART is running in exactly one OpenSBI domain context +* The SBI IPI and RFENCE calls from HART A are restricted to the HARTs in + domain assigned to HART A +* The SBI HSM calls which try to change/read state of HART B from HART A will + only work if both HART A and HART B are assigned same domain +* A HART running in S-mode or U-mode can only access memory based on the + memory regions of the domain assigned to the HART diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg index dbf8ef9..82f31a7 100644 --- a/docs/doxygen.cfg +++ b/docs/doxygen.cfg @@ -795,6 +795,7 @@ INPUT = @@SRC_DIR@@/README.md \ @@SRC_DIR@@/docs/platform_guide.md \ @@SRC_DIR@@/docs/platform_requirements.md \ @@SRC_DIR@@/docs/library_usage.md \ + @@SRC_DIR@@/docs/domain_support.md \ @@SRC_DIR@@/docs/firmware \ @@SRC_DIR@@/docs/platform \ @@SRC_DIR@@/include \