From patchwork Wed Oct 7 20:42:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Schwierzeck X-Patchwork-Id: 1378277 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=bu0eA/MQ; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C65r4668Lz9sSG for ; Thu, 8 Oct 2020 07:42:34 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4E01A806C5; Wed, 7 Oct 2020 22:42:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bu0eA/MQ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 667F080404; Wed, 7 Oct 2020 22:42:18 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0477280404 for ; Wed, 7 Oct 2020 22:42:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=daniel.schwierzeck@gmail.com Received: by mail-ed1-x52c.google.com with SMTP id v19so3593772edx.9 for ; Wed, 07 Oct 2020 13:42:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=TcKFDJ984dVTJuSq31N8t12ne1xJKfk7ori7+LwcR38=; b=bu0eA/MQnoY7osVNDvRHO7Yvvb2Ui1T+vrwlsFL7nrihk9NuaPJoFAiRO85S+a+qgW 4x/gFxlHNkj2bKSd6vtEwbBHDwqLAkUsdx/3N0gmc4gVuthfBNTH7t0R4ZP/2o9DY4t5 glam+2RMH7BGh9StmEnAn/hDvbDhS3AvKmCVY/2gUGX28xpyn1jDFjjs8HfkCTL84pS/ laf+X69wqo4zcg3t9Cgz/Fm3gsCUb6MFzm2dcKlUhyVQHnafhmZpM+gJgKdr9zfD1Jm3 TrjYT+akr/bzwHdEnpVwrm3SmzYp6+dNR5R/Cdw9l4jBsGFmsxXGIOEirGj3GfiFvLX8 70Qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=TcKFDJ984dVTJuSq31N8t12ne1xJKfk7ori7+LwcR38=; b=hLrY745EFqcDqjDgNYl/MpWYaE80yhfIYwv8l5KIe87bFadv6toTLj6SDHqpB/HXur HzJ0OfdyHu1wWGXz2AJ15jo3ABWEOLuw7XSr1j4Rv8dAP90vorrl7wIYuV1KbJzhHmEn 5WCvkXMlxy2PV+58XU+IT6F0tWR2gjza/bZDSesK6WkFOQKYcfcZIytVbV8/6kk7VwfL S3si3doaE7i6Cg3Linjk8w+5ZBkQ6yypUTfHJPUC1HhfVELpOKSUhQf195Xo6cBEP1rw 5Ve8b/kF3Wx3uxCj7JjO5ONen5Wv64/mQdQq4OIsW22XUHqKJdkpDFP+IjbCP+gRAseH mJpw== X-Gm-Message-State: AOAM533Ow8uKFBCCPRJXCLjHAxKXSDJom1DZNtU5v9dZjv7JUMkF2JDG 53ha4tFR+fkgPbNLhOJg1m0= X-Google-Smtp-Source: ABdhPJwQT12qmMtgdP5O2MHWSsYnB7SUDwBPdu+dPBrZ1xxfOMZ+PeQnEAmd16c61uWdVLJZ1JWAng== X-Received: by 2002:a05:6402:10c9:: with SMTP id p9mr5684680edu.156.1602103330931; Wed, 07 Oct 2020 13:42:10 -0700 (PDT) Received: from workstation.lan.schwierd.dedyn.io ([2001:9e8:33:9d01:3478:4073:5616:26d4]) by smtp.gmail.com with ESMTPSA id b6sm2422556edu.21.2020.10.07.13.42.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Oct 2020 13:42:10 -0700 (PDT) From: Daniel Schwierzeck To: Tom Rini Cc: u-boot@lists.denx.de Subject: [PULL] u-boot-mips Date: Wed, 7 Oct 2020 22:42:08 +0200 Message-Id: <20201007204208.815051-1-daniel.schwierzeck@gmail.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Hi Tom, please pull some more updates for Octeon MIPS64. Gitlab CI: https://gitlab.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/4947 The following changes since commit 5dcf7cc590b348f1e730ec38242df64c179f10a8: Merge tag 'efi-2021-01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-10-06 08:36:38 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-mips.git tags/mips-pull-2020-10-07 for you to fetch changes up to 1471560b2c375c6e667acc896e99fa271100d299: mips: octeon: octeon_common.h: Increase CONFIG_SYS_BOOTM_LEN (2020-10-07 20:25:58 +0200) ---------------------------------------------------------------- - mips: octeon: add support for DDR4 memory controller - mips: octeon: add support for DWC3 USB - mips: octeon: add support for booting Linux ---------------------------------------------------------------- Aaron Williams (13): mips: octeon: Add octeon-model.h header mips: octeon Add cvmx/cvmx-lmcx-defs.h header mips: octeon: Add octeon_ddr.h header ram: octeon: Add MIPS Octeon3 DDR4 support (part 1/3) ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3) ram: octeon: Add MIPS Octeon3 DDR4 support (part 3/3) mips: octeon: Add header cvmx-regs.h mips: octeon: Add header octeon-feature.h mips: octeon: Add header cvmx-fuse.h mips: octeon: Add header cvmx-bootinfo.h mips: octeon: Add coremask support mips: octeon: Add bootmem support mips: octeon: Add bootoctlinux command Stefan Roese (14): mips: octeon: dts: mrvl, cn73xx.dtsi: Add memory controller DT node mips: octeon: dram.c: Add RAM driver support mips: octeon: octeon_ebb7304: Add DDR4 support usb: xhci: xhci-dwc3.c: Use dev_remap_addr() instead of dev_get_addr() usb: xhci: xhci_bulk_tx: Don't "BUG" when comparing addresses usb: xhci: octeon: Add DWC3 glue layer for Octeon mips: octeon: cpu.c: Add table for selective swapping mips: octeon: Add mangle-port.h mips: octeon: cache.c: Flush all pending writes in flush_dcache_range() mips: octeon: Add USB DT nodes mips: octeon: octeon_ebb7304_defconfig: Enable USB support mips: octeon: octeon-model.h: Enable inclusion from assembler files mips: octeon: lowlevel_init.S: Add NMI handling code for SMP Linux booting mips: octeon: octeon_common.h: Increase CONFIG_SYS_BOOTM_LEN arch/mips/dts/mrvl,cn73xx.dtsi | 77 + arch/mips/dts/mrvl,octeon-ebb7304.dts | 24 + arch/mips/mach-octeon/Makefile | 3 + arch/mips/mach-octeon/bootoctlinux.c | 661 ++ arch/mips/mach-octeon/cache.c | 12 +- arch/mips/mach-octeon/cpu.c | 21 + arch/mips/mach-octeon/cvmx-bootmem.c | 1460 +++ arch/mips/mach-octeon/cvmx-coremask.c | 366 + arch/mips/mach-octeon/dram.c | 72 +- arch/mips/mach-octeon/include/mach/bootoct_cmd.h | 54 + arch/mips/mach-octeon/include/mach/cvmx-bootinfo.h | 350 + arch/mips/mach-octeon/include/mach/cvmx-bootmem.h | 533 + arch/mips/mach-octeon/include/mach/cvmx-coremask.h | 752 ++ arch/mips/mach-octeon/include/mach/cvmx-fuse.h | 71 + arch/mips/mach-octeon/include/mach/cvmx-regs.h | 144 + .../mach-octeon/include/mach/cvmx/cvmx-lmcx-defs.h | 4574 ++++++++ .../mips/mach-octeon/include/mach/octeon-feature.h | 442 + arch/mips/mach-octeon/include/mach/octeon-model.h | 317 + arch/mips/mach-octeon/include/mach/octeon_ddr.h | 982 ++ arch/mips/mach-octeon/include/mangle-port.h | 56 + arch/mips/mach-octeon/lowlevel_init.S | 76 + board/Marvell/octeon_ebb7304/board.c | 25 +- board/Marvell/octeon_ebb7304/board_ddr.h | 447 + configs/octeon_ebb7304_defconfig | 20 + drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 2 + drivers/ram/octeon/Kconfig | 17 + drivers/ram/octeon/Makefile | 8 + drivers/ram/octeon/dimm_spd_eeprom.c | 407 + drivers/ram/octeon/octeon3_lmc.c | 11030 +++++++++++++++++++ drivers/ram/octeon/octeon_ddr.c | 2728 +++++ drivers/usb/host/Kconfig | 9 + drivers/usb/host/Makefile | 1 + drivers/usb/host/dwc3-octeon-glue.c | 393 + drivers/usb/host/xhci-dwc3.c | 2 +- drivers/usb/host/xhci-ring.c | 2 - include/configs/octeon_common.h | 11 +- 37 files changed, 26127 insertions(+), 23 deletions(-) create mode 100644 arch/mips/mach-octeon/bootoctlinux.c create mode 100644 arch/mips/mach-octeon/cvmx-bootmem.c create mode 100644 arch/mips/mach-octeon/cvmx-coremask.c create mode 100644 arch/mips/mach-octeon/include/mach/bootoct_cmd.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-bootinfo.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-bootmem.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-coremask.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fuse.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-regs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx/cvmx-lmcx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/octeon-feature.h create mode 100644 arch/mips/mach-octeon/include/mach/octeon-model.h create mode 100644 arch/mips/mach-octeon/include/mach/octeon_ddr.h create mode 100644 arch/mips/mach-octeon/include/mangle-port.h create mode 100644 board/Marvell/octeon_ebb7304/board_ddr.h create mode 100644 drivers/ram/octeon/Kconfig create mode 100644 drivers/ram/octeon/Makefile create mode 100644 drivers/ram/octeon/dimm_spd_eeprom.c create mode 100644 drivers/ram/octeon/octeon3_lmc.c create mode 100644 drivers/ram/octeon/octeon_ddr.c create mode 100644 drivers/usb/host/dwc3-octeon-glue.c