From patchwork Mon Oct 5 11:14:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1376742 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=qHF4xyv1; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C4dKy1JHvz9ryj for ; Mon, 5 Oct 2020 22:15:02 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726058AbgJELPA (ORCPT ); Mon, 5 Oct 2020 07:15:00 -0400 Received: from mail.kernel.org ([198.145.29.99]:57714 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725946AbgJELPA (ORCPT ); Mon, 5 Oct 2020 07:15:00 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6B9C420774; Mon, 5 Oct 2020 11:14:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601896499; bh=y6sw+9UqcCw1K4zL+X8JeaJ21hZxWlVi1L/6R4CeGng=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qHF4xyv1pf7fp18aIgqyzNRebvaU72Fv9FVNttGRHHGxv5Lnzqr3GOWx8+Jy+s6pN z9hvym2/+6RiuwCZVPOWpOZu5Kna6ZTkRn1v2nah5tHmmDQdtssZ93KJL4rRx+sBcR Y+dYrne0bJ6tQvAJUIL40QQOGdlM+iKRHriK4l4w= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kPOSH-00HLMq-Sj; Mon, 05 Oct 2020 12:14:58 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH 1/3] gpio: tegra186: Allow optional irq parent callbacks Date: Mon, 5 Oct 2020 12:14:41 +0100 Message-Id: <20201005111443.1390096-2-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201005111443.1390096-1-maz@kernel.org> References: <20201005111443.1390096-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Make the tegra186 GPIO driver resistent to variable depth interrupt hierarchy, which we are about to introduce. No functionnal change yet. Signed-off-by: Marc Zyngier --- drivers/gpio/gpio-tegra186.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 178e9128ded0..9500074b1f1b 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -430,7 +430,18 @@ static int tegra186_irq_set_type(struct irq_data *data, unsigned int type) else irq_set_handler_locked(data, handle_edge_irq); - return irq_chip_set_type_parent(data, type); + if (data->parent_data) + return irq_chip_set_type_parent(data, type); + + return 0; +} + +static int tegra186_irq_set_wake(struct irq_data *data, unsigned int on) +{ + if (data->parent_data) + return irq_chip_set_wake_parent(data, on); + + return 0; } static void tegra186_gpio_irq(struct irq_desc *desc) @@ -678,7 +689,7 @@ static int tegra186_gpio_probe(struct platform_device *pdev) gpio->intc.irq_mask = tegra186_irq_mask; gpio->intc.irq_unmask = tegra186_irq_unmask; gpio->intc.irq_set_type = tegra186_irq_set_type; - gpio->intc.irq_set_wake = irq_chip_set_wake_parent; + gpio->intc.irq_set_wake = tegra186_irq_set_wake; irq = &gpio->gpio.irq; irq->chip = &gpio->intc; From patchwork Mon Oct 5 11:14:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1376743 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=Lxi1FFqf; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C4dL16rNJz9ryj for ; Mon, 5 Oct 2020 22:15:05 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726138AbgJELPB (ORCPT ); Mon, 5 Oct 2020 07:15:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:57738 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726078AbgJELPB (ORCPT ); Mon, 5 Oct 2020 07:15:01 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2050A20795; Mon, 5 Oct 2020 11:15:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601896500; bh=gIf2fr8wsadXbuwaZvbtzY4oeFXCBgDIGX0jJUBfwOc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lxi1FFqfjNYJw9XRjLb5XqNhO/re3I636YxkAg7Xrd1O+6oi4LKWs70GCp8/e6935 /9fZg8Z/rdHZOe6pOuAqPmGC06kHRJvNxqasVNK5zjUVKl1eZLZVhLxDquHZF0E5Vj /drdYdBgAnNmzACLSTuDKVmJpzvDpfvLUClhUtfw= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kPOSI-00HLMq-Hw; Mon, 05 Oct 2020 12:14:58 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH 2/3] soc/tegra: pmc: Allow optional irq parent callbacks Date: Mon, 5 Oct 2020 12:14:42 +0100 Message-Id: <20201005111443.1390096-3-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201005111443.1390096-1-maz@kernel.org> References: <20201005111443.1390096-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Make the PMC driver resistent to variable depth interrupt hierarchy, which we are about to introduce. The irq_chip structure is now allocated statically, providing the indirection for the couple of callbacks that are SoC-specific. Signed-off-by: Marc Zyngier --- drivers/soc/tegra/pmc.c | 65 ++++++++++++++++++++++++++++++++++------- 1 file changed, 54 insertions(+), 11 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index d332e5d9abac..9960f7c18431 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -439,7 +439,6 @@ struct tegra_pmc { struct pinctrl_dev *pctl_dev; struct irq_domain *domain; - struct irq_chip irq; struct notifier_block clk_nb; }; @@ -1928,6 +1927,58 @@ static void tegra_pmc_reset_sysfs_init(struct tegra_pmc *pmc) } } +static void tegra_irq_mask_parent(struct irq_data *data) +{ + if (data->parent_data) + irq_chip_mask_parent(data); +} + +static void tegra_irq_unmask_parent(struct irq_data *data) +{ + if (data->parent_data) + irq_chip_unmask_parent(data); +} + +static void tegra_irq_eoi_parent(struct irq_data *data) +{ + if (data->parent_data) + irq_chip_eoi_parent(data); +} + +static int tegra_irq_set_affinity_parent(struct irq_data *data, + const struct cpumask *dest, + bool force) +{ + if (data->parent_data) + return irq_chip_set_affinity_parent(data, dest, force); + + return -EINVAL; +} + +static int tegra_irq_set_type(struct irq_data *data, unsigned int type) +{ + struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); + + return pmc->soc->irq_set_type(data, type); +} + +static int tegra_irq_set_wake(struct irq_data *data, unsigned int on) +{ + struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); + + return pmc->soc->irq_set_wake(data, on); +} + +static struct irq_chip pmc_irqchip = { + .name = "tegra-pmc", + .irq_mask = tegra_irq_mask_parent, + .irq_unmask = tegra_irq_unmask_parent, + .irq_eoi = tegra_irq_eoi_parent, + .irq_set_affinity = tegra_irq_set_affinity_parent, + .irq_set_type = tegra_irq_set_type, + .irq_set_wake = tegra_irq_set_wake, +}; + static int tegra_pmc_irq_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, @@ -1965,7 +2016,7 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq, err = irq_domain_set_hwirq_and_chip(domain, virq, event->id, - &pmc->irq, pmc); + &pmc_irqchip, pmc); if (err < 0) break; @@ -2015,7 +2066,7 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq, */ if (i == soc->num_wake_events) { err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX, - &pmc->irq, pmc); + &pmc_irqchip, pmc); /* * Interrupts without a wake event don't have a corresponding @@ -2198,14 +2249,6 @@ static int tegra_pmc_irq_init(struct tegra_pmc *pmc) if (!parent) return 0; - pmc->irq.name = dev_name(pmc->dev); - pmc->irq.irq_mask = irq_chip_mask_parent; - pmc->irq.irq_unmask = irq_chip_unmask_parent; - pmc->irq.irq_eoi = irq_chip_eoi_parent; - pmc->irq.irq_set_affinity = irq_chip_set_affinity_parent; - pmc->irq.irq_set_type = pmc->soc->irq_set_type; - pmc->irq.irq_set_wake = pmc->soc->irq_set_wake; - pmc->domain = irq_domain_add_hierarchy(parent, 0, 96, pmc->dev->of_node, &tegra_pmc_irq_domain_ops, pmc); if (!pmc->domain) { From patchwork Mon Oct 5 11:14:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1376744 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=02OyK/5e; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C4dL24J7hz9sVJ for ; Mon, 5 Oct 2020 22:15:06 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726200AbgJELPF (ORCPT ); Mon, 5 Oct 2020 07:15:05 -0400 Received: from mail.kernel.org ([198.145.29.99]:57782 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726123AbgJELPB (ORCPT ); Mon, 5 Oct 2020 07:15:01 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BF8412085B; Mon, 5 Oct 2020 11:15:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601896500; bh=QZDBQPDjGlcETLhVySdcVslA4fGitGz/5JwUVeEL0kw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=02OyK/5eMBScjHBMNFvMqBGkA6OMu3pk1ZoyshClgFx4nVejZpHfyPoipDjvR3hMD VsWK7kWg0G64G10iyd5a+IbHGf3q3cQOcWRfJ9bmI/03jPEddxn9enqTe+SafYtzQG wBj1oYj4dg3Cb/5rcY8ehb3bGEXTP4bV6E+GSFSw= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kPOSJ-00HLMq-7o; Mon, 05 Oct 2020 12:14:59 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH 3/3] soc/tegra: pmc: Don't create fake interrupt hierarchy levels Date: Mon, 5 Oct 2020 12:14:43 +0100 Message-Id: <20201005111443.1390096-4-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201005111443.1390096-1-maz@kernel.org> References: <20201005111443.1390096-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra PMC driver does ungodly things with the interrupt hierarchy, repeatedly corrupting it by pulling hwirq numbers out of thin air, overriding existing IRQ mappings and changing the handling flow of unsuspecting users. All of this is done in the name of preserving the interrupt hierarchy even when these levels do not exist in the HW. Together with the use of proper IRQs for IPIs, this leads to an unbootable system as the rescheduling IPI gets repeatedly repurposed for random drivers... Instead, let's allow the hierarchy to be trimmed to the level that actually makes sense for the HW, and not any deeper. This avoids having unnecessary callbacks, overriding mappings, and otherwise keeps the hierarchy sane. Signed-off-by: Marc Zyngier --- drivers/soc/tegra/pmc.c | 79 +++++++++++++++-------------------------- 1 file changed, 29 insertions(+), 50 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 9960f7c18431..4eea3134fb3e 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -1993,6 +1993,30 @@ static int tegra_pmc_irq_translate(struct irq_domain *domain, return 0; } +/* Trim the irq hierarchy from a particular irq domain */ +static void trim_hierarchy(unsigned int virq, struct irq_domain *domain) +{ + struct irq_data *tail, *irq_data = irq_get_irq_data(virq); + + /* The PMC doesn't generate any interrupt by itself */ + if (WARN_ON(!irq_data->parent_data)) + return; + + /* Skip until we find the right domain */ + while (irq_data->parent_data && irq_data->parent_data->domain != domain) + irq_data = irq_data->parent_data; + + /* Sever the inner part of the hierarchy... */ + tail = irq_data->parent_data; + irq_data->parent_data = NULL; + + /* ... and free it */ + for (irq_data = tail; irq_data; irq_data = tail) { + tail = irq_data->parent_data; + kfree(irq_data); + }; +} + static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq, unsigned int num_irqs, void *data) { @@ -2039,46 +2063,15 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq, err = irq_domain_set_hwirq_and_chip(domain, virq, event->id, - &pmc->irq, pmc); - - /* - * GPIOs don't have an equivalent interrupt in the - * parent controller (GIC). However some code, such - * as the one in irq_get_irqchip_state(), require a - * valid IRQ chip to be set. Make sure that's the - * case by passing NULL here, which will install a - * dummy IRQ chip for the interrupt in the parent - * domain. - */ - if (domain->parent) - irq_domain_set_hwirq_and_chip(domain->parent, - virq, 0, NULL, - NULL); - + &pmc_irqchip, pmc); + if (!err) + trim_hierarchy(virq, domain->parent); break; } } - /* - * For interrupts that don't have associated wake events, assign a - * dummy hardware IRQ number. This is used in the ->irq_set_type() - * and ->irq_set_wake() callbacks to return early for these IRQs. - */ - if (i == soc->num_wake_events) { - err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX, - &pmc_irqchip, pmc); - - /* - * Interrupts without a wake event don't have a corresponding - * interrupt in the parent controller (GIC). Pass NULL for the - * chip here, which causes a dummy IRQ chip to be installed - * for the interrupt in the parent domain, to make this - * explicit. - */ - if (domain->parent) - irq_domain_set_hwirq_and_chip(domain->parent, virq, 0, - NULL, NULL); - } + if (i == soc->num_wake_events) + trim_hierarchy(virq, domain); return err; } @@ -2094,9 +2087,6 @@ static int tegra210_pmc_irq_set_wake(struct irq_data *data, unsigned int on) unsigned int offset, bit; u32 value; - if (data->hwirq == ULONG_MAX) - return 0; - offset = data->hwirq / 32; bit = data->hwirq % 32; @@ -2131,9 +2121,6 @@ static int tegra210_pmc_irq_set_type(struct irq_data *data, unsigned int type) unsigned int offset, bit; u32 value; - if (data->hwirq == ULONG_MAX) - return 0; - offset = data->hwirq / 32; bit = data->hwirq % 32; @@ -2174,10 +2161,6 @@ static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on) unsigned int offset, bit; u32 value; - /* nothing to do if there's no associated wake event */ - if (WARN_ON(data->hwirq == ULONG_MAX)) - return 0; - offset = data->hwirq / 32; bit = data->hwirq % 32; @@ -2205,10 +2188,6 @@ static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type) struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); u32 value; - /* nothing to do if there's no associated wake event */ - if (data->hwirq == ULONG_MAX) - return 0; - value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); switch (type) {