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Wed, 9 Sep 2020 13:27:32 -0500 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [PATCH] PR rtl-optimization/96791 Check precision of partial modes Date: Wed, 9 Sep 2020 13:27:23 -0500 Message-Id: <20200909182723.46246-1-acsawdey@linux.ibm.com> X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-09_13:2020-09-09, 2020-09-09 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 bulkscore=0 phishscore=0 mlxlogscore=999 impostorscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=1 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009090156 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Aaron Sawdey via Gcc-patches From: Aaron Sawdey Reply-To: Aaron Sawdey Cc: jakub@redhat.com, wschmidt@linux.ibm.com, segher@kernel.crashing.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Now that the documentation for partial modes says they have a known number of bits of precision, would it make sense for extract_low_bits to check this before attempting to extract the bits? This would solve the problem we have been having with POImode and extract_low_bits -- DSE tries to use it to extract part of a POImode register used in a previous store. We do not want to supply any patterns to make POImode (or OImode) used like a regular integer mode. This patch adds such a check, and sets the precision of POImode to one bit, which resolves the problems of PR/96791 for ppc64 target. Bootstrap passes on ppc64le and x86_64. Thanks, Aaron gcc/ChangeLog: * config/rs6000/rs6000-modes.def (POImode): Change precision. * expmed.c (extract_low_bits): Check precision. --- gcc/config/rs6000/rs6000-modes.def | 2 +- gcc/expmed.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def index ddb218b3fba..aa7d60dd835 100644 --- a/gcc/config/rs6000/rs6000-modes.def +++ b/gcc/config/rs6000/rs6000-modes.def @@ -90,5 +90,5 @@ INT_MODE (OI, 32); INT_MODE (XI, 64); /* Modes used by __vector_pair and __vector_quad. */ -PARTIAL_INT_MODE (OI, 256, POI); /* __vector_pair. */ +PARTIAL_INT_MODE (OI, 1, POI); /* __vector_pair. */ PARTIAL_INT_MODE (XI, 512, PXI); /* __vector_quad. */ diff --git a/gcc/expmed.c b/gcc/expmed.c index d34f0fb0b54..23ca181afa6 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -2396,6 +2396,9 @@ extract_low_bits (machine_mode mode, machine_mode src_mode, rtx src) if (GET_MODE_CLASS (mode) == MODE_CC || GET_MODE_CLASS (src_mode) == MODE_CC) return NULL_RTX; + if (known_lt (GET_MODE_PRECISION (src_mode), GET_MODE_BITSIZE (mode))) + return NULL_RTX; + if (known_eq (GET_MODE_BITSIZE (mode), GET_MODE_BITSIZE (src_mode)) && targetm.modes_tieable_p (mode, src_mode)) {