From patchwork Wed Aug 12 16:46:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343786 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbG84xFCz9sPf for ; Thu, 13 Aug 2020 02:47:12 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726521AbgHLQrJ (ORCPT ); Wed, 12 Aug 2020 12:47:09 -0400 Received: from mga12.intel.com ([192.55.52.136]:33828 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726394AbgHLQrI (ORCPT ); Wed, 12 Aug 2020 12:47:08 -0400 IronPort-SDR: PkaV/d9bU5Pg7VW8qELaoiaL0yZQgM10zOxChMvPnQa0NXgL860tV1LrZfjN/szd1DKcIDbDwO a6ukUs1F4rwg== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538389" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538389" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:07 -0700 IronPort-SDR: b8eOHR1NQzanN969njNyHEnzjMgpZlCLzkNOytP+y0XDTXVqBJC5puT4+W4bKt+RfK1WG0tqJ/ /ulUp7ZNKvPA== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442595" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:05 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/10] PCI/RCEC: Add RCEC class code and extended capability Date: Wed, 12 Aug 2020 09:46:50 -0700 Message-Id: <20200812164659.1118946-2-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo A PCIe Root Complex Event Collector(RCEC) has the base class 0x08, sub-class 0x07, and programming interface 0x00. Add the class code 0x0807 to identify RCEC devices and add the defines for the RCEC Endpoint Association Extended Capability. See PCI Express Base Specification, version 5.0-1, section "1.3.4 Root Complex Event Collector" and section "7.9.10 Root Complex Event Collector Endpoint Association Extended Capability" Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- include/linux/pci_ids.h | 1 + include/uapi/linux/pci_regs.h | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 0ad57693f392..de8dff1fb176 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -81,6 +81,7 @@ #define PCI_CLASS_SYSTEM_RTC 0x0803 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 #define PCI_CLASS_SYSTEM_SDHCI 0x0805 +#define PCI_CLASS_SYSTEM_RCEC 0x0807 #define PCI_CLASS_SYSTEM_OTHER 0x0880 #define PCI_BASE_CLASS_INPUT 0x09 diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index f9701410d3b5..f335f65f65d6 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -828,6 +828,13 @@ #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ #define PCI_EXT_CAP_PWR_SIZEOF 16 +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_RCIEP_BITMAP 4 /* Associated Bitmap for RCiEPs */ +#define PCI_RCEC_BUSN 8 /* RCEC Associated Bus Numbers */ +#define PCI_RCEC_BUSN_REG_VER 0x02 /* Least capability version that BUSN present */ +#define PCI_RCEC_BUSN_NEXT(x) (((x) >> 8) & 0xff) +#define PCI_RCEC_BUSN_LAST(x) (((x) >> 16) & 0xff) + /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */ #define PCI_VNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_VNDR_HEADER_ID(x) ((x) & 0xffff) From patchwork Wed Aug 12 16:46:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343795 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbHW2pSqz9sPB for ; Thu, 13 Aug 2020 02:48:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726941AbgHLQsD (ORCPT ); Wed, 12 Aug 2020 12:48:03 -0400 Received: from mga12.intel.com ([192.55.52.136]:33828 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726515AbgHLQrJ (ORCPT ); Wed, 12 Aug 2020 12:47:09 -0400 IronPort-SDR: PLd8YpKRkvi4LRRkeQHXkGyvYpFvwXULLjj72yUpfDEDghQLH0Pmc6zrr1Jt/OZ5SC4qN8bzvA 8wj8F4NNM2bQ== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538407" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538407" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:08 -0700 IronPort-SDR: VJy/qUjKBiSitXn1k39kLkfO8iLO7E3q/Msk0m572NgQrTH+aIvVwpYmucDHcCrKM8l9ES3GoU CLAcB0gJQmjQ== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442616" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:07 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 02/10] PCI/RCEC: Bind RCEC devices to the Root Port driver Date: Wed, 12 Aug 2020 09:46:51 -0700 Message-Id: <20200812164659.1118946-3-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors may optionally be sent to a corresponding Root Complex Event Collector (RCEC). Each RCiEP must be associated with no more than one RCEC. Interface errors are reported to the OS by RCECs. For an RCEC (technically not a Bridge), error messages "received" from associated RCiEPs must be enabled for "transmission" in order to cause a System Error via the Root Control register or (when the Advanced Error Reporting Capability is present) reporting via the Root Error Command register and logging in the Root Error Status register and Error Source Identification register. Given the commonality with Root Ports and the need to also support AER and PME services for RCECs, extend the Root Port driver to support RCEC devices through the addition of the RCEC Class ID to the driver structure. Co-developed-by: Sean V Kelley Signed-off-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/portdrv_core.c | 8 ++++---- drivers/pci/pcie/portdrv_pci.c | 5 ++++- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 50a9522ab07d..99769c636775 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -234,11 +234,11 @@ static int get_port_device_capability(struct pci_dev *dev) #endif /* - * Root ports are capable of generating PME too. Root Complex - * Event Collectors can also generate PMEs, but we don't handle - * those yet. + * Root ports and Root Complex Event Collectors are capable + * of generating PME. */ - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && (pcie_ports_native || host->native_pme)) { services |= PCIE_PORT_SERVICE_PME; diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 3acf151ae015..d5b109499b10 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev *dev, if (!pci_is_pcie(dev) || ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) return -ENODEV; status = pcie_port_device_register(dev); @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] = { { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, + /* handle any Root Complex Event Collector */ + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, { }, }; From patchwork Wed Aug 12 16:46:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343787 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbGD2tPDz9sPf for ; Thu, 13 Aug 2020 02:47:16 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726150AbgHLQrM (ORCPT ); Wed, 12 Aug 2020 12:47:12 -0400 Received: from mga12.intel.com ([192.55.52.136]:33828 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726547AbgHLQrK (ORCPT ); Wed, 12 Aug 2020 12:47:10 -0400 IronPort-SDR: 7fesAAP4YTNIkGXHDFJWBxQN0v4Oe0nb6ILT8yatXGxqbmQhmxEprq3hj190qalwIeSclUuPIs jFr00WqljLvA== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538428" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538428" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:09 -0700 IronPort-SDR: WfIq6K9UF2mefIShKwCsel/XWhJhGSkZI1Nuq7vPPJdrjOsNNYxmt/HMQM4FOaO4ty/ZxJ0icV +w5NGklKVKTg== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442633" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:08 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 03/10] PCI/RCEC: Cache RCEC capabilities in pci_init_capabilities() Date: Wed, 12 Aug 2020 09:46:52 -0700 Message-Id: <20200812164659.1118946-4-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Extend support for Root Complex Event Collectors by decoding and caching the RCEC Endpoint Association Extended Capabilities when enumerating. Use that cached information for later error source reporting. See PCI Express Base Specification, version 5.0-1, section 7.9.10. Suggested-by: Bjorn Helgaas Co-developed-by: Qiuxu Zhuo Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley --- drivers/pci/pci.h | 18 ++++++++++++++ drivers/pci/pcie/Makefile | 2 +- drivers/pci/pcie/rcec.c | 52 +++++++++++++++++++++++++++++++++++++++ drivers/pci/probe.c | 2 ++ include/linux/pci.h | 4 +++ 5 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 drivers/pci/pcie/rcec.c diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 6d3f75867106..bd25e6047b54 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -448,6 +448,16 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info); void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); #endif /* CONFIG_PCIEAER */ +#ifdef CONFIG_PCIEPORTBUS +/* Cached RCEC Associated Endpoint Extended Capabilities */ +struct rcec_ext { + u8 ver; + u8 nextbusn; + u8 lastbusn; + u32 bitmap; +}; +#endif + #ifdef CONFIG_PCIE_DPC void pci_save_dpc_state(struct pci_dev *dev); void pci_restore_dpc_state(struct pci_dev *dev); @@ -460,6 +470,14 @@ static inline void pci_restore_dpc_state(struct pci_dev *dev) {} static inline void pci_dpc_init(struct pci_dev *pdev) {} #endif +#ifdef CONFIG_PCIEPORTBUS +void pci_rcec_init(struct pci_dev *dev); +void pci_rcec_exit(struct pci_dev *dev); +#else +static inline void pci_rcec_init(struct pci_dev *dev) {} +static inline void pci_rcec_exit(struct pci_dev *dev) {} +#endif + #ifdef CONFIG_PCI_ATS /* Address Translation Service */ void pci_ats_init(struct pci_dev *dev); diff --git a/drivers/pci/pcie/Makefile b/drivers/pci/pcie/Makefile index 68da9280ff11..d9697892fa3e 100644 --- a/drivers/pci/pcie/Makefile +++ b/drivers/pci/pcie/Makefile @@ -2,7 +2,7 @@ # # Makefile for PCI Express features and port driver -pcieportdrv-y := portdrv_core.o portdrv_pci.o err.o +pcieportdrv-y := portdrv_core.o portdrv_pci.o err.o rcec.o obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o diff --git a/drivers/pci/pcie/rcec.c b/drivers/pci/pcie/rcec.c new file mode 100644 index 000000000000..519ae086ff41 --- /dev/null +++ b/drivers/pci/pcie/rcec.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Root Complex Event Collector Support + * + * Authors: + * Sean V Kelley + * Qiuxu Zhuo + * + * Copyright (C) 2020 Intel Corp. + */ + +#include +#include +#include +#include +#include + +#include "../pci.h" + +void pci_rcec_init(struct pci_dev *dev) +{ + u32 rcec, hdr, busn; + + /* Only for Root Complex Event Collectors */ + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC) + return; + + dev->rcec_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_RCEC); + if (!dev->rcec_cap) + return; + + dev->rcec_ext = kzalloc(sizeof(*dev->rcec_ext), GFP_KERNEL); + + rcec = dev->rcec_cap; + pci_read_config_dword(dev, rcec + PCI_RCEC_RCIEP_BITMAP, &dev->rcec_ext->bitmap); + + /* Check whether RCEC BUSN register is present */ + pci_read_config_dword(dev, rcec, &hdr); + dev->rcec_ext->ver = PCI_EXT_CAP_VER(hdr); + if (dev->rcec_ext->ver < PCI_RCEC_BUSN_REG_VER) + return; + + pci_read_config_dword(dev, rcec + PCI_RCEC_BUSN, &busn); + dev->rcec_ext->nextbusn = PCI_RCEC_BUSN_NEXT(busn); + dev->rcec_ext->lastbusn = PCI_RCEC_BUSN_LAST(busn); +} + +void pci_rcec_exit(struct pci_dev *dev) +{ + kfree(dev->rcec_ext); + dev->rcec_ext = NULL; +} diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2f66988cea25..2ad1e3e4ee6a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2195,6 +2195,7 @@ static void pci_configure_device(struct pci_dev *dev) static void pci_release_capabilities(struct pci_dev *dev) { pci_aer_exit(dev); + pci_rcec_exit(dev); pci_vpd_release(dev); pci_iov_release(dev); pci_free_cap_save_buffers(dev); @@ -2394,6 +2395,7 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_ptm_init(dev); /* Precision Time Measurement */ pci_aer_init(dev); /* Advanced Error Reporting */ pci_dpc_init(dev); /* Downstream Port Containment */ + pci_rcec_init(dev); /* Root Complex Event Collector */ pcie_report_downtraining(dev); diff --git a/include/linux/pci.h b/include/linux/pci.h index c79d83304e52..c7fc5726872c 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -326,6 +326,10 @@ struct pci_dev { #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ struct aer_stats *aer_stats; /* AER stats for this device */ +#endif +#ifdef CONFIG_PCIEPORTBUS + u16 rcec_cap; /* RCEC capability offset */ + struct rcec_ext *rcec_ext; /* RCEC cached assoc. endpoint extended capabilities */ #endif u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ From patchwork Wed Aug 12 16:46:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343793 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbH80Pklz9sPB for ; Thu, 13 Aug 2020 02:48:04 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726937AbgHLQsD (ORCPT ); Wed, 12 Aug 2020 12:48:03 -0400 Received: from mga12.intel.com ([192.55.52.136]:33836 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726447AbgHLQrL (ORCPT ); Wed, 12 Aug 2020 12:47:11 -0400 IronPort-SDR: DDvCsuyrDAHsp3AgejIwAh++IT1Af/sWm/PQ/PnOU03O4WHIeRxp9427jEgCCZ7paZyOGAypIe PU6GQkWGfAjg== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538449" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538449" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:11 -0700 IronPort-SDR: OHDl33/J5XLHhhmwvj6D63wmC3Pef4NnvhAPqxgkdg/LIEyQHFzLSC/Y9ZV3JEwhHpJmHgxO+i Px9unan06c4Q== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442647" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:10 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 04/10] PCI/RCEC: Add pcie_walk_rcec() to walk associated RCiEPs Date: Wed, 12 Aug 2020 09:46:53 -0700 Message-Id: <20200812164659.1118946-5-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo When an RCEC device signals error(s) to a CPU core, the CPU core needs to walk all the RCiEPs associated with that RCEC to check errors. So add the function pcie_walk_rcec() to walk all RCiEPs associated with the RCEC device. Co-developed-by: Sean V Kelley Signed-off-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- drivers/pci/pci.h | 4 +++ drivers/pci/pcie/rcec.c | 76 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bd25e6047b54..8bd7528d6977 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -473,9 +473,13 @@ static inline void pci_dpc_init(struct pci_dev *pdev) {} #ifdef CONFIG_PCIEPORTBUS void pci_rcec_init(struct pci_dev *dev); void pci_rcec_exit(struct pci_dev *dev); +void pcie_walk_rcec(struct pci_dev *rcec, int (*cb)(struct pci_dev *, void *), + void *userdata); #else static inline void pci_rcec_init(struct pci_dev *dev) {} static inline void pci_rcec_exit(struct pci_dev *dev) {} +static inline void pcie_walk_rcec(struct pci_dev *rcec, int (*cb)(struct pci_dev *, void *), + void *userdata) {} #endif #ifdef CONFIG_PCI_ATS diff --git a/drivers/pci/pcie/rcec.c b/drivers/pci/pcie/rcec.c index 519ae086ff41..405f92fcdf7f 100644 --- a/drivers/pci/pcie/rcec.c +++ b/drivers/pci/pcie/rcec.c @@ -17,6 +17,82 @@ #include "../pci.h" +static int pcie_walk_rciep_devfn(struct pci_bus *bus, int (*cb)(struct pci_dev *, void *), + void *userdata, const unsigned long bitmap) +{ + unsigned int devn, fn; + struct pci_dev *dev; + int retval; + + for_each_set_bit(devn, &bitmap, 32) { + for (fn = 0; fn < 8; fn++) { + dev = pci_get_slot(bus, PCI_DEVFN(devn, fn)); + + if (!dev) + continue; + + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END) { + pci_dev_put(dev); + continue; + } + + retval = cb(dev, userdata); + pci_dev_put(dev); + if (retval) + return retval; + } + } + + return 0; +} + +/** + * pcie_walk_rcec - Walk RCiEP devices associating with RCEC and call callback. + * @rcec RCEC whose RCiEP devices should be walked. + * @cb Callback to be called for each RCiEP device found. + * @userdata Arbitrary pointer to be passed to callback. + * + * Walk the given RCEC. Call the provided callback on each RCiEP device found. + * + * We check the return of @cb each time. If it returns anything + * other than 0, we break out. + */ +void pcie_walk_rcec(struct pci_dev *rcec, int (*cb)(struct pci_dev *, void *), + void *userdata) +{ + u8 nextbusn, lastbusn; + struct pci_bus *bus; + unsigned int bnr; + + if (!rcec->rcec_cap) + return; + + /* Find RCiEP devices on the same bus as the RCEC */ + if (pcie_walk_rciep_devfn(rcec->bus, cb, userdata, rcec->rcec_ext->bitmap)) + return; + + /* Check whether RCEC BUSN register is present */ + if (rcec->rcec_ext->ver < PCI_RCEC_BUSN_REG_VER) + return; + + nextbusn = rcec->rcec_ext->nextbusn; + lastbusn = rcec->rcec_ext->lastbusn; + + /* All RCiEP devices are on the same bus as the RCEC */ + if (nextbusn == 0xff && lastbusn == 0x00) + return; + + for (bnr = nextbusn; bnr <= lastbusn; bnr++) { + bus = pci_find_bus(pci_domain_nr(rcec->bus), bnr); + if (!bus) + continue; + + /* Find RCiEP devices on the given bus */ + if (pcie_walk_rciep_devfn(bus, cb, userdata, 0xffffffff)) + return; + } +} + void pci_rcec_init(struct pci_dev *dev) { u32 rcec, hdr, busn; From patchwork Wed Aug 12 16:46:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343794 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbH86FB9z9sPf for ; Thu, 13 Aug 2020 02:48:04 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726816AbgHLQsC (ORCPT ); Wed, 12 Aug 2020 12:48:02 -0400 Received: from mga12.intel.com ([192.55.52.136]:33838 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726606AbgHLQrN (ORCPT ); Wed, 12 Aug 2020 12:47:13 -0400 IronPort-SDR: MkHVowOqroL8J7xuyM+ibIDJoeOYqN/pLWKw6PrmMY7SZrMZfSByHUCie0OeZAeiZbLXWuEkXm 9CbW4aOXjkng== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538464" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538464" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:12 -0700 IronPort-SDR: 1usNJC4I6Z39CKWSjsA+0w4qCUSzb+YS7JqEe734Y1dW2jAMoHl8ek2c9A8E23K411BOxaEtv0 3EfsvjWiGXiw== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442654" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:11 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 05/10] PCI/AER: Extend AER error handling to RCECs Date: Wed, 12 Aug 2020 09:46:54 -0700 Message-Id: <20200812164659.1118946-6-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jonathan Cameron Currently the kernel does not handle AER errors for Root Complex integrated End Points (RCiEPs)[0]. These devices sit on a root bus within the Root Complex (RC). AER handling is performed by a Root Complex Event Collector (RCEC) [1] which is a effectively a type of RCiEP on the same root bus. For an RCEC (technically not a Bridge), error messages "received" from associated RCiEPs must be enabled for "transmission" in order to cause a System Error via the Root Control register or (when the Advanced Error Reporting Capability is present) reporting via the Root Error Command register and logging in the Root Error Status register and Error Source Identification register. In addition to the defined OS level handling of the reset flow for the associated RCiEPs of an RCEC, it is possible to also have non-native handling. In that case there is no need to take any actions on the RCEC because the firmware is responsible for them. This is true where APEI [2] is used to report the AER errors via a GHES[v2] HEST entry [3] and relevant AER CPER record [4] and non-native handling is in use. We effectively end up with two different types of discovery for purposes of handling AER errors: 1) Normal bus walk - we pass the downstream port above a bus to which the device is attached and it walks everything below that point. 2) An RCiEP with no visible association with an RCEC as there is no need to walk devices. In that case, the flow is to just call the callbacks for the actual device. A new walk function pci_walk_dev_affected(), similar to pci_bus_walk(), is provided that takes a pci_dev instead of a bus. If that dev corresponds to a downstream port it will walk the subordinate bus of that downstream port. If the dev does not then it will call the function on that device alone. [0] ACPI PCI Express Base Specification 5.0-1 1.3.2.3 Root Complex Integrated Endpoint Rules. [1] ACPI PCI Express Base Specification 5.0-1 6.2 Error Signalling and Logging [2] ACPI Specification 6.3 Chapter 18 ACPI Platform Error Interface (APEI) [3] ACPI Specification 6.3 18.2.3.7 Generic Hardware Error Source [4] UEFI Specification 2.8, N.2.7 PCI Express Error Section Signed-off-by: Jonathan Cameron Signed-off-by: Sean V Kelley --- drivers/pci/pcie/err.c | 54 ++++++++++++++++++++++++++++++++++-------- 1 file changed, 44 insertions(+), 10 deletions(-) diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index 14bb8f54723e..f4cfb37c26c1 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -146,38 +146,68 @@ static int report_resume(struct pci_dev *dev, void *data) return 0; } +/** + * pci_walk_dev_affected - walk devices potentially AER affected + * @dev device which may be an RCEC with associated RCiEPs, + * an RCiEP associated with an RCEC, or a Port. + * @cb callback to be called for each device found + * @userdata arbitrary pointer to be passed to callback. + * + * If the device provided is a bridge, walk the subordinate bus, + * including any bridged devices on buses under this bus. + * Call the provided callback on each device found. + * + * If the device provided has no subordinate bus, call the provided + * callback on the device itself. + */ +static void pci_walk_dev_affected(struct pci_dev *dev, int (*cb)(struct pci_dev *, void *), + void *userdata) +{ + if (dev->subordinate) + pci_walk_bus(dev->subordinate, cb, userdata); + else + cb(dev, userdata); +} + pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state, pci_ers_result_t (*reset_link)(struct pci_dev *pdev)) { pci_ers_result_t status = PCI_ERS_RESULT_CAN_RECOVER; - struct pci_bus *bus; /* * Error recovery runs on all subordinates of the first downstream port. * If the downstream port detected the error, it is cleared at the end. + * For RCiEPs we should reset just the RCiEP itself. */ if (!(pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || - pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)) + pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC)) dev = dev->bus->self; - bus = dev->subordinate; pci_dbg(dev, "broadcast error_detected message\n"); if (state == pci_channel_io_frozen) { - pci_walk_bus(bus, report_frozen_detected, &status); + pci_walk_dev_affected(dev, report_frozen_detected, &status); + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { + pci_warn(dev, "link reset not possible for RCiEP\n"); + status = PCI_ERS_RESULT_NONE; + goto failed; + } + status = reset_link(dev); if (status != PCI_ERS_RESULT_RECOVERED) { pci_warn(dev, "link reset failed\n"); goto failed; } } else { - pci_walk_bus(bus, report_normal_detected, &status); + pci_walk_dev_affected(dev, report_normal_detected, &status); } if (status == PCI_ERS_RESULT_CAN_RECOVER) { status = PCI_ERS_RESULT_RECOVERED; pci_dbg(dev, "broadcast mmio_enabled message\n"); - pci_walk_bus(bus, report_mmio_enabled, &status); + pci_walk_dev_affected(dev, report_mmio_enabled, &status); } if (status == PCI_ERS_RESULT_NEED_RESET) { @@ -188,17 +218,21 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, */ status = PCI_ERS_RESULT_RECOVERED; pci_dbg(dev, "broadcast slot_reset message\n"); - pci_walk_bus(bus, report_slot_reset, &status); + pci_walk_dev_affected(dev, report_slot_reset, &status); } if (status != PCI_ERS_RESULT_RECOVERED) goto failed; pci_dbg(dev, "broadcast resume message\n"); - pci_walk_bus(bus, report_resume, &status); + pci_walk_dev_affected(dev, report_resume, &status); - pci_aer_clear_device_status(dev); - pci_aer_clear_nonfatal_status(dev); + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC)) { + pci_aer_clear_device_status(dev); + pci_aer_clear_nonfatal_status(dev); + } pci_info(dev, "device recovery successful\n"); return status; From patchwork Wed Aug 12 16:46:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343791 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbGx009jz9sPf for ; Thu, 13 Aug 2020 02:47:52 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726673AbgHLQrQ (ORCPT ); Wed, 12 Aug 2020 12:47:16 -0400 Received: from mga12.intel.com ([192.55.52.136]:33838 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726658AbgHLQrP (ORCPT ); Wed, 12 Aug 2020 12:47:15 -0400 IronPort-SDR: LSW3x6iVjQkYPT8nSmdxZNIPSdHJ/3iLJ+foDi6Q6gq7aEw9SJyGuNScr7fiL40BkgRTC3s4/p URmn79nj4HYg== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538471" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538471" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:13 -0700 IronPort-SDR: eM0D08NxoFH0wa2lP+KXgaTWauOydyTUqplnsAun0g0EhMja4aFY223BYz6QmcUtBErGbIpkAx 3RcN4KVLhM7A== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442661" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:12 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 06/10] PCI/AER: Apply function level reset to RCiEP on fatal error Date: Wed, 12 Aug 2020 09:46:55 -0700 Message-Id: <20200812164659.1118946-7-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo Attempt to do function level reset for an RCiEP associated with an RCEC device on fatal error. Signed-off-by: Qiuxu Zhuo --- drivers/pci/pcie/err.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index f4cfb37c26c1..04528b57876b 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -169,6 +169,17 @@ static void pci_walk_dev_affected(struct pci_dev *dev, int (*cb)(struct pci_dev cb(dev, userdata); } +static enum pci_ers_result flr_on_rciep(struct pci_dev *dev) +{ + if (!pcie_has_flr(dev)) + return PCI_ERS_RESULT_NONE; + + if (pcie_flr(dev)) + return PCI_ERS_RESULT_DISCONNECT; + + return PCI_ERS_RESULT_RECOVERED; +} + pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state, pci_ers_result_t (*reset_link)(struct pci_dev *pdev)) @@ -190,15 +201,17 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, if (state == pci_channel_io_frozen) { pci_walk_dev_affected(dev, report_frozen_detected, &status); if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { - pci_warn(dev, "link reset not possible for RCiEP\n"); - status = PCI_ERS_RESULT_NONE; - goto failed; - } - - status = reset_link(dev); - if (status != PCI_ERS_RESULT_RECOVERED) { - pci_warn(dev, "link reset failed\n"); - goto failed; + status = flr_on_rciep(dev); + if (status != PCI_ERS_RESULT_RECOVERED) { + pci_warn(dev, "function level reset failed\n"); + goto failed; + } + } else { + status = reset_link(dev); + if (status != PCI_ERS_RESULT_RECOVERED) { + pci_warn(dev, "link reset failed\n"); + goto failed; + } } } else { pci_walk_dev_affected(dev, report_normal_detected, &status); From patchwork Wed Aug 12 16:46:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343788 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbGG4Z22z9sPf for ; Thu, 13 Aug 2020 02:47:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726749AbgHLQrR (ORCPT ); Wed, 12 Aug 2020 12:47:17 -0400 Received: from mga12.intel.com ([192.55.52.136]:33838 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726394AbgHLQrQ (ORCPT ); Wed, 12 Aug 2020 12:47:16 -0400 IronPort-SDR: tzBxlSL46TwXODiNxfCbjt9vLPe0xxWFRs3fZCDAPj8dFIx/s8iM0NziKv4ovpE7jNwY0aAZz0 ykvVdMaxEGtg== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538490" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538490" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:15 -0700 IronPort-SDR: mWsRAJl50r5pU7b589S8H4vR3+uN2S+dBuivFDocEQhO4yRd/r+ba3nT0Cb3uYYE8iPX2JAFtC 1QOWV21YUjwg== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442667" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:13 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 07/10] PCI: Add 'rcec' field to pci_dev for associated RCiEPs Date: Wed, 12 Aug 2020 09:46:56 -0700 Message-Id: <20200812164659.1118946-8-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo When attempting error recovery for an RCiEP associated with an RCEC device, there needs to be a way to update the Root Error Status, the Uncorrectable Error Status and the Uncorrectable Error Severity of the parent RCEC. So add the 'rcec' field to the pci_dev structure and provide a hook for the Root Port Driver to associate RCiEPs with their respective parent RCEC. Signed-off-by: Qiuxu Zhuo Co-developed-by: Sean V Kelley Signed-off-by: Sean V Kelley --- drivers/pci/pcie/aer.c | 9 +++++---- drivers/pci/pcie/err.c | 10 ++++++++++ drivers/pci/pcie/portdrv_pci.c | 15 +++++++++++++++ include/linux/pci.h | 1 + 4 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 3acf56683915..f1bf06be449e 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1335,17 +1335,18 @@ static int aer_probe(struct pcie_device *dev) static pci_ers_result_t aer_root_reset(struct pci_dev *dev) { int aer = dev->aer_cap; + int rc = 0; u32 reg32; - int rc; - /* Disable Root's interrupt in response to error messages */ pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, ®32); reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, reg32); - rc = pci_bus_error_reset(dev); - pci_info(dev, "Root Port link has been reset\n"); + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC) { + rc = pci_bus_error_reset(dev); + pci_info(dev, "Root Port link has been reset\n"); + } /* Clear Root Error Status */ pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, ®32); diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index 04528b57876b..a5b7e708079d 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -202,6 +202,12 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, pci_walk_dev_affected(dev, report_frozen_detected, &status); if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { status = flr_on_rciep(dev); + /* + * The callback only clears the Root Error Status + * of the RCEC (see aer.c). + */ + if (dev->rcec) + reset_link(dev->rcec); if (status != PCI_ERS_RESULT_RECOVERED) { pci_warn(dev, "function level reset failed\n"); goto failed; @@ -245,7 +251,11 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC)) { pci_aer_clear_device_status(dev); pci_aer_clear_nonfatal_status(dev); + } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END && dev->rcec) { + pci_aer_clear_device_status(dev->rcec); + pci_aer_clear_nonfatal_status(dev->rcec); } + pci_info(dev, "device recovery successful\n"); return status; diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index d5b109499b10..a64e88b7166b 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -90,6 +90,18 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = { #define PCIE_PORTDRV_PM_OPS NULL #endif /* !PM */ +static int pcie_hook_rcec(struct pci_dev *pdev, void *data) +{ + struct pci_dev *rcec = (struct pci_dev *)data; + + pdev->rcec = rcec; + pci_dbg(rcec, "RCiEP(under an RCEC) %04x:%02x:%02x.%d\n", + pci_domain_nr(pdev->bus), pdev->bus->number, + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + + return 0; +} + /* * pcie_portdrv_probe - Probe PCI-Express port devices * @dev: PCI-Express port device being probed @@ -110,6 +122,9 @@ static int pcie_portdrv_probe(struct pci_dev *dev, (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) return -ENODEV; + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(dev, pcie_hook_rcec, dev); + status = pcie_port_device_register(dev); if (status) return status; diff --git a/include/linux/pci.h b/include/linux/pci.h index c7fc5726872c..ba29816c827b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -330,6 +330,7 @@ struct pci_dev { #ifdef CONFIG_PCIEPORTBUS u16 rcec_cap; /* RCEC capability offset */ struct rcec_ext *rcec_ext; /* RCEC cached assoc. endpoint extended capabilities */ + struct pci_dev *rcec; /* Associated RCEC device */ #endif u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ From patchwork Wed Aug 12 16:46:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343789 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbGW06HHz9sPB for ; Thu, 13 Aug 2020 02:47:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726830AbgHLQr2 (ORCPT ); Wed, 12 Aug 2020 12:47:28 -0400 Received: from mga12.intel.com ([192.55.52.136]:33838 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726786AbgHLQrW (ORCPT ); Wed, 12 Aug 2020 12:47:22 -0400 IronPort-SDR: mbcrA3+YGLNhMEU0ESDMX+DKBfcjSRCIX3DFLDgdYzKEmOmcG0IqpsKUhKSAMj7HZF2O6j0E9Q iZH+AptgBzXg== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538550" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538550" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:21 -0700 IronPort-SDR: 30uKhcN5WKxTowUyr9FZlO4LWXaokyUEMH7z/IUe9/XkG70f6SvCePnLPjvdiFMrXxGvFCjvGF ubTwS15foDRQ== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442678" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:16 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 08/10] PCI/AER: Add RCEC AER handling Date: Wed, 12 Aug 2020 09:46:57 -0700 Message-Id: <20200812164659.1118946-9-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The Root Complex Event Collectors(RCEC) appear as peers to Root Ports and also have the AER capability. So add RCEC support to the current AER service driver and attach the AER service driver to the RCEC device. Co-developed-by: Qiuxu Zhuo Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/aer.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index f1bf06be449e..b6c7bbbc8f97 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -303,7 +303,7 @@ int pci_aer_raw_clear_status(struct pci_dev *dev) return -EIO; port_type = pci_pcie_type(dev); - if (port_type == PCI_EXP_TYPE_ROOT_PORT) { + if (port_type == PCI_EXP_TYPE_ROOT_PORT || port_type == PCI_EXP_TYPE_RC_EC) { pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, &status); pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, status); } @@ -577,7 +577,8 @@ static umode_t aer_stats_attrs_are_visible(struct kobject *kobj, if ((a == &dev_attr_aer_rootport_total_err_cor.attr || a == &dev_attr_aer_rootport_total_err_fatal.attr || a == &dev_attr_aer_rootport_total_err_nonfatal.attr) && - pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) + ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) && + (pci_pcie_type(pdev) != PCI_EXP_TYPE_RC_EC))) return 0; return a->mode; @@ -894,7 +895,10 @@ static bool find_source_device(struct pci_dev *parent, if (result) return true; - pci_walk_bus(parent->subordinate, find_device_iter, e_info); + if (pci_pcie_type(parent) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(parent, find_device_iter, e_info); + else + pci_walk_bus(parent->subordinate, find_device_iter, e_info); if (!e_info->error_dev_num) { pci_info(parent, "can't find device of ID%04x\n", e_info->id); @@ -1030,6 +1034,7 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) if (!(info->status & ~info->mask)) return 0; } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC || pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || info->severity == AER_NONFATAL) { @@ -1182,6 +1187,7 @@ static int set_device_error_reporting(struct pci_dev *dev, void *data) int type = pci_pcie_type(dev); if ((type == PCI_EXP_TYPE_ROOT_PORT) || + (type == PCI_EXP_TYPE_RC_EC) || (type == PCI_EXP_TYPE_UPSTREAM) || (type == PCI_EXP_TYPE_DOWNSTREAM)) { if (enable) @@ -1206,9 +1212,11 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev, { set_device_error_reporting(dev, &enable); - if (!dev->subordinate) - return; - pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable); + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(dev, set_device_error_reporting, &enable); + else if (dev->subordinate) + pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable); + } /** @@ -1306,6 +1314,11 @@ static int aer_probe(struct pcie_device *dev) struct device *device = &dev->device; struct pci_dev *port = dev->port; + /* Limit to Root Ports or Root Complex Event Collectors */ + if ((pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC) && + (pci_pcie_type(port) != PCI_EXP_TYPE_ROOT_PORT)) + return -ENODEV; + rpc = devm_kzalloc(device, sizeof(struct aer_rpc), GFP_KERNEL); if (!rpc) return -ENOMEM; @@ -1362,7 +1375,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) static struct pcie_port_service_driver aerdriver = { .name = "aer", - .port_type = PCI_EXP_TYPE_ROOT_PORT, + .port_type = PCIE_ANY_PORT, .service = PCIE_PORT_SERVICE_AER, .probe = aer_probe, From patchwork Wed Aug 12 16:46:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343790 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbGm3q23z9sR4 for ; Thu, 13 Aug 2020 02:47:44 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726841AbgHLQr3 (ORCPT ); Wed, 12 Aug 2020 12:47:29 -0400 Received: from mga12.intel.com ([192.55.52.136]:33855 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726795AbgHLQrW (ORCPT ); Wed, 12 Aug 2020 12:47:22 -0400 IronPort-SDR: GGGgJkOyIhRcctK33uRe6veTaQIYE1pAV39jrhNwGn16LIn51gIjDacoSRBgfUfqYsW6VigTqu 0vi0ogfZ4knA== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538552" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538552" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:21 -0700 IronPort-SDR: cbLKL/8WIAyoNtrb1KYcOslIR5+hmpOtPpKmEAkaYntd+htkN81wVjtvKsicM4NbACBST50e1b pgHWVU0Ik4RA== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442694" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:18 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 09/10] PCI/PME: Add RCEC PME handling Date: Wed, 12 Aug 2020 09:46:58 -0700 Message-Id: <20200812164659.1118946-10-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The Root Complex Event Collectors(RCEC) appear as peers of Root Ports and also have the PME capability. So add RCEC support to the current PME service driver and attach the PME service driver to the RCEC device. Co-developed-by: Qiuxu Zhuo Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/pme.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c index 6a32970bb731..87799166c96a 100644 --- a/drivers/pci/pcie/pme.c +++ b/drivers/pci/pcie/pme.c @@ -310,7 +310,10 @@ static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign) static void pcie_pme_mark_devices(struct pci_dev *port) { pcie_pme_can_wakeup(port, NULL); - if (port->subordinate) + + if (pci_pcie_type(port) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(port, pcie_pme_can_wakeup, NULL); + else if (port->subordinate) pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL); } @@ -320,10 +323,15 @@ static void pcie_pme_mark_devices(struct pci_dev *port) */ static int pcie_pme_probe(struct pcie_device *srv) { - struct pci_dev *port; + struct pci_dev *port = srv->port; struct pcie_pme_service_data *data; int ret; + /* Limit to Root Ports or Root Complex Event Collectors */ + if ((pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC) && + (pci_pcie_type(port) != PCI_EXP_TYPE_ROOT_PORT)) + return -ENODEV; + data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM; @@ -333,7 +341,6 @@ static int pcie_pme_probe(struct pcie_device *srv) data->srv = srv; set_service_data(srv, data); - port = srv->port; pcie_pme_interrupt_enable(port, false); pcie_clear_root_pme_status(port); @@ -445,7 +452,7 @@ static void pcie_pme_remove(struct pcie_device *srv) static struct pcie_port_service_driver pcie_pme_driver = { .name = "pcie_pme", - .port_type = PCI_EXP_TYPE_ROOT_PORT, + .port_type = PCIE_ANY_PORT, .service = PCIE_PORT_SERVICE_PME, .probe = pcie_pme_probe, From patchwork Wed Aug 12 16:46:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1343792 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BRbH24FQ5z9sR4 for ; Thu, 13 Aug 2020 02:47:58 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726664AbgHLQrv (ORCPT ); Wed, 12 Aug 2020 12:47:51 -0400 Received: from mga12.intel.com ([192.55.52.136]:33856 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726816AbgHLQrY (ORCPT ); Wed, 12 Aug 2020 12:47:24 -0400 IronPort-SDR: UIARZ50YjkfBY6Vz3RZzf61/I89sGxNBxb1HQKdGm2PqAeEmjdox+CoWIHtbqPFee/kuso+rm9 F28CXUO4xkhg== X-IronPort-AV: E=McAfee;i="6000,8403,9711"; a="133538566" X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="133538566" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:23 -0700 IronPort-SDR: 7sgPFqLLhM0D6StT99Hvfk8YpH8q7PJOBXJ/iIFi941Gg5+u9AmuYZLlWJDacEuiscNW/d5c4e u1gvFrpItoXA== X-IronPort-AV: E=Sophos;i="5.76,305,1592895600"; d="scan'208";a="439442708" Received: from ticede-or-099.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.58.97]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 09:47:21 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, qiuxu.zhuo@intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH v3 10/10] PCI/AER: Add RCEC AER error injection support Date: Wed, 12 Aug 2020 09:46:59 -0700 Message-Id: <20200812164659.1118946-11-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200812164659.1118946-1-sean.v.kelley@intel.com> References: <20200812164659.1118946-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo The Root Complex Event Collectors(RCEC) appear as peers to Root Ports and also have the AER capability. So add RCEC support to the current AER error injection driver. Signed-off-by: Qiuxu Zhuo Co-developed-by: Sean V Kelley Signed-off-by: Sean V Kelley --- drivers/pci/pcie/aer_inject.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie/aer_inject.c b/drivers/pci/pcie/aer_inject.c index 21cc3d3387f7..8107e782546a 100644 --- a/drivers/pci/pcie/aer_inject.c +++ b/drivers/pci/pcie/aer_inject.c @@ -333,8 +333,11 @@ static int aer_inject(struct aer_error_inj *einj) if (!dev) return -ENODEV; rpdev = pcie_find_root_port(dev); + /* If Root port not found, try to find an RCEC */ + if (!rpdev) + rpdev = dev->rcec; if (!rpdev) { - pci_err(dev, "Root port not found\n"); + pci_err(dev, "Neither root port nor RCEC found\n"); ret = -ENODEV; goto out_put; }