From patchwork Tue Aug 11 07:34:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1343188 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=n/M7q4nF; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BQl3H4p30z9sTM for ; Tue, 11 Aug 2020 17:34:49 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 099E73857C4F; Tue, 11 Aug 2020 07:34:46 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id F22BE3857C49 for ; Tue, 11 Aug 2020 07:34:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org F22BE3857C49 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=roger@nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=2LKJnwSxSlu9fSkITsl4Xv4Rpa4YfraBHe+HH8kac6g=; b=n/M7q4nFOEy5BEBBVzETsza8QQ rZd+eKvTnEElsUbkHlh1EdTeZ6nyerTWtP2x3NrVebF7iSbTmlHRyp+rcbD5XBuRgelWufd+i6E4+ sm353tI+QvKBDZqpVEZMHwZLfr/mQVbxq+27rjuvaEwZ5mH56mnwFXKEpwYsrV1BNwdiSH4KOxDjO F3P+rXU+QjDUma7e5mPmT4cnpitolEsuq14DWHczMzvKqdiwA2rUKDel5BvkGCeuKMXzH7aYaiPMD 75/uEOM9rmRMlFaAIOSQEozvo7la4z7yLd8XGcNIJQ2fvkgIp8GxoUBKE994ndSCs44cMGL7SiVtw gcLfSobg==; Received: from host86-137-89-56.range86-137.btcentralplus.com ([86.137.89.56]:58081 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1k5Onz-0001vU-7A; Tue, 11 Aug 2020 03:34:43 -0400 From: "Roger Sayle" To: "'GCC Patches'" Subject: [PATCH] x86_64: Use peephole2 to eliminate redundant moves. Date: Tue, 11 Aug 2020 08:34:42 +0100 Message-ID: <001001d66fb1$e1e95c70$a5bc1550$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdZvsQUgaVls7gtdTGuR+3l+2+I9Og== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: 'Uros Bizjak' Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" The recent fix for mul_widen_cost revealed an interesting quirk of ira/reload register allocation on x86_64. As shown in https://gcc.gnu.org/pipermail/gcc-patches/2020-August/551648.html for gcc.target/i386/pr71321.c we generate the following code that performs unnecessary register shuffling. movl $-51, %edx movl %edx, %eax mulb %dil which is caused by reload generating the following instructions (notice the set of the first register is dead in the 2nd insn): (insn 7 4 36 2 (set (reg:QI 1 dx [94]) (const_int -51 [0xffffffffffffffcd])) {*movqi_internal} (expr_list:REG_EQUIV (const_int -51 [0xffffffffffffffcd]) (nil))) (insn 36 7 8 2 (set (reg:QI 0 ax [93]) (reg:QI 1 dx [94])) {*movqi_internal} (expr_list:REG_DEAD (reg:QI 1 dx [94]) (nil))) Various discussions in bugzilla seem to point to reload preferring not to load constants directly into CLASS_LIKELY_SPILLED_P registers. Whatever the cause, one solution (workaround), that doesn't involve rewriting a register allocator, is to use peephole2 to spot this weirdness and eliminate it. In fact, this use case is (probably) the reason peephole optimizers were originally developed, but it's a little disappointing this application of them is still required today. On a positive note, this clean-up is cheap, as we're already traversing the instruction stream with liveness (REG_DEAD notes) already calculated. With this peephole2 the above three instructions (from pr71321.c) are replaced with: movl $-51, %eax mulb %dil This patch has been tested on x86_64-pc-linux-gnu with "make bootstrap" and "make -k check" with no new failures. This peephole triggers 1435 during stage2 and stage3 of a bootstrap, and a further 1274 times during "make check". The most common case is DX_REG->AX_REG (as above) which occurs 421 times. I've restricted this pattern to immediate constant loads into general operand registers, which fixes this particular problem, but broader predicates may help similar cases. Ok for mainline? 2020-08-11 Roger Sayle * config/i386/i386.md (peephole2): Reduce unnecessary register shuffling produced by register allocation. Thanks in advance, Roger --- Roger Sayle NextMove Software Cambridge, UK diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4e916bf..34a8946 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18946,6 +18946,16 @@ operands[2] = gen_rtx_REG (GET_MODE (operands[0]), FLAGS_REG); ix86_expand_clear (operands[1]); }) + +;; Reload dislikes loading constants directly into class_likely_spilled +;; hard registers. Try to tidy things up here. +(define_peephole2 + [(set (match_operand:SWI 0 "general_reg_operand") + (match_operand:SWI 1 "x86_64_immediate_operand")) + (set (match_operand:SWI 2 "general_reg_operand") + (match_dup 0))] + "peep2_reg_dead_p (2, operands[0])" + [(set (match_dup 2) (match_dup 1))]) ;; Misc patterns (?)