From patchwork Tue Jul 28 08:52:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Tanwar X-Patchwork-Id: 1337629 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BG9RG38hzz9sTm for ; Tue, 28 Jul 2020 18:52:26 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728323AbgG1IwZ (ORCPT ); Tue, 28 Jul 2020 04:52:25 -0400 Received: from mga17.intel.com ([192.55.52.151]:5403 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726032AbgG1IwY (ORCPT ); Tue, 28 Jul 2020 04:52:24 -0400 IronPort-SDR: DmgeNIOUjOFbCoF2Iec6T9vsD8v4x/FH91iIPWVH78oTuw2CMFbvpfuzT5hxF7W6iXt9Co6H6S 6T32ioOEjEAw== X-IronPort-AV: E=McAfee;i="6000,8403,9695"; a="131237584" X-IronPort-AV: E=Sophos;i="5.75,405,1589266800"; d="scan'208";a="131237584" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2020 01:52:24 -0700 IronPort-SDR: kS4xVDVSslWOWMjtceIlPcQ2GHRwFY9Ndds33vRiAmPDQdSv+mxXHTBQ26vbMVZlan1cPz4Wo1 DJPqqBXsMZ0A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,405,1589266800"; d="scan'208";a="273510467" Received: from sgsxdev001.isng.intel.com (HELO localhost) ([10.226.88.11]) by fmsmga008.fm.intel.com with ESMTP; 28 Jul 2020 01:52:21 -0700 From: Rahul Tanwar To: u.kleine-koenig@pengutronix.de, linux-pwm@vger.kernel.org, lee.jones@linaro.org Cc: thierry.reding@gmail.com, p.zabel@pengutronix.de, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, andriy.shevchenko@intel.com, songjun.Wu@intel.com, cheol.yong.kim@intel.com, qi-ming.wu@intel.com, rahul.tanwar.linux@gmail.com, Rahul Tanwar Subject: [PATCH v6 1/2] Add DT bindings YAML schema for PWM fan controller of LGM SoC Date: Tue, 28 Jul 2020 16:52:12 +0800 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Intel's LGM(Lightning Mountain) SoC contains a PWM fan controller which is only used to control the fan attached to the system. This PWM controller does not have any other consumer other than fan. Add DT bindings documentation for this PWM fan controller. Signed-off-by: Rahul Tanwar --- .../devicetree/bindings/pwm/intel,lgm-pwm.yaml | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml b/Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml new file mode 100644 index 000000000000..9879972470dc --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/intel,lgm-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LGM SoC PWM fan controller + +maintainers: + - Rahul Tanwar + +properties: + compatible: + const: intel,lgm-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + intel,fan-wire: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: Specifies fan mode. Default when unspecified is 2. + + intel,max-rpm: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Specifies maximum RPM of fan attached to the system. + Default when unspecified is 4000. + ++required: + - compatible + - reg + - clocks + - resets + +additionalProperties: false + +examples: + - | + pwm: pwm@e0d00000 { + compatible = "intel,lgm-pwm"; + reg = <0xe0d00000 0x30>; + #pwm-cells = <2>; + clocks = <&cgu0 126>; + resets = <&rcu0 0x30 21>; + };