From patchwork Wed Jul 8 12:11:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TmF6xLFtIEdlZGl6IEFZRElORE/Enk1VxZ4=?= X-Patchwork-Id: 1325190 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=genemek.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4B1ypD2bD1z9sRf for ; Wed, 8 Jul 2020 22:11:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1CC7881BC2; Wed, 8 Jul 2020 14:11:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=genemek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id EC06F81BB4; Wed, 8 Jul 2020 14:11:23 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.6 required=5.0 tests=BAYES_00,KHOP_HELO_FCRDNS, SPF_HELO_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from fixkorumail.fixcloud.com.tr (mail.fixcloud.com.tr [194.15.100.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F303081BB4 for ; Wed, 8 Jul 2020 14:11:20 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=genemek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=gediz.aydindogmus@genemek.com Received: (korumail 10526 invoked from network); 8 Jul 2020 12:11:20 -0000 Received: from unknown (HELO FixMail01.fixcloud.com.tr) (unknown) by 0 with ESMTPS (AES256-SHA256 encrypted); 8 Jul 2020 12:11:19 -0000 Received: from nga.genemek.local (176.235.187.234) by FixMail01.fixcloud.com.tr (10.34.212.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Wed, 8 Jul 2020 15:11:17 +0300 From: =?iso-8859-9?q?Naz=FDm_Gediz_Ayd=FDndo=F0mu=FE?= To: u-boot@lists.denx.de CC: Andre Przywara , Hannes Schmelzer , Jagan Teki , Maxime Ripard , Maxime Ripard , Simon Glass Subject: [RFC PATCH v2] sunxi: Add UART4 console support for A64 Date: Wed, 8 Jul 2020 15:11:18 +0300 Message-ID: <20200708121118.19278-1-gediz.aydindogmus@genemek.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ClientProxiedBy: FixMail01.fixcloud.com.tr (10.34.212.84) To FixMail01.fixcloud.com.tr (10.34.212.84) X-Envelope-Sender: gediz.aydindogmus@genemek.com X-KORUMAIL-QueueId: 10519-1594210279-781297 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean UART4 port of A64 was in conflict with R_UART of older SoCs, like A23. This commit adds necessary definitions to use UART4 port on A64. Signed-off-by: Nazım Gediz Aydındoğmuş Tested-by: Faruk Kılavuz Acked-by: Jagan Teki --- Changes in v2: - Removed redundant OF_STDOUT_PATH changes - Simplified commit log to meet 80 characters arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/mach-sunxi/board.c | 4 ++++ arch/arm/mach-sunxi/clock_sun6i.c | 3 ++- include/configs/sunxi-common.h | 4 ++++ 4 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index a646ea6a3c..1407aff25f 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -176,6 +176,7 @@ enum sunxi_gpio_number { #define SUNXI_GPD_LCD0 2 #define SUNXI_GPD_LVDS0 3 #define SUNXI_GPD_PWM 2 +#define SUN50I_GPD_UART4 3 #define SUN5I_GPE_SDC2 3 #define SUN8I_GPE_TWI2 3 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index f40fccd8f8..7d95b7dd29 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -140,6 +140,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART); sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART); sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN50I) + sunxi_gpio_set_cfgpin(SUNXI_GPD(2), SUN50I_GPD_UART4); + sunxi_gpio_set_cfgpin(SUNXI_GPD(3), SUN50I_GPD_UART4); + sunxi_gpio_set_pull(SUNXI_GPD(3), SUNXI_GPIO_PULL_UP); #else #error Unsupported console port number. Please fix pin mux settings in board.c #endif diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index 8e84062bd7..95f8e807f3 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -83,7 +83,8 @@ void clock_init_sec(void) void clock_init_uart(void) { -#if CONFIG_CONS_INDEX < 5 +#if CONFIG_CONS_INDEX < 5 || \ + defined(CONFIG_MACH_SUN50I) && CONFIG_CONS_INDEX < 6 struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b0bec0561..1324d60f60 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -45,8 +45,12 @@ # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE +#if defined(CONFIG_MACH_SUN50I) +# define CONFIG_SYS_NS16550_COM5 SUNXI_UART4_BASE +#else # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE #endif +#endif /* CPU */ #define COUNTER_FREQUENCY 24000000