From patchwork Mon Jun 15 06:13:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasant Hegde X-Patchwork-Id: 1309201 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lgzB05nDz9sRW for ; Mon, 15 Jun 2020 16:14:46 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49lgz93YSkzDqPb for ; Mon, 15 Jun 2020 16:14:45 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=hegdevasant@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49lgxw28yGzDqSd for ; Mon, 15 Jun 2020 16:13:40 +1000 (AEST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05F64665011914 for ; Mon, 15 Jun 2020 02:13:37 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 31n9fsve8s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 15 Jun 2020 02:13:37 -0400 Received: from m0098393.ppops.net (m0098393.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 05F67bAp022313 for ; Mon, 15 Jun 2020 02:13:37 -0400 Received: from ppma05fra.de.ibm.com (6c.4a.5195.ip4.static.sl-reverse.com [149.81.74.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 31n9fsve86-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 15 Jun 2020 02:13:37 -0400 Received: from pps.filterd (ppma05fra.de.ibm.com [127.0.0.1]) by ppma05fra.de.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 05F65Cnb032481; Mon, 15 Jun 2020 06:13:35 GMT Received: from b06cxnps4076.portsmouth.uk.ibm.com (d06relay13.portsmouth.uk.ibm.com [9.149.109.198]) by ppma05fra.de.ibm.com with ESMTP id 31mpe816bx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 15 Jun 2020 06:13:34 +0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 05F6DWbC54395132 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 15 Jun 2020 06:13:32 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 895B8A4064; Mon, 15 Jun 2020 06:13:32 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 82D02A406A; Mon, 15 Jun 2020 06:13:31 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.79.185.123]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 15 Jun 2020 06:13:31 +0000 (GMT) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Mon, 15 Jun 2020 11:43:24 +0530 Message-Id: <20200615061325.15642-1-hegdevasant@linux.vnet.ibm.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-15_01:2020-06-12, 2020-06-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 bulkscore=0 spamscore=0 suspectscore=1 cotscore=-2147483648 adultscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=999 mlxscore=0 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006150050 Subject: [Skiboot] [PATCH 1/2] mpipl: Delay MPIPL registration until OPAL init is complete X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" If OPAL boot fails after MPIPL init (opal_mpipl_init()) then we call MPIPL boot instead of reboot. BMC is not aware of MPIPL. Hence it may result in continuous MPIPL loop (boot -> crash -> MPIPL -> boot). If OPAL boot fails (before loading kernel) then its better to call reboot. So that BMC can detect `n` number of boot failures (generally n = 3) and stop booting. That way we can avoid continuous loop. This patch moves MPIPL init to the end of init process (just before starting kernel). So that if we fail to boot OPAL we call normal reboot. Also this patch introduces new function to detect MPIPL is enabled or not (is_mpipl_enabled()). And in assert() path we check for this function instead of `dump` DT node. So that it will make sure we will not call MPIPL until opal_mpipl_init is complete. Signed-off-by: Vasant Hegde --- core/init.c | 7 ++++--- core/opal-dump.c | 10 ++++++++++ hw/sbe-p9.c | 2 +- include/opal-dump.h | 3 +++ 4 files changed, 18 insertions(+), 4 deletions(-) diff --git a/core/init.c b/core/init.c index 9f3b8c6fd..bf39d7aaa 100644 --- a/core/init.c +++ b/core/init.c @@ -641,6 +641,10 @@ void __noreturn load_and_boot_kernel(bool is_reboot) cpu_give_self_os(); + /* init MPIPL */ + if (!is_reboot) + opal_mpipl_init(); + if (kernel_32bit) start_kernel32(kernel_entry, fdt, mem_top); start_kernel(kernel_entry, fdt, mem_top); @@ -1363,9 +1367,6 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt) /* Create the LPC bus interrupt-map on P9 */ lpc_finalize_interrupts(); - /* init opal dump */ - opal_mpipl_init(); - /* Add the list of interrupts going to OPAL */ add_opal_interrupts(); diff --git a/core/opal-dump.c b/core/opal-dump.c index a31ecbe4d..ca6bf0648 100644 --- a/core/opal-dump.c +++ b/core/opal-dump.c @@ -67,6 +67,8 @@ static int opal_mpipl_max_tags = MAX_OPAL_MPIPL_TAGS; static u64 opal_dump_addr, opal_dump_size; +static bool mpipl_enabled; + static int opal_mpipl_add_entry(u8 region, u64 src, u64 dest, u64 size) { int i; @@ -526,6 +528,11 @@ void opal_mpipl_reserve_mem(void) arch_regs_dest, arch_regs_size); } +bool is_mpipl_enabled(void) +{ + return mpipl_enabled; +} + void opal_mpipl_init(void) { void *mdst_base = (void *)MDST_TABLE_BASE; @@ -575,4 +582,7 @@ void opal_mpipl_init(void) opal_register(OPAL_MPIPL_UPDATE, opal_mpipl_update, 4); opal_register(OPAL_MPIPL_REGISTER_TAG, opal_mpipl_register_tag, 2); opal_register(OPAL_MPIPL_QUERY_TAG, opal_mpipl_query_tag, 2); + + /* Enable MPIPL */ + mpipl_enabled = true; } diff --git a/hw/sbe-p9.c b/hw/sbe-p9.c index 18caa0a28..24ed91b93 100644 --- a/hw/sbe-p9.c +++ b/hw/sbe-p9.c @@ -949,7 +949,7 @@ void p9_sbe_terminate(void) struct proc_chip *chip; /* Return if MPIPL is not supported */ - if (!dt_find_by_path(opal_node, "dump")) + if (!is_mpipl_enabled()) return; /* Unregister flash. It will request BMC MBOX reset */ diff --git a/include/opal-dump.h b/include/opal-dump.h index 060712e99..bc1b8768d 100644 --- a/include/opal-dump.h +++ b/include/opal-dump.h @@ -127,4 +127,7 @@ void opal_mpipl_save_crashing_pir(void); /* Reserve memory to capture OPAL dump */ extern void opal_mpipl_reserve_mem(void); +/* Check MPIPL enabled or not */ +extern bool is_mpipl_enabled(void); + #endif /* __OPAL_DUMP_H */ From patchwork Mon Jun 15 06:13:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasant Hegde X-Patchwork-Id: 1309202 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lgzb3CYSz9sRW for ; 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Mon, 15 Jun 2020 06:13:36 +0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 05F6CGR261735308 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 15 Jun 2020 06:12:16 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F3D98A4062; Mon, 15 Jun 2020 06:13:33 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EC940A4054; Mon, 15 Jun 2020 06:13:32 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.79.185.123]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 15 Jun 2020 06:13:32 +0000 (GMT) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Mon, 15 Jun 2020 11:43:25 +0530 Message-Id: <20200615061325.15642-2-hegdevasant@linux.vnet.ibm.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200615061325.15642-1-hegdevasant@linux.vnet.ibm.com> References: <20200615061325.15642-1-hegdevasant@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-15_01:2020-06-12, 2020-06-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=999 lowpriorityscore=0 impostorscore=0 priorityscore=1501 adultscore=0 suspectscore=1 malwarescore=0 mlxscore=0 clxscore=1015 cotscore=-2147483648 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006150050 Subject: [Skiboot] [PATCH 2/2] mpipl: Move opal_mpipl_save_crashing_pir() call to platform specific code X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Commit 34664746 moved opal_mpipl_save_crashing_pir() function call from platform specific code to generic assert() path. I completely missed to take care of all terminate path :-( This resulted in breaking `opalcore` on Linux kernel initiated MPIPL. As : - Linux initiated MPIPL calls platform termination function directly - ELF core format needs crashing CPU details to generate proper code Hence I think it makes sense to move this back to platform specific terminate handler code. Today we have two ways to trigger MPIPL based on service processor. - On BMC system we call SBE S0 interrupt - On FSP system we call `attn` instruction In future if we add new ways to trigger MPIPL then we have to add platform specific support code anyway. That way its fine to move this to platform sepcific code. One alternative is to make this call in all code path before making platform.terminate call... which makes it more complicated than above approach. Signed-off-by: Vasant Hegde --- core/opal-dump.c | 8 +------- core/utils.c | 4 ---- hw/fsp/fsp-attn.c | 4 ++++ hw/sbe-p9.c | 3 +++ 4 files changed, 8 insertions(+), 11 deletions(-) diff --git a/core/opal-dump.c b/core/opal-dump.c index ca6bf0648..4f54a3ef1 100644 --- a/core/opal-dump.c +++ b/core/opal-dump.c @@ -489,13 +489,7 @@ static void post_mpipl_get_opal_data(void) void opal_mpipl_save_crashing_pir(void) { - struct dt_node *opal_node; - - opal_node = dt_find_by_path(dt_root, "ibm,opal"); - if (!opal_node) - return; - - if (!dt_find_by_path(opal_node, "dump")) + if (!is_mpipl_enabled()) return; mpipl_metadata->crashing_pir = this_cpu()->pir; diff --git a/core/utils.c b/core/utils.c index d778fcdff..0d2f5e894 100644 --- a/core/utils.c +++ b/core/utils.c @@ -12,7 +12,6 @@ #include #include #include -#include void __noreturn assert_fail(const char *msg, const char *file, unsigned int line, const char *function) @@ -34,9 +33,6 @@ void __noreturn assert_fail(const char *msg, const char *file, prlog(PR_EMERG, "assert failed at %s:%u: %s\n", file, line, msg); backtrace(); - /* Save crashing CPU details */ - opal_mpipl_save_crashing_pir(); - if (platform.terminate) platform.terminate(msg); diff --git a/hw/fsp/fsp-attn.c b/hw/fsp/fsp-attn.c index 9d032d18d..6e358e0d4 100644 --- a/hw/fsp/fsp-attn.c +++ b/hw/fsp/fsp-attn.c @@ -14,6 +14,7 @@ #include #include #include +#include #define TI_CMD_VALID 0x1 /* Command valid */ #define TI_CMD 0xA1 /* Terminate Immediate command */ @@ -118,6 +119,9 @@ void __attribute__((noreturn)) ibm_fsp_terminate(const char *msg) /* Update op panel op_display */ op_display(OP_FATAL, OP_MOD_CORE, 0x6666); + /* Save crashing CPU details */ + opal_mpipl_save_crashing_pir(); + /* XXX FIXME: We should fsp_poll for a while to ensure any pending * console writes have made it out, but until we have decent PSI * link handling we must not do it forever. Polling can prevent the diff --git a/hw/sbe-p9.c b/hw/sbe-p9.c index 24ed91b93..ae5aacb12 100644 --- a/hw/sbe-p9.c +++ b/hw/sbe-p9.c @@ -952,6 +952,9 @@ void p9_sbe_terminate(void) if (!is_mpipl_enabled()) return; + /* Save crashing CPU details */ + opal_mpipl_save_crashing_pir(); + /* Unregister flash. It will request BMC MBOX reset */ if (!flash_unregister()) { prlog(PR_DEBUG, "Failed to reset BMC MBOX\n");