From patchwork Wed Dec 13 05:23:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847747 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQ934L2tz9ryr for ; Wed, 13 Dec 2017 16:24:07 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQ933FfwzDrYx for ; Wed, 13 Dec 2017 16:24:07 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yxQ8z1hjCzDrX8 for ; Wed, 13 Dec 2017 16:24:03 +1100 (AEDT) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBD5NwSF103834 for ; Wed, 13 Dec 2017 00:24:00 -0500 Received: from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108]) by mx0b-001b2d01.pphosted.com with ESMTP id 2etrs83h6f-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Dec 2017 00:24:00 -0500 Received: from localhost by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Dec 2017 05:23:58 -0000 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5NvnP32637136 for ; Wed, 13 Dec 2017 05:23:57 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 386AC42041 for ; Wed, 13 Dec 2017 05:18:13 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C5A3B4203F for ; Wed, 13 Dec 2017 05:18:12 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP for ; Wed, 13 Dec 2017 05:18:12 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:53:56 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0008-0000-0000-000004B677C8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0009-0000-0000-00001E498533 Message-Id: <151314261183.30276.15482472663661177109.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 1/6] hdata: Add location code property to xscom node X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Vasant Hegde This patch adds chip location code property to xscom node. Signed-off-by: Vasant Hegde Signed-off-by: Mahesh Salgaonkar --- Change in v2: - Fixed test cases --- hdata/spira.c | 5 +++++ hdata/test/p8-840-spira.dts | 2 ++ hdata/test/p81-811.spira.dts | 4 ++++ 3 files changed, 11 insertions(+) diff --git a/hdata/spira.c b/hdata/spira.c index 2cf7613..57b1d41 100644 --- a/hdata/spira.c +++ b/hdata/spira.c @@ -505,6 +505,7 @@ static bool add_xscom_sppcrd(uint64_t xscom_base) for_each_ntuple_idx(&spira.ntuples.proc_chip, hdif, i, SPPCRD_HDIF_SIG) { const struct sppcrd_chip_info *cinfo; + const struct spira_fru_id *fru_id = NULL; unsigned int csize; u32 ve, version; @@ -548,6 +549,10 @@ static bool add_xscom_sppcrd(uint64_t xscom_base) dt_add_property_cells(vpd_node, "ibm,chip-id", be32_to_cpu(cinfo->xscom_id)); + fru_id = HDIF_get_idata(hdif, SPPCRD_IDATA_FRU_ID, NULL); + if (fru_id) + slca_vpd_add_loc_code(np, be16_to_cpu(fru_id->slca_index)); + /* Add module VPD on version A and later */ if (version >= 0x000a) { vpd = HDIF_get_idata(hdif, SPPCRD_IDATA_MODULE_VPD, diff --git a/hdata/test/p8-840-spira.dts b/hdata/test/p8-840-spira.dts index a384434..3e6bf6e 100644 --- a/hdata/test/p8-840-spira.dts +++ b/hdata/test/p8-840-spira.dts @@ -875,6 +875,7 @@ bus-frequency = <0x0 0x1dcd6500>; ibm,dbob-id = <0x0>; ibm,occ-functional-state = <0x1>; + ibm,loc-code = "U78C9.001.WZS0CWX-P1-C32"; ibm,module-vpd = <0xcafebeef 0x10000 0xa502aa2f>; ibm,ccm-node-id = <0x0>; ibm,hw-card-id = <0x0>; @@ -937,6 +938,7 @@ bus-frequency = <0x0 0x1dcd6500>; ibm,dbob-id = <0x0>; ibm,occ-functional-state = <0x1>; + ibm,loc-code = "U78C9.001.WZS0CWX-P1-C32"; ibm,module-vpd = <0xcafebeef 0x10000 0x9f87fa41>; ibm,ccm-node-id = <0x0>; ibm,hw-card-id = <0x0>; diff --git a/hdata/test/p81-811.spira.dts b/hdata/test/p81-811.spira.dts index c0976e6..d354ad5 100644 --- a/hdata/test/p81-811.spira.dts +++ b/hdata/test/p81-811.spira.dts @@ -2070,6 +2070,7 @@ bus-frequency = <0x0 0x1dcd6500>; ibm,dbob-id = <0x0>; ibm,occ-functional-state = <0x1>; + ibm,loc-code = "U78CB.001.WZS00AL-P1-C32"; ibm,module-vpd = <0xcafebeef 0x10000 0x3e067c18>; ibm,ccm-node-id = <0x0>; ibm,hw-card-id = <0x0>; @@ -2132,6 +2133,7 @@ bus-frequency = <0x0 0x1dcd6500>; ibm,dbob-id = <0x0>; ibm,occ-functional-state = <0x1>; + ibm,loc-code = "U78CB.001.WZS00AL-P1-C32"; ibm,module-vpd = <0xcafebeef 0x10000 0x1b85218f>; ibm,ccm-node-id = <0x0>; ibm,hw-card-id = <0x0>; @@ -2191,6 +2193,7 @@ bus-frequency = <0x0 0x1dcd6500>; ibm,dbob-id = <0x0>; ibm,occ-functional-state = <0x1>; + ibm,loc-code = "U78CB.001.WZS00AL-P1-C33"; ibm,module-vpd = <0xcafebeef 0x10000 0x36f99ead>; ibm,ccm-node-id = <0x0>; ibm,hw-card-id = <0x0>; @@ -2241,6 +2244,7 @@ bus-frequency = <0x0 0x1dcd6500>; ibm,dbob-id = <0x0>; ibm,occ-functional-state = <0x1>; + ibm,loc-code = "U78CB.001.WZS00AL-P1-C33"; ibm,module-vpd = <0xcafebeef 0x10000 0x65fe8f66>; ibm,ccm-node-id = <0x0>; ibm,hw-card-id = <0x0>; From patchwork Wed Dec 13 05:24:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847748 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQ9M1FJxz9s9Y for ; Wed, 13 Dec 2017 16:24:23 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQ9L6tpGzDrYx for ; Wed, 13 Dec 2017 16:24:22 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yxQ9G07DGzDrbr for ; Wed, 13 Dec 2017 16:24:17 +1100 (AEDT) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBD5NwPt019663 for ; Wed, 13 Dec 2017 00:24:15 -0500 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0b-001b2d01.pphosted.com with ESMTP id 2etrs7umgh-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Dec 2017 00:24:15 -0500 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Dec 2017 05:24:11 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5OBaq1769910 for ; Wed, 13 Dec 2017 05:24:11 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 78FBF11C058 for ; Wed, 13 Dec 2017 05:18:31 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 21A7611C04A for ; Wed, 13 Dec 2017 05:18:31 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP for ; Wed, 13 Dec 2017 05:18:30 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:54:10 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0012-0000-0000-0000059874F1 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0013-0000-0000-000019138BBF Message-Id: <151314264285.30276.12274129437954654800.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 2/6] opal: Get chip location code X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar and store it under proc_chip for quick reference during HMI handling code. Signed-off-by: Mahesh Salgaonkar --- core/chip.c | 10 ++++++++++ include/chip.h | 15 +++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/core/chip.c b/core/chip.c index d2ff3f4..6526325 100644 --- a/core/chip.c +++ b/core/chip.c @@ -76,6 +76,7 @@ static void init_chip(struct dt_node *dn) { struct proc_chip *chip; uint32_t id; + const char *lc = NULL; id = dt_get_chip_id(dn); assert(id < MAX_CHIPS); @@ -97,6 +98,15 @@ static void init_chip(struct dt_node *dn) list_head_init(&chip->i2cms); + /* Update the location code for this chip. */ + if (dt_has_node_property(dn, "ibm,loc-code", NULL)) + lc = dt_prop_get(dn, "ibm,loc-code"); + else if (dt_has_node_property(dn, "ibm,slot-location-code", NULL)) + lc = dt_prop_get(dn, "ibm,slot-location-code"); + + if (lc) + chip->loc_code = strdup(lc); + prlog(PR_INFO, "CHIP: Initialised chip %d from %s\n", id, dn->name); chips[id] = chip; } diff --git a/include/chip.h b/include/chip.h index 566edc5..43b5ea5 100644 --- a/include/chip.h +++ b/include/chip.h @@ -215,6 +215,9 @@ struct proc_chip { struct xive *xive; struct vas *vas; + + /* location code of this chip */ + const uint8_t *loc_code; }; extern uint32_t pir_to_chip_id(uint32_t pir); @@ -241,5 +244,17 @@ static inline int nr_chips(void) return nr_chips; } +/* helper to get location code of a chip */ +static inline const char *chip_loc_code(uint32_t chip_id) +{ + struct proc_chip *chip; + + chip = get_chip(chip_id); + if (!chip) + return NULL; + + return chip->loc_code; +} + #endif /* __CHIP_H */ From patchwork Wed Dec 13 05:24:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847749 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQ9l4HDHz9sBW for ; Wed, 13 Dec 2017 16:24:43 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQ9l3G4BzDrbM for ; Wed, 13 Dec 2017 16:24:43 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yxQ9T2QWgzDrcJ for ; Wed, 13 Dec 2017 16:24:29 +1100 (AEDT) Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBD5O7SH141538 for ; Wed, 13 Dec 2017 00:24:27 -0500 Received: from e06smtp15.uk.ibm.com (e06smtp15.uk.ibm.com [195.75.94.111]) by mx0b-001b2d01.pphosted.com with ESMTP id 2etvx1js67-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Dec 2017 00:24:26 -0500 Received: from localhost by e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Dec 2017 05:24:23 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5OMtr15728832 for ; Wed, 13 Dec 2017 05:24:22 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A2632AE058 for ; Wed, 13 Dec 2017 05:17:08 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3B073AE04D for ; Wed, 13 Dec 2017 05:17:08 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP for ; Wed, 13 Dec 2017 05:17:07 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:54:21 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0020-0000-0000-000003DF3E49 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0021-0000-0000-000042703FE0 Message-Id: <151314265666.30276.3355999507583180641.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 3/6] core/hmi: Use pr_fmt macro for tagging log messages X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar No functionality changes. Signed-off-by: Mahesh Salgaonkar Acked-by: Balbir Singh --- core/hmi.c | 35 +++++++++++++++++++---------------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/core/hmi.c b/core/hmi.c index 07c0846..826e27c 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -13,6 +13,9 @@ * See the License for the specific language governing permissions and * limitations under the License. */ + +#define pr_fmt(fmt) "HMI: " fmt + #include #include #include @@ -255,7 +258,7 @@ static int setup_scom_addresses(void) nx_pbi_fir = P9_NX_PBI_FIR; return 1; default: - prerror("HMI: %s: Unknown CPU type\n", __func__); + prerror("%s: Unknown CPU type\n", __func__); break; } return 0; @@ -327,7 +330,7 @@ static bool decode_core_fir(struct cpu_thread *cpu, ret = read_core_fir(cpu->chip_id, core_id, &core_fir); if (ret == OPAL_HARDWARE) { - prerror("HMI: XSCOM error reading CORE FIR\n"); + prerror("XSCOM error reading CORE FIR\n"); /* If the FIR can't be read, we should checkstop. */ return true; } else if (ret == OPAL_WRONG_STATE) { @@ -338,12 +341,12 @@ static bool decode_core_fir(struct cpu_thread *cpu, * error will be handled appropriately. */ prlog(PR_DEBUG, - "HMI: FIR read failed, chip %d core %d asleep\n", + "FIR read failed, chip %d core %d asleep\n", cpu->chip_id, core_id); return false; } - prlog(PR_INFO, "HMI: CHIP ID: %x, CORE ID: %x, FIR: %016llx\n", + prlog(PR_INFO, "CHIP ID: %x, CORE ID: %x, FIR: %016llx\n", cpu->chip_id, core_id, core_fir); /* Check CORE FIR bits and populate HMI event with error info. */ @@ -426,10 +429,10 @@ static void find_capp_checkstop_reason(int flat_chip_id, if (!(capp_fir & ~capp_fir_mask)) continue; - prlog(PR_DEBUG, "HMI: CAPP#%d (PHB:#%x): FIR 0x%016llx mask 0x%016llx\n", + prlog(PR_DEBUG, "CAPP#%d (PHB:#%x): FIR 0x%016llx mask 0x%016llx\n", info.capp_index, info.phb_index, capp_fir, capp_fir_mask); - prlog(PR_DEBUG, "HMI: CAPP#%d (PHB:#%x): ACTION0 0x%016llx, ACTION1 0x%016llx\n", + prlog(PR_DEBUG, "CAPP#%d (PHB:#%x): ACTION0 0x%016llx, ACTION1 0x%016llx\n", info.capp_index, info.phb_index, capp_fir_action0, capp_fir_action1); @@ -464,7 +467,7 @@ static void find_nx_checkstop_reason(int flat_chip_id, /* Get NX status register value. */ if (xscom_read(flat_chip_id, nx_status_reg, &nx_status) != 0) { - prerror("HMI: XSCOM error reading NX_STATUS_REG\n"); + prerror("XSCOM error reading NX_STATUS_REG\n"); return; } @@ -480,13 +483,13 @@ static void find_nx_checkstop_reason(int flat_chip_id, /* Get DMA & Engine FIR data register value. */ if (xscom_read(flat_chip_id, nx_dma_engine_fir, &nx_dma_fir) != 0) { - prerror("HMI: XSCOM error reading NX_DMA_ENGINE_FIR\n"); + prerror("XSCOM error reading NX_DMA_ENGINE_FIR\n"); return; } /* Get PowerBus Interface FIR data register value. */ if (xscom_read(flat_chip_id, nx_pbi_fir, &nx_pbi_fir_val) != 0) { - prerror("HMI: XSCOM error reading NX_PBI_FIR\n"); + prerror("XSCOM error reading NX_PBI_FIR\n"); return; } @@ -557,7 +560,7 @@ static void find_npu_checkstop_reason(int flat_chip_id, p->at_xscom + NX_FIR_ACTION0, &npu_fir_action0) || xscom_read(flat_chip_id, p->at_xscom + NX_FIR_ACTION1, &npu_fir_action1)) { - prerror("HMI: Couldn't read NPU registers with XSCOM\n"); + prerror("Couldn't read NPU registers with XSCOM\n"); return; } @@ -593,7 +596,7 @@ static void decode_malfunction(struct OpalHMIEvent *hmi_evt) bool event_generated = false; if (!setup_scom_addresses()) { - prerror("HMI: Failed to setup scom addresses\n"); + prerror("Failed to setup scom addresses\n"); /* Send an unknown HMI event. */ hmi_evt->u.xstop_error.xstop_type = CHECKSTOP_TYPE_UNKNOWN; hmi_evt->u.xstop_error.xstop_reason = 0; @@ -647,7 +650,7 @@ static void wait_for_cleanup_complete(void) * informed about the failure. This way we can avoid * looping here if other threads are stuck. */ - prlog(PR_DEBUG, "HMI: TB pre-recovery timeout\n"); + prlog(PR_DEBUG, "TB pre-recovery timeout\n"); break; } barrier(); @@ -935,7 +938,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) * TB register. */ this_cpu()->tb_invalid = !(mfspr(SPR_TFMR) & SPR_TFMR_TB_VALID); - prlog(PR_DEBUG, "HMI: Received HMI interrupt: HMER = 0x%016llx\n", hmer); + prlog(PR_DEBUG, "Received HMI interrupt: HMER = 0x%016llx\n", hmer); if (hmi_evt) hmi_evt->hmer = hmer; if (hmer & SPR_HMER_PROC_RECV_DONE) { @@ -945,7 +948,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_DONE; queue_hmi_event(hmi_evt, recover); } - prlog(PR_DEBUG, "HMI: Processor recovery Done.\n"); + prlog(PR_DEBUG, "Processor recovery Done.\n"); } if (hmer & SPR_HMER_PROC_RECV_ERROR_MASKED) { hmer &= ~SPR_HMER_PROC_RECV_ERROR_MASKED; @@ -954,7 +957,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_MASKED; queue_hmi_event(hmi_evt, recover); } - prlog(PR_DEBUG, "HMI: Processor recovery Done (masked).\n"); + prlog(PR_DEBUG, "Processor recovery Done (masked).\n"); } if (hmer & SPR_HMER_PROC_RECV_AGAIN) { hmer &= ~SPR_HMER_PROC_RECV_AGAIN; @@ -963,7 +966,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_DONE_AGAIN; queue_hmi_event(hmi_evt, recover); } - prlog(PR_DEBUG, "HMI: Processor recovery occurred again before" + prlog(PR_DEBUG, "Processor recovery occurred again before" "bit2 was cleared\n"); } /* Assert if we see malfunction alert, we can not continue. */ From patchwork Wed Dec 13 05:24:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847750 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQB85TfYz9sBW for ; Wed, 13 Dec 2017 16:25:04 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQB74bxqzDrZr for ; Wed, 13 Dec 2017 16:25:03 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yxQ9l3lxYzDrbf for ; Wed, 13 Dec 2017 16:24:43 +1100 (AEDT) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBD5OAU0100033 for ; Wed, 13 Dec 2017 00:24:40 -0500 Received: from e06smtp10.uk.ibm.com (e06smtp10.uk.ibm.com [195.75.94.106]) by mx0a-001b2d01.pphosted.com with ESMTP id 2etrs7bp87-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Dec 2017 00:24:40 -0500 Received: from localhost by e06smtp10.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Dec 2017 05:24:37 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5OaUW63766554 for ; Wed, 13 Dec 2017 05:24:36 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 04D19AE051 for ; Wed, 13 Dec 2017 05:17:23 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A9648AE045 for ; Wed, 13 Dec 2017 05:17:22 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP for ; Wed, 13 Dec 2017 05:17:22 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:54:35 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0040-0000-0000-000003F975A6 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0041-0000-0000-000025FC8419 Message-Id: <151314266781.30276.12675669111937460245.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 4/6] opal/hmi: HMI logging with location code info. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar Add few HMI debug prints with location code info few additional info. No functionality change. With this patch the log messages will look like: [210612.175196744,7] HMI: Received HMI interrupt: HMER = 0x0840000000000000 [210612.175200449,7] HMI: [Loc: UOPWR.1302LFA-Node0-Proc1]: P:8 C:16 T:1: TFMR(2d12000870e04020) Timer Facility Error [210660.259689526,7] HMI: Received HMI interrupt: HMER = 0x2040000000000000 [210660.259695649,7] HMI: [Loc: UOPWR.1302LFA-Node0-Proc0]: P:0 C:16 T:1: Processor recovery Done. Signed-off-by: Mahesh Salgaonkar --- core/hmi.c | 40 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/core/hmi.c b/core/hmi.c index 826e27c..a995455 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -920,6 +920,30 @@ static void hmi_exit(void) *(this_cpu()->core_hmi_state_ptr) &= ~(this_cpu()->thread_mask); } +static void hmi_print_debug(const uint8_t *msg) +{ + uint64_t hmer = mfspr(SPR_HMER); + const char *loc; + uint32_t core_id, thread_index; + + core_id = pir_to_core_id(this_cpu()->pir); + thread_index = cpu_get_thread_index(this_cpu()); + + loc = chip_loc_code(this_cpu()->chip_id); + if (!loc) + loc = "Not Available"; + + if (hmer & (SPR_HMER_TFAC_ERROR | SPR_HMER_TFMR_PARITY_ERROR)) { + prlog(PR_DEBUG, "[Loc: %s]: P:%d C:%d T:%d: TFMR(%016lx) %s\n", + loc, this_cpu()->chip_id, core_id, thread_index, + mfspr(SPR_TFMR), msg); + } else { + prlog(PR_DEBUG, "[Loc: %s]: P:%d C:%d T:%d: %s\n", + loc, this_cpu()->chip_id, core_id, thread_index, + msg); + } +} + int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) { int recover = 1; @@ -948,7 +972,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_DONE; queue_hmi_event(hmi_evt, recover); } - prlog(PR_DEBUG, "Processor recovery Done.\n"); + hmi_print_debug("Processor recovery Done."); } if (hmer & SPR_HMER_PROC_RECV_ERROR_MASKED) { hmer &= ~SPR_HMER_PROC_RECV_ERROR_MASKED; @@ -957,7 +981,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_MASKED; queue_hmi_event(hmi_evt, recover); } - prlog(PR_DEBUG, "Processor recovery Done (masked).\n"); + hmi_print_debug("Processor recovery Done (masked)."); } if (hmer & SPR_HMER_PROC_RECV_AGAIN) { hmer &= ~SPR_HMER_PROC_RECV_AGAIN; @@ -966,13 +990,14 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_DONE_AGAIN; queue_hmi_event(hmi_evt, recover); } - prlog(PR_DEBUG, "Processor recovery occurred again before" - "bit2 was cleared\n"); + hmi_print_debug("Processor recovery occurred again before" + "bit2 was cleared\n"); } /* Assert if we see malfunction alert, we can not continue. */ if (hmer & SPR_HMER_MALFUNCTION_ALERT) { hmer &= ~SPR_HMER_MALFUNCTION_ALERT; + hmi_print_debug("Malfunction Alert"); if (hmi_evt) decode_malfunction(hmi_evt); } @@ -980,6 +1005,8 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) /* Assert if we see Hypervisor resource error, we can not continue. */ if (hmer & SPR_HMER_HYP_RESOURCE_ERR) { hmer &= ~SPR_HMER_HYP_RESOURCE_ERR; + + hmi_print_debug("Hypervisor resource error"); recover = 0; if (hmi_evt) { hmi_evt->severity = OpalHMI_SEV_FATAL; @@ -994,6 +1021,9 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) */ if (hmer & SPR_HMER_TFAC_ERROR) { tfmr = mfspr(SPR_TFMR); /* save original TFMR */ + + hmi_print_debug("Timer Facility Error"); + hmer &= ~SPR_HMER_TFAC_ERROR; recover = chiptod_recover_tb_errors(); if (hmi_evt) { @@ -1006,6 +1036,8 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) if (hmer & SPR_HMER_TFMR_PARITY_ERROR) { tfmr = mfspr(SPR_TFMR); /* save original TFMR */ hmer &= ~SPR_HMER_TFMR_PARITY_ERROR; + + hmi_print_debug("TFMR parity Error"); recover = chiptod_recover_tb_errors(); if (hmi_evt) { hmi_evt->severity = OpalHMI_SEV_FATAL; From patchwork Wed Dec 13 05:24:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847751 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQBR6x8Wz9s9Y for ; Wed, 13 Dec 2017 16:25:19 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQBR5mmXzDrZq for ; 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Violators will be prosecuted for from ; Wed, 13 Dec 2017 05:24:51 -0000 Received: from b06cxnps4075.portsmouth.uk.ibm.com (9.149.109.197) by e06smtp11.uk.ibm.com (192.168.101.141) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 13 Dec 2017 05:24:48 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5Ol3G25034906 for ; Wed, 13 Dec 2017 05:24:47 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2E9305204C for ; Wed, 13 Dec 2017 04:17:53 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id B28B952041 for ; Wed, 13 Dec 2017 04:17:52 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:54:46 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0040-0000-0000-000004197820 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0041-0000-0000-000020BC88FB Message-Id: <151314268212.30276.9373335109876983471.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 5/6] core/hmi: Do not display FIR details if none of the bits are set. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar So that we don't flood OPAL console logs with information that is not useful. Signed-off-by: Mahesh Salgaonkar --- core/hmi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/core/hmi.c b/core/hmi.c index a995455..5b99984 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -346,6 +346,9 @@ static bool decode_core_fir(struct cpu_thread *cpu, return false; } + if (!core_fir) + return false; + prlog(PR_INFO, "CHIP ID: %x, CORE ID: %x, FIR: %016llx\n", cpu->chip_id, core_id, core_fir); From patchwork Wed Dec 13 05:25:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847752 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQBj4S5jz9s9Y for ; Wed, 13 Dec 2017 16:25:33 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQBj0T6FzDrbf for ; Wed, 13 Dec 2017 16:25:33 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yxQBM1F5JzDrZc for ; Wed, 13 Dec 2017 16:25:14 +1100 (AEDT) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBD5Nvop017243 for ; Wed, 13 Dec 2017 00:25:11 -0500 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0a-001b2d01.pphosted.com with ESMTP id 2etrs7unj2-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Dec 2017 00:25:11 -0500 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Dec 2017 05:25:06 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5P6AJ35520590 for ; Wed, 13 Dec 2017 05:25:06 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BDE9B4C040 for ; Wed, 13 Dec 2017 05:19:50 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 574CA4C044 for ; Wed, 13 Dec 2017 05:19:50 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP for ; Wed, 13 Dec 2017 05:19:50 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:55:04 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0012-0000-0000-000005987503 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0013-0000-0000-000019138BD1 Message-Id: <151314269264.30276.13035521804645350917.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 6/6] core/hmi: Display chip location code while displaying core FIR. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar No functionality change. Signed-off-by: Mahesh Salgaonkar --- core/hmi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/core/hmi.c b/core/hmi.c index 5b99984..eb4faa3 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -319,6 +319,7 @@ static bool decode_core_fir(struct cpu_thread *cpu, int i; bool found = false; int64_t ret; + const char *loc; /* Sanity check */ if (!cpu || !hmi_evt) @@ -349,7 +350,9 @@ static bool decode_core_fir(struct cpu_thread *cpu, if (!core_fir) return false; - prlog(PR_INFO, "CHIP ID: %x, CORE ID: %x, FIR: %016llx\n", + loc = chip_loc_code(cpu->chip_id); + prlog(PR_INFO, "[Loc: %s]: CHIP ID: %x, CORE ID: %x, FIR: %016llx\n", + loc ? loc : "Not Available", cpu->chip_id, core_id, core_fir); /* Check CORE FIR bits and populate HMI event with error info. */