From patchwork Fri May 29 21:31:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aaron Sawdey X-Patchwork-Id: 1301025 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=XBfxMaAw; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Yd7p2Zv1z9sRN for ; Sat, 30 May 2020 07:32:20 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EEDC33840C04; Fri, 29 May 2020 21:32:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EEDC33840C04 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1590787938; bh=THOQUfIjwSpIGTjp3lyulNnKSPU+dtykmGiOQNXDhVc=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=XBfxMaAwQfI99PgYE18kk+H5noZMZ1W/pBRxLW9VGsB41yYfIRAdJWr0XxGj0pmpt v/QfH9X33ApIk7X78wc0z7rCwEje5Ff+AhDrQaqciIFQbeFJqvO62v1JjgDBHGSHoh T/sCj9DUY6AHgV/d3KHLsINGEXQJFf/qFgJUZMf8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 93CA5387084F for ; Fri, 29 May 2020 21:32:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 93CA5387084F Received: from pps.filterd (m0187473.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 04TL2xwE123715; Fri, 29 May 2020 17:32:14 -0400 Received: from ppma04dal.us.ibm.com (7a.29.35a9.ip4.static.sl-reverse.com [169.53.41.122]) by mx0a-001b2d01.pphosted.com with ESMTP id 31as16ufvh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 May 2020 17:32:14 -0400 Received: from pps.filterd (ppma04dal.us.ibm.com [127.0.0.1]) by ppma04dal.us.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 04TL9PUb020338; Fri, 29 May 2020 21:32:12 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma04dal.us.ibm.com with ESMTP id 316ufb9k74-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 May 2020 21:32:12 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 04TLWCE650331904 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 29 May 2020 21:32:12 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F4191AE068; Fri, 29 May 2020 21:32:11 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CFF8AAE05F; Fri, 29 May 2020 21:32:11 +0000 (GMT) Received: from marlin.aus.stglabs.ibm.com (unknown [9.40.194.84]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTPS; Fri, 29 May 2020 21:32:11 +0000 (GMT) Received: from marlin.aus.stglabs.ibm.com (localhost [127.0.0.1]) by marlin.aus.stglabs.ibm.com (8.15.2/8.15.2/Debian-10) with ESMTP id 04TLVrYk045238; Fri, 29 May 2020 16:31:53 -0500 Received: (from sawdey@localhost) by marlin.aus.stglabs.ibm.com (8.15.2/8.15.2/Submit) id 04TLVdhL045101; Fri, 29 May 2020 16:31:39 -0500 To: gcc-patches@gcc.gnu.org Subject: [PATCH] rs6000: PR target/95347 Correctly identify stfs if prefixed Date: Fri, 29 May 2020 16:31:09 -0500 Message-Id: <20200529213109.44674-1-acsawdey@linux.ibm.com> X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-05-29_10:2020-05-28, 2020-05-29 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 mlxlogscore=868 cotscore=-2147483648 malwarescore=0 spamscore=0 phishscore=0 priorityscore=1501 clxscore=1015 adultscore=0 suspectscore=1 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2005290153 X-Spam-Status: No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Aaron Sawdey via Gcc-patches From: Aaron Sawdey Reply-To: Aaron Sawdey Cc: meissner@linux.ibm.com, wschmidt@linux.ibm.com, segher@kernel.crashing.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Because reg_to_non_prefixed() only looks at the register being used, it doesn't get the right answer for stfs, which leads to us not seeing that it has a PCREL symbol ref. This patch works around this by introducing a helper function that inspects the insn to see if it is in fact a stfs. Then if we use NON_PREFIXED_DEFAULT, address_to_insn_form() can see that it has the PCREL symbol ref. OK for trunk if regstrap on ppc64le passes? Thanks, Aaron 2020-05-29 Aaron Sawdey PR target/95347 * config/rs6000/rs6000.c (prefixed_store_p): Add special case for stfs. (is_stfs_insn): New helper function. --- gcc/config/rs6000/rs6000.c | 60 +++++++++++++++++++++++++++++++++++++- 1 file changed, 59 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 8435bc15d72..d58fceeeea4 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -24980,6 +24980,58 @@ address_to_insn_form (rtx addr, return INSN_FORM_BAD; } +/* Helper function to see if we're potentially looking at stfs that + could be pstfs. */ + +static bool +is_stfs_insn (rtx_insn *insn) +{ + rtx pattern=PATTERN (insn); + if (GET_CODE (pattern) != PARALLEL) + return false; + + /* This should be a parallel with exactly one set and one clobber. */ + int i; + rtx set=NULL, clobber=NULL; + for (i = 0; i < XVECLEN (pattern, 0); i++) + { + rtx elt = XVECEXP (pattern, 0, i); + if (GET_CODE (elt) == SET) + { + if (set) + return false; + set = elt; + } + else if (GET_CODE (elt) == CLOBBER) + { + if (clobber) + return false; + clobber = elt; + } + else + return false; + } + + /* All we care is that the destination of the SET is a mem:SI, + the source should be an UNSPEC_SI_FROM_SF, and the clobber + should be a scratch:V4SF. */ + + rtx dest = XEXP (set, 0); + rtx src = XEXP (set, 1); + rtx scratch = XEXP (clobber, 0); + + if (GET_CODE (src) != UNSPEC || XINT (src, 1) != UNSPEC_SI_FROM_SF) + return false; + + if (GET_CODE (dest) != MEM || GET_MODE (dest) != SImode) + return false; + + if (GET_CODE (scratch) != SCRATCH || GET_MODE (scratch) != V4SFmode) + return false; + + return true; +} + /* Helper function to take a REG and a MODE and turn it into the non-prefixed instruction format (D/DS/DQ) used for offset memory. */ @@ -25119,8 +25171,14 @@ prefixed_store_p (rtx_insn *insn) return false; machine_mode mem_mode = GET_MODE (mem); + rtx addr = XEXP (mem, 0); enum non_prefixed_form non_prefixed = reg_to_non_prefixed (reg, mem_mode); - return address_is_prefixed (XEXP (mem, 0), mem_mode, non_prefixed); + /* Need to make sure we aren't looking at a stfs which doesn't + looking like the other things that we are looking for. */ + if (non_prefixed == NON_PREFIXED_X && is_stfs_insn (insn)) + return address_is_prefixed (addr, mem_mode, NON_PREFIXED_DEFAULT); + else + return address_is_prefixed (addr, mem_mode, non_prefixed); } /* Whether a load immediate or add instruction is a prefixed instruction. This