From patchwork Thu Dec 7 06:38:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 845437 X-Patchwork-Delegate: cyrille.pitchen@atmel.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WIEJIy/B"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="hnAkYPBz"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ysm9d4cmfz9s71 for ; Thu, 7 Dec 2017 17:41:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CF6Op/y6P4J8ykFqw/9AQQdV9wqk4RN3I8I/1oWYc40=; b=WIEJIy/By7AzxX CNfN6mlUJFaJgRrhwNFv2cgz1d2WfqKKdL594GMgfoGWxw62jfyqeKcj5nsCjlorRvFTc4GgopxRZ rDrDMIA7rd/hHQX9Em6+lf5BuE3uOVO5OHTh5Ank63p+xhHfIbWkBhx91WdryowlhnIhmt2p1b4T8 YOErXIvJIcoJPoF0fnDDe6Qe20U9F+6NEM9Rmaw4IsFqHxnAbkDNRXyz3IHEEC4CqpC3iFpu2wZJW wWp1Uu3VPqaEvk55hiI1zD8Ozg1NEoM5xlDOgNtUKFUXv+1t0O2UJWhYSGzS8PDkicc1bdDaHZQcU 6InkyV3O7RoC4YxC0l5A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eMpsS-0005id-SU; Thu, 07 Dec 2017 06:41:48 +0000 Received: from lelnx194.ext.ti.com ([198.47.27.80]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eMprq-0004qE-TX; Thu, 07 Dec 2017 06:41:18 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vB76eLCI012160; Thu, 7 Dec 2017 00:40:21 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1512628821; bh=FE2JMCFUlMc7wWqIEDJPVWR9UP0DE959h93DZfxH5+g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hnAkYPBzWZtKQ+SNPhbko1lHUQxkT0tbV1ljn4DizfCxmiNg4gZX6xZ2TLcwlxNZS RJxB5wntS+CfpuekIXDULQ95pbpl4xTVu2EOZ6tEdPwCZUU5Xj4/awbO9uwH4j+AT5 wAV2GAiJvEb19AuzIN8EbIDP7s0WdZoRgcfgw7+s= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB76eL2F003253; Thu, 7 Dec 2017 00:40:21 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 7 Dec 2017 00:40:21 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 7 Dec 2017 00:40:21 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB76eEUl010106; Thu, 7 Dec 2017 00:40:18 -0600 From: Vignesh R To: Cyrille Pitchen , Marek Vasut Subject: [PATCH 1/2] mtd: spi-nor: cadence-quadspi: Refactor indirect read/write sequence. Date: Thu, 7 Dec 2017 12:08:03 +0530 Message-ID: <20171207063804.29436-2-vigneshr@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171207063804.29436-1-vigneshr@ti.com> References: <20171207063804.29436-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171206_224111_746396_226668CF X-CRM114-Status: UNSURE ( 9.51 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [198.47.27.80 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vignesh R , linux-kernel@vger.kernel.org, Dinh Nguyen , linux-mtd@lists.infradead.org, matthew.gerlach@linux.intel.com, Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Move configuring of indirect read/write start address to cqspi_indirect_*_execute() function and rename cqspi_indirect_*_setup() function. This will help to reuse cqspi_indirect_*_setup() function for supporting direct access mode. Signed-off-by: Vignesh R --- drivers/mtd/spi-nor/cadence-quadspi.c | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index 75a2bc447a99..becc7d714ab8 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -450,8 +450,7 @@ static int cqspi_command_write_addr(struct spi_nor *nor, return cqspi_exec_flash_cmd(cqspi, reg); } -static int cqspi_indirect_read_setup(struct spi_nor *nor, - const unsigned int from_addr) +static int cqspi_read_setup(struct spi_nor *nor) { struct cqspi_flash_pdata *f_pdata = nor->priv; struct cqspi_st *cqspi = f_pdata->cqspi; @@ -459,7 +458,6 @@ static int cqspi_indirect_read_setup(struct spi_nor *nor, unsigned int dummy_clk = 0; unsigned int reg; - writel(from_addr, reg_base + CQSPI_REG_INDIRECTRDSTARTADDR); reg = nor->read_opcode << CQSPI_REG_RD_INSTR_OPCODE_LSB; reg |= cqspi_calc_rdreg(nor, nor->read_opcode); @@ -493,8 +491,8 @@ static int cqspi_indirect_read_setup(struct spi_nor *nor, return 0; } -static int cqspi_indirect_read_execute(struct spi_nor *nor, - u8 *rxbuf, const unsigned n_rx) +static int cqspi_indirect_read_execute(struct spi_nor *nor, u8 *rxbuf, + loff_t from_addr, const size_t n_rx) { struct cqspi_flash_pdata *f_pdata = nor->priv; struct cqspi_st *cqspi = f_pdata->cqspi; @@ -504,6 +502,7 @@ static int cqspi_indirect_read_execute(struct spi_nor *nor, unsigned int bytes_to_read = 0; int ret = 0; + writel(from_addr, reg_base + CQSPI_REG_INDIRECTRDSTARTADDR); writel(remaining, reg_base + CQSPI_REG_INDIRECTRDBYTES); /* Clear all interrupts. */ @@ -570,8 +569,7 @@ static int cqspi_indirect_read_execute(struct spi_nor *nor, return ret; } -static int cqspi_indirect_write_setup(struct spi_nor *nor, - const unsigned int to_addr) +static int cqspi_write_setup(struct spi_nor *nor) { unsigned int reg; struct cqspi_flash_pdata *f_pdata = nor->priv; @@ -584,8 +582,6 @@ static int cqspi_indirect_write_setup(struct spi_nor *nor, reg = cqspi_calc_rdreg(nor, nor->program_opcode); writel(reg, reg_base + CQSPI_REG_RD_INSTR); - writel(to_addr, reg_base + CQSPI_REG_INDIRECTWRSTARTADDR); - reg = readl(reg_base + CQSPI_REG_SIZE); reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK; reg |= (nor->addr_width - 1); @@ -593,8 +589,8 @@ static int cqspi_indirect_write_setup(struct spi_nor *nor, return 0; } -static int cqspi_indirect_write_execute(struct spi_nor *nor, - const u8 *txbuf, const unsigned n_tx) +static int cqspi_indirect_write_execute(struct spi_nor *nor, loff_t to_addr, + const u8 *txbuf, const size_t n_tx) { const unsigned int page_size = nor->page_size; struct cqspi_flash_pdata *f_pdata = nor->priv; @@ -604,6 +600,7 @@ static int cqspi_indirect_write_execute(struct spi_nor *nor, unsigned int write_bytes; int ret; + writel(to_addr, reg_base + CQSPI_REG_INDIRECTWRSTARTADDR); writel(remaining, reg_base + CQSPI_REG_INDIRECTWRBYTES); /* Clear all interrupts. */ @@ -900,11 +897,11 @@ static ssize_t cqspi_write(struct spi_nor *nor, loff_t to, if (ret) return ret; - ret = cqspi_indirect_write_setup(nor, to); + ret = cqspi_write_setup(nor); if (ret) return ret; - ret = cqspi_indirect_write_execute(nor, buf, len); + ret = cqspi_indirect_write_execute(nor, to, buf, len); if (ret) return ret; @@ -920,11 +917,11 @@ static ssize_t cqspi_read(struct spi_nor *nor, loff_t from, if (ret) return ret; - ret = cqspi_indirect_read_setup(nor, from); + ret = cqspi_read_setup(nor); if (ret) return ret; - ret = cqspi_indirect_read_execute(nor, buf, len); + ret = cqspi_indirect_read_execute(nor, buf, from, len); if (ret) return ret; From patchwork Thu Dec 7 06:38:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 845441 X-Patchwork-Delegate: cyrille.pitchen@atmel.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; 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Thu, 7 Dec 2017 00:40:22 -0600 From: Vignesh R To: Cyrille Pitchen , Marek Vasut Subject: [PATCH 2/2] mtd: spi-nor: cadence-quadspi: Add support for direct access mode Date: Thu, 7 Dec 2017 12:08:04 +0530 Message-ID: <20171207063804.29436-3-vigneshr@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171207063804.29436-1-vigneshr@ti.com> References: <20171207063804.29436-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171206_224114_142274_A714D764 X-CRM114-Status: GOOD ( 11.74 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [198.47.27.77 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vignesh R , linux-kernel@vger.kernel.org, Dinh Nguyen , linux-mtd@lists.infradead.org, matthew.gerlach@linux.intel.com, Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Cadence QSPI controller provides direct access mode through which flash can be accessed in a memory-mapped IO mode. This enables read/write to flash using memcpy*() functions. This mode provides higher throughput for both read/write operations when compared to current indirect mode of operation. This patch therefore adds support to use QSPI in direct mode. If the window reserved in SoC's memory map for MMIO access is less that of flash size(like on most SoCFPGA variants), then the driver falls back to indirect mode of operation. On TI's 66AK2G SoC, with ARM running at 600MHz and QSPI at 96MHz switching to direct mode improves read throughput from 3MB/s to 8MB/s. Signed-off-by: Vignesh R --- drivers/mtd/spi-nor/cadence-quadspi.c | 52 +++++++++++++++++++++++++++++++++-- 1 file changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index becc7d714ab8..f8721ed68bc6 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -58,6 +58,7 @@ struct cqspi_flash_pdata { u8 data_width; u8 cs; bool registered; + bool use_direct_mode; }; struct cqspi_st { @@ -68,6 +69,7 @@ struct cqspi_st { void __iomem *iobase; void __iomem *ahb_base; + resource_size_t ahb_size; struct completion transfer_complete; struct mutex bus_mutex; @@ -103,6 +105,7 @@ struct cqspi_st { /* Register map */ #define CQSPI_REG_CONFIG 0x00 #define CQSPI_REG_CONFIG_ENABLE_MASK BIT(0) +#define CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL BIT(7) #define CQSPI_REG_CONFIG_DECODE_MASK BIT(9) #define CQSPI_REG_CONFIG_CHIPSELECT_LSB 10 #define CQSPI_REG_CONFIG_DMA_MASK BIT(15) @@ -569,6 +572,21 @@ static int cqspi_indirect_read_execute(struct spi_nor *nor, u8 *rxbuf, return ret; } +static int cqspi_direct_read_execute(struct spi_nor *nor, u8 *rxbuf, + loff_t from_addr, const size_t len) +{ + struct cqspi_flash_pdata *f_pdata = nor->priv; + struct cqspi_st *cqspi = f_pdata->cqspi; + u32 reg; + + reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); + reg |= CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL; + writel(reg, cqspi->iobase + CQSPI_REG_CONFIG); + memcpy_fromio(rxbuf, cqspi->ahb_base + from_addr, len); + + return 0; +} + static int cqspi_write_setup(struct spi_nor *nor) { unsigned int reg; @@ -671,6 +689,21 @@ static int cqspi_indirect_write_execute(struct spi_nor *nor, loff_t to_addr, return ret; } +static int cqspi_direct_write_execute(struct spi_nor *nor, loff_t to_addr, + const u8 *txbuf, const size_t len) +{ + struct cqspi_flash_pdata *f_pdata = nor->priv; + struct cqspi_st *cqspi = f_pdata->cqspi; + u32 reg; + + reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); + reg |= CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL; + writel(reg, cqspi->iobase + CQSPI_REG_CONFIG); + memcpy_toio(cqspi->ahb_base + to_addr, txbuf, len); + + return 0; +} + static void cqspi_chipselect(struct spi_nor *nor) { struct cqspi_flash_pdata *f_pdata = nor->priv; @@ -891,6 +924,7 @@ static int cqspi_set_protocol(struct spi_nor *nor, const int read) static ssize_t cqspi_write(struct spi_nor *nor, loff_t to, size_t len, const u_char *buf) { + struct cqspi_flash_pdata *f_pdata = nor->priv; int ret; ret = cqspi_set_protocol(nor, 0); @@ -901,7 +935,10 @@ static ssize_t cqspi_write(struct spi_nor *nor, loff_t to, if (ret) return ret; - ret = cqspi_indirect_write_execute(nor, to, buf, len); + if (f_pdata->use_direct_mode) + ret = cqspi_direct_write_execute(nor, to, buf, len); + else + ret = cqspi_indirect_write_execute(nor, to, buf, len); if (ret) return ret; @@ -911,6 +948,7 @@ static ssize_t cqspi_write(struct spi_nor *nor, loff_t to, static ssize_t cqspi_read(struct spi_nor *nor, loff_t from, size_t len, u_char *buf) { + struct cqspi_flash_pdata *f_pdata = nor->priv; int ret; ret = cqspi_set_protocol(nor, 1); @@ -921,7 +959,10 @@ static ssize_t cqspi_read(struct spi_nor *nor, loff_t from, if (ret) return ret; - ret = cqspi_indirect_read_execute(nor, buf, from, len); + if (f_pdata->use_direct_mode) + ret = cqspi_direct_read_execute(nor, buf, from, len); + else + ret = cqspi_indirect_read_execute(nor, buf, from, len); if (ret) return ret; @@ -1153,6 +1194,12 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi, struct device_node *np) goto err; f_pdata->registered = true; + + if (mtd->size <= cqspi->ahb_size) { + f_pdata->use_direct_mode = true; + dev_info(nor->dev, "using direct mode for %s\n", + mtd->name); + } } return 0; @@ -1212,6 +1259,7 @@ static int cqspi_probe(struct platform_device *pdev) dev_err(dev, "Cannot remap AHB address.\n"); return PTR_ERR(cqspi->ahb_base); } + cqspi->ahb_size = resource_size(res_ahb); init_completion(&cqspi->transfer_complete);