From patchwork Mon Nov 27 12:28:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 841671 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Poa0VKA8"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3ylmwj0752z9sRm for ; Mon, 27 Nov 2017 23:55:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752365AbdK0My7 (ORCPT ); Mon, 27 Nov 2017 07:54:59 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:39431 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752736AbdK0My4 (ORCPT ); Mon, 27 Nov 2017 07:54:56 -0500 Received: by mail-pf0-f196.google.com with SMTP id l24so17343942pfj.6; Mon, 27 Nov 2017 04:54:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=lyjlDqyLNobB750DCTZALiTlx7almEMiqEMN4S934u4=; b=Poa0VKA8sL98T6IbeggOqm+DaDU8N3SZjI96fPU9M4sq3aOciGKGL6VJEF6NUE+vFI igVbXZFG+udAQ22+2O7WciUUH2sJDkpZsJpneNubeLo1AzftB+JpJ0Gj1s7GwT71Usd2 kFa8SdnQb9newozpyiOpjSy6SE9CStn3KdkxxfL5qokrwPo5ji5oo9l2z+dVb0W1Ogpl KOaINmf8KQ9HGcDd355kQDA7n1Hq0g2cNbdPXvy7jvnkSsY3d4U+IfiwLuI6YJKuy6hJ bUEtz5XyDhYZ71ToqbmydducD7s/t0zfg+/Ojf2EPH5kQ4GDZ+BnXs8kzSX0n/eoG+Fg T2kA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=lyjlDqyLNobB750DCTZALiTlx7almEMiqEMN4S934u4=; b=XrR61x6TQaoykcMCQBmntt/yHIQeK7lUYrZ1cdco6fhavHLLb+QgY0X1FVlJOEoLlh GlBuwCYJYEeo2s1t59+VCmOKDenZHtXvd1pwkwLuioqB6xY35p0It1Cbd4SP0mP10Com S0AnTgdvAFwzmP5tcFbbCgfvUGgwQ9Do2UCS4O/W1io2ZyPVBLQ1WbcP/Zglob1KWwCu uv/Jjux168VRLgV1KveCzld7Wdl8XH9udLz7cm7ku/VPolBZtsOmm+VQaYXRf3vWocuz bE27sHD/IHUx7K0qGPPPiwgO2yIYfarMY8zGO5YYoyMmo7w5cvBPDgvlYBTvRXt1/5sF v3DA== X-Gm-Message-State: AJaThX4P/PN5OO+qNDRma88329SweaC3LS33piS9qX5cYvdHdwXGoZdT sGLIShhdHDT9Jv3XAozC0hw= X-Google-Smtp-Source: AGs4zMaxefVmPg+J3asmmkE1435dVfJmTXPh4tr48tQJzy5PwThGfIlcLCGVBeQMvYD4+2//ksgJ3Q== X-Received: by 10.101.72.132 with SMTP id n4mr7081761pgs.288.1511787294952; Mon, 27 Nov 2017 04:54:54 -0800 (PST) Received: from app09.andestech.com ([118.163.51.199]) by smtp.gmail.com with ESMTPSA id w64sm55225459pfj.62.2017.11.27.04.54.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 04:54:54 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org Cc: green.hu@gmail.com, Rick Chen Subject: [PATCH v2 26/35] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Date: Mon, 27 Nov 2017 20:28:13 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Greentime Hu This patch adds an irqchip driver document for the Andestech Internal Vector Interrupt Controller. Signed-off-by: Rick Chen Signed-off-by: Greentime Hu Acked-by: Rob Herring --- .../interrupt-controller/andestech,ativic32.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file mode 100644 index 0000000..f4b4193 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt @@ -0,0 +1,19 @@ +* Andestech Internal Vector Interrupt Controller + +The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller +suitable for a simpler SoC platform not requiring a more sophisticated and +bigger External Vector Interrupt Controller. + + +Main node required properties: + +- compatible : should at least contain "andestech,ativic32". +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells: 1 cells and refer to interrupt-controller/interrupts + +Examples: + intc: interrupt-controller { + compatible = "andestech,ativic32"; + #interrupt-cells = <1>; + interrupt-controller; + }; From patchwork Mon Nov 27 12:28:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 841681 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hFL4/GjV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yln194BCWz9sRg for ; Mon, 27 Nov 2017 23:58:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752874AbdK0M6W (ORCPT ); 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Mon, 27 Nov 2017 04:55:05 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org Cc: green.hu@gmail.com, Vincent Chen , Rick Chen , Zong Li Subject: [PATCH v2 29/35] dt-bindings: nds32 CPU Bindings Date: Mon, 27 Nov 2017 20:28:16 +0800 Message-Id: <20a04f4a5b08dcec221e0c511e42ff3df711ae66.1511785528.git.green.hu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Greentime Hu This patch adds nds32 CPU binding documents. Signed-off-by: Vincent Chen Signed-off-by: Rick Chen Signed-off-by: Zong Li Signed-off-by: Greentime Hu --- Documentation/devicetree/bindings/nds32/cpus.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt new file mode 100644 index 0000000..c302c89 --- /dev/null +++ b/Documentation/devicetree/bindings/nds32/cpus.txt @@ -0,0 +1,32 @@ +* Andestech Processor Binding + +This binding specifies what properties must be available in the device tree +representation of a Andestech Processor Core, which is the root node in the +tree. + +Required properties: + + - compatible: + Usage: required + Value type: + Definition: should be one of: + "andestech,n13" + "andestech,n15" + "andestech,d15" + "andestech,n10" + "andestech,d10" + "andestech,nds32v3" + - device_type + Usage: required + Value type: + Definition: must be "cpu" + - clock-frequency: Contains the clock frequency for CPU, in Hz. + +* Examples + +/ { + cpu { + device_type = "cpu"; + compatible = "andestech,n13", "andestech,nds32v3"; + }; +}; From patchwork Mon Nov 27 12:28:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 841676 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="rELNSzQW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3ylmxj1pwKz9sRm for ; Mon, 27 Nov 2017 23:55:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752521AbdK0Mzb (ORCPT ); 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Mon, 27 Nov 2017 04:55:26 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org Cc: Rick Chen , green.hu@gmail.com Subject: [PATCH v2 35/35] dt-bindings: timer: Add andestech atcpit100 timer binding doc Date: Mon, 27 Nov 2017 20:28:22 +0800 Message-Id: <60f23e7fcff11f16b0bca4753a39d098849eeac3.1511785528.git.green.hu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Rick Chen Add a document to describe Andestech atcpit100 timer and binding information. Signed-off-by: Rick Chen Acked-by: Rob Herring Signed-off-by: Greentime Hu --- .../bindings/timer/andestech,atcpit100-timer.txt | 33 ++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt diff --git a/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt new file mode 100644 index 0000000..b97ff32 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt @@ -0,0 +1,33 @@ +Andestech ATCPIT100 timer +------------------------------------------------------------------ +ATCPIT100 is a generic IP block from Andes Technology, embedded in +Andestech AE3XX platforms and other designs. + +This timer is a set of compact multi-function timers, which can be +used as pulse width modulators (PWM) as well as simple timers. + +It supports up to 4 PIT channels. Each PIT channel is a +multi-function timer and provide the following usage scenarios: +One 32-bit timer +Two 16-bit timers +Four 8-bit timers +One 16-bit PWM +One 16-bit timer and one 8-bit PWM +Two 8-bit timer and one 8-bit PWM + +Required properties: +- compatible : Should be "andestech,atcpit100" +- reg : Address and length of the register set +- interrupts : Reference to the timer interrupt +- clocks : a clock to provide the tick rate for "andestech,atcpit100" +- clock-names : should be "PCLK" for the external tick timer. + +Examples: + +timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0xf0400000 0x1000>; + interrupts = <2 4>; + clocks = <&clk_pll>; + clock-names = "PCLK"; +};