From patchwork Thu Dec 12 10:25:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1208372 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47YVM70zy5z9sPL for ; Thu, 12 Dec 2019 21:26:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728523AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 Received: from mga09.intel.com ([134.134.136.24]:57202 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728492AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 02:26:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,305,1571727600"; d="scan'208";a="296555537" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 12 Dec 2019 02:26:06 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 43815122; Thu, 12 Dec 2019 12:26:05 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org, Mika Westerberg , hdegoede@redhat.com Cc: Andy Shevchenko Subject: [PATCH v1 1/5] pinctrl: baytrail: Move IRQ valid mask initialization to a dedicated callback Date: Thu, 12 Dec 2019 12:25:53 +0200 Message-Id: <20191212102557.87754-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> References: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There is a logical continuation of the commit 5fbe5b5883f8 ("gpio: Initialize the irqchip valid_mask with a callback") to split IRQ initialization to hardware and valid mask setup parts. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-baytrail.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index d829843314ba..ea61a19857c1 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -1432,23 +1432,11 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) static void byt_init_irq_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, unsigned int ngpios) -{ - /* - * FIXME: currently the valid_mask is filled in as part of - * initializing the irq_chip below in byt_gpio_irq_init_hw(). - * when converting this driver to the new way of passing the - * gpio_irq_chip along when adding the gpio_chip, move the - * mask initialization into this callback instead. Right now - * this callback is here to make sure the mask gets allocated. - */ -} - -static int byt_gpio_irq_init_hw(struct gpio_chip *chip) { struct byt_gpio *vg = gpiochip_get_data(chip); struct device *dev = &vg->pdev->dev; void __iomem *reg; - u32 base, value; + u32 value; int i; /* @@ -1469,13 +1457,20 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) value = readl(reg); if (value & BYT_DIRECT_IRQ_EN) { - clear_bit(i, chip->irq.valid_mask); + clear_bit(i, valid_mask); dev_dbg(dev, "excluding GPIO %d from IRQ domain\n", i); } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) { byt_gpio_clear_triggering(vg, i); dev_dbg(dev, "disabling GPIO %d\n", i); } } +} + +static int byt_gpio_irq_init_hw(struct gpio_chip *chip) +{ + struct byt_gpio *vg = gpiochip_get_data(chip); + void __iomem *reg; + u32 base, value; /* clear interrupt status trigger registers */ for (base = 0; base < vg->soc_data->npins; base += 32) { From patchwork Thu Dec 12 10:25:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1208375 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47YVM93WyVz9sPc for ; Thu, 12 Dec 2019 21:26:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728548AbfLLK0K (ORCPT ); Thu, 12 Dec 2019 05:26:10 -0500 Received: from mga12.intel.com ([192.55.52.136]:37567 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728512AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 02:26:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,305,1571727600"; d="scan'208";a="245664560" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 12 Dec 2019 02:26:06 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 51C85238; Thu, 12 Dec 2019 12:26:05 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org, Mika Westerberg , hdegoede@redhat.com Cc: Andy Shevchenko Subject: [PATCH v1 2/5] pinctrl: intel: Share struct intel_pinctrl for wider use Date: Thu, 12 Dec 2019 12:25:54 +0200 Message-Id: <20191212102557.87754-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> References: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There are few drivers for Intel SoC GPIO which may utilize the same data structure to describe this IP. Share struct intel_pinctrl for wider user. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-intel.c | 35 +-------------------- drivers/pinctrl/intel/pinctrl-intel.h | 44 +++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 34 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 4860bc9a4e48..924094956f8d 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -8,8 +8,8 @@ */ #include -#include #include +#include #include #include #include @@ -85,39 +85,6 @@ struct intel_community_context { u32 *hostown; }; -struct intel_pinctrl_context { - struct intel_pad_context *pads; - struct intel_community_context *communities; -}; - -/** - * struct intel_pinctrl - Intel pinctrl private structure - * @dev: Pointer to the device structure - * @lock: Lock to serialize register access - * @pctldesc: Pin controller description - * @pctldev: Pointer to the pin controller device - * @chip: GPIO chip in this pin controller - * @irqchip: IRQ chip in this pin controller - * @soc: SoC/PCH specific pin configuration data - * @communities: All communities in this pin controller - * @ncommunities: Number of communities in this pin controller - * @context: Configuration saved over system sleep - * @irq: pinctrl/GPIO chip irq number - */ -struct intel_pinctrl { - struct device *dev; - raw_spinlock_t lock; - struct pinctrl_desc pctldesc; - struct pinctrl_dev *pctldev; - struct gpio_chip chip; - struct irq_chip irqchip; - const struct intel_pinctrl_soc_data *soc; - struct intel_community *communities; - size_t ncommunities; - struct intel_pinctrl_context context; - int irq; -}; - #define pin_to_padno(c, p) ((p) - (c)->pin_base) #define padgroup_offset(g, p) ((p) - (g)->base) diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 34b38a321760..c6f066f6d3fb 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -10,7 +10,10 @@ #ifndef PINCTRL_INTEL_H #define PINCTRL_INTEL_H +#include +#include #include +#include struct pinctrl_pin_desc; struct platform_device; @@ -174,6 +177,47 @@ struct intel_pinctrl_soc_data { size_t ncommunities; }; +struct intel_pad_context; +struct intel_community_context; + +/** + * struct intel_pinctrl_context - context to be saved during suspend-resume + * @pads: Opaque context per pad (driver dependent) + * @communities: Opaque context per community (driver dependent) + */ +struct intel_pinctrl_context { + struct intel_pad_context *pads; + struct intel_community_context *communities; +}; + +/** + * struct intel_pinctrl - Intel pinctrl private structure + * @dev: Pointer to the device structure + * @lock: Lock to serialize register access + * @pctldesc: Pin controller description + * @pctldev: Pointer to the pin controller device + * @chip: GPIO chip in this pin controller + * @irqchip: IRQ chip in this pin controller + * @soc: SoC/PCH specific pin configuration data + * @communities: All communities in this pin controller + * @ncommunities: Number of communities in this pin controller + * @context: Configuration saved over system sleep + * @irq: pinctrl/GPIO chip irq number + */ +struct intel_pinctrl { + struct device *dev; + raw_spinlock_t lock; + struct pinctrl_desc pctldesc; + struct pinctrl_dev *pctldev; + struct gpio_chip chip; + struct irq_chip irqchip; + const struct intel_pinctrl_soc_data *soc; + struct intel_community *communities; + size_t ncommunities; + struct intel_pinctrl_context context; + int irq; +}; + int intel_pinctrl_probe_by_hid(struct platform_device *pdev); int intel_pinctrl_probe_by_uid(struct platform_device *pdev); From patchwork Thu Dec 12 10:25:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1208373 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47YVM80YKKz9sPf for ; Thu, 12 Dec 2019 21:26:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728521AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 Received: from mga06.intel.com ([134.134.136.31]:21017 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728410AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 02:26:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,305,1571727600"; d="scan'208";a="220663831" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 12 Dec 2019 02:26:06 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5C29223E; Thu, 12 Dec 2019 12:26:05 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org, Mika Westerberg , hdegoede@redhat.com Cc: Andy Shevchenko Subject: [PATCH v1 3/5] pinctrl: baytrail: Keep pointer to struct device instead of its container Date: Thu, 12 Dec 2019 12:25:55 +0200 Message-Id: <20191212102557.87754-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> References: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There is no need to keep pointer to struct platform_device, which is container of struct device, because the latter is what have been used everywhere outside of ->probe() path. In any case we may derive pointer to the container when needed. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-baytrail.c | 58 ++++++++++++------------ 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index ea61a19857c1..bd33b39082d9 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -106,9 +106,9 @@ struct byt_gpio_pin_context { } struct byt_gpio { + struct device *dev; struct gpio_chip chip; struct irq_chip irqchip; - struct platform_device *pdev; struct pinctrl_dev *pctl_dev; struct pinctrl_desc pctl_desc; const struct intel_pinctrl_soc_data *soc_data; @@ -668,7 +668,7 @@ static void byt_set_group_simple_mux(struct byt_gpio *vg, padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG); if (!padcfg0) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Group %s, pin %i not muxed (no padcfg0)\n", group.name, i); continue; @@ -698,7 +698,7 @@ static void byt_set_group_mixed_mux(struct byt_gpio *vg, padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG); if (!padcfg0) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Group %s, pin %i not muxed (no padcfg0)\n", group.name, i); continue; @@ -785,13 +785,12 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev, value |= gpio_mux; writel(value, reg); - dev_warn(&vg->pdev->dev, FW_BUG - "pin %u forcibly re-configured as GPIO\n", offset); + dev_warn(vg->dev, FW_BUG "pin %u forcibly re-configured as GPIO\n", offset); } raw_spin_unlock_irqrestore(&byt_lock, flags); - pm_runtime_get(&vg->pdev->dev); + pm_runtime_get(vg->dev); return 0; } @@ -803,7 +802,7 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev, struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); byt_gpio_clear_triggering(vg, offset); - pm_runtime_put(&vg->pdev->dev); + pm_runtime_put(vg->dev); } static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, @@ -1013,7 +1012,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, if (val & BYT_INPUT_EN) { val &= ~BYT_INPUT_EN; writel(val, val_reg); - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "pin %u forcibly set to input mode\n", offset); } @@ -1035,7 +1034,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, if (val & BYT_INPUT_EN) { val &= ~BYT_INPUT_EN; writel(val, val_reg); - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "pin %u forcibly set to input mode\n", offset); } @@ -1412,7 +1411,7 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve interrupt status register\n", base); continue; @@ -1434,7 +1433,6 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, unsigned int ngpios) { struct byt_gpio *vg = gpiochip_get_data(chip); - struct device *dev = &vg->pdev->dev; void __iomem *reg; u32 value; int i; @@ -1449,7 +1447,7 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve conf0 register\n", i); continue; @@ -1458,10 +1456,10 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, value = readl(reg); if (value & BYT_DIRECT_IRQ_EN) { clear_bit(i, valid_mask); - dev_dbg(dev, "excluding GPIO %d from IRQ domain\n", i); + dev_dbg(vg->dev, "excluding GPIO %d from IRQ domain\n", i); } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) { byt_gpio_clear_triggering(vg, i); - dev_dbg(dev, "disabling GPIO %d\n", i); + dev_dbg(vg->dev, "disabling GPIO %d\n", i); } } } @@ -1477,7 +1475,7 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve irq status reg\n", base); continue; @@ -1488,7 +1486,7 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) might be misconfigured in bios */ value = readl(reg); if (value) - dev_err(&vg->pdev->dev, + dev_err(vg->dev, "GPIO interrupt error, pins misconfigured. INT_STAT%u: 0x%08x\n", base / 32, value); } @@ -1499,7 +1497,7 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) static int byt_gpio_add_pin_ranges(struct gpio_chip *chip) { struct byt_gpio *vg = gpiochip_get_data(chip); - struct device *dev = &vg->pdev->dev; + struct device *dev = vg->dev; int ret; ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc_data->npins); @@ -1511,6 +1509,7 @@ static int byt_gpio_add_pin_ranges(struct gpio_chip *chip) static int byt_gpio_probe(struct byt_gpio *vg) { + struct platform_device *pdev = to_platform_device(vg->dev); struct gpio_chip *gc; struct resource *irq_rc; int ret; @@ -1518,22 +1517,22 @@ static int byt_gpio_probe(struct byt_gpio *vg) /* Set up gpio chip */ vg->chip = byt_gpio_chip; gc = &vg->chip; - gc->label = dev_name(&vg->pdev->dev); + gc->label = dev_name(vg->dev); gc->base = -1; gc->can_sleep = false; gc->add_pin_ranges = byt_gpio_add_pin_ranges; - gc->parent = &vg->pdev->dev; + gc->parent = vg->dev; gc->ngpio = vg->soc_data->npins; #ifdef CONFIG_PM_SLEEP - vg->saved_context = devm_kcalloc(&vg->pdev->dev, gc->ngpio, + vg->saved_context = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->saved_context), GFP_KERNEL); if (!vg->saved_context) return -ENOMEM; #endif /* set up interrupts */ - irq_rc = platform_get_resource(vg->pdev, IORESOURCE_IRQ, 0); + irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (irq_rc && irq_rc->start) { struct gpio_irq_chip *girq; @@ -1550,7 +1549,7 @@ static int byt_gpio_probe(struct byt_gpio *vg) girq->init_valid_mask = byt_init_irq_valid_mask; girq->parent_handler = byt_gpio_irq_handler; girq->num_parents = 1; - girq->parents = devm_kcalloc(&vg->pdev->dev, girq->num_parents, + girq->parents = devm_kcalloc(vg->dev, girq->num_parents, sizeof(*girq->parents), GFP_KERNEL); if (!girq->parents) return -ENOMEM; @@ -1559,9 +1558,9 @@ static int byt_gpio_probe(struct byt_gpio *vg) girq->handler = handle_bad_irq; } - ret = devm_gpiochip_add_data(&vg->pdev->dev, gc, vg); + ret = devm_gpiochip_add_data(vg->dev, gc, vg); if (ret) { - dev_err(&vg->pdev->dev, "failed adding byt-gpio chip\n"); + dev_err(vg->dev, "failed adding byt-gpio chip\n"); return ret; } @@ -1571,10 +1570,11 @@ static int byt_gpio_probe(struct byt_gpio *vg) static int byt_set_soc_data(struct byt_gpio *vg, const struct intel_pinctrl_soc_data *soc_data) { + struct platform_device *pdev = to_platform_device(vg->dev); int i; vg->soc_data = soc_data; - vg->communities_copy = devm_kcalloc(&vg->pdev->dev, + vg->communities_copy = devm_kcalloc(vg->dev, soc_data->ncommunities, sizeof(*vg->communities_copy), GFP_KERNEL); @@ -1586,7 +1586,7 @@ static int byt_set_soc_data(struct byt_gpio *vg, *comm = vg->soc_data->communities[i]; - comm->pad_regs = devm_platform_ioremap_resource(vg->pdev, 0); + comm->pad_regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(comm->pad_regs)) return PTR_ERR(comm->pad_regs); } @@ -1628,7 +1628,7 @@ static int byt_pinctrl_probe(struct platform_device *pdev) if (!vg) return -ENOMEM; - vg->pdev = pdev; + vg->dev = &pdev->dev; ret = byt_set_soc_data(vg, soc_data); if (ret) { dev_err(&pdev->dev, "failed to set soc data\n"); @@ -1672,7 +1672,7 @@ static int byt_gpio_suspend(struct device *dev) reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve conf0 register\n", i); continue; @@ -1704,7 +1704,7 @@ static int byt_gpio_resume(struct device *dev) reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve conf0 register\n", i); continue; From patchwork Thu Dec 12 10:25:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1208374 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47YVM86wFMz9sPh for ; Thu, 12 Dec 2019 21:26:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728492AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 Received: from mga09.intel.com ([134.134.136.24]:57202 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728521AbfLLK0J (ORCPT ); Thu, 12 Dec 2019 05:26:09 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 02:26:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,305,1571727600"; d="scan'208";a="363927445" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 12 Dec 2019 02:26:06 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6619324C; Thu, 12 Dec 2019 12:26:05 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org, Mika Westerberg , hdegoede@redhat.com Cc: Andy Shevchenko Subject: [PATCH v1 4/5] pinctrl: baytrail: Use local variable to keep device pointer Date: Thu, 12 Dec 2019 12:25:56 +0200 Message-Id: <20191212102557.87754-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> References: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Use local variable to keep device pointer in order to increase readability of the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-baytrail.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index bd33b39082d9..ca5e394fca4e 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -1604,15 +1604,16 @@ static int byt_pinctrl_probe(struct platform_device *pdev) { const struct intel_pinctrl_soc_data *soc_data = NULL; const struct intel_pinctrl_soc_data **soc_table; + struct device *dev = &pdev->dev; struct acpi_device *acpi_dev; struct byt_gpio *vg; int i, ret; - acpi_dev = ACPI_COMPANION(&pdev->dev); + acpi_dev = ACPI_COMPANION(dev); if (!acpi_dev) return -ENODEV; - soc_table = (const struct intel_pinctrl_soc_data **)device_get_match_data(&pdev->dev); + soc_table = (const struct intel_pinctrl_soc_data **)device_get_match_data(dev); for (i = 0; soc_table[i]; i++) { if (!strcmp(acpi_dev->pnp.unique_id, soc_table[i]->uid)) { @@ -1624,25 +1625,25 @@ static int byt_pinctrl_probe(struct platform_device *pdev) if (!soc_data) return -ENODEV; - vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL); + vg = devm_kzalloc(dev, sizeof(*vg), GFP_KERNEL); if (!vg) return -ENOMEM; - vg->dev = &pdev->dev; + vg->dev = dev; ret = byt_set_soc_data(vg, soc_data); if (ret) { - dev_err(&pdev->dev, "failed to set soc data\n"); + dev_err(dev, "failed to set soc data\n"); return ret; } vg->pctl_desc = byt_pinctrl_desc; - vg->pctl_desc.name = dev_name(&pdev->dev); + vg->pctl_desc.name = dev_name(dev); vg->pctl_desc.pins = vg->soc_data->pins; vg->pctl_desc.npins = vg->soc_data->npins; - vg->pctl_dev = devm_pinctrl_register(&pdev->dev, &vg->pctl_desc, vg); + vg->pctl_dev = devm_pinctrl_register(dev, &vg->pctl_desc, vg); if (IS_ERR(vg->pctl_dev)) { - dev_err(&pdev->dev, "failed to register pinctrl driver\n"); + dev_err(dev, "failed to register pinctrl driver\n"); return PTR_ERR(vg->pctl_dev); } @@ -1651,7 +1652,7 @@ static int byt_pinctrl_probe(struct platform_device *pdev) return ret; platform_set_drvdata(pdev, vg); - pm_runtime_enable(&pdev->dev); + pm_runtime_enable(dev); return 0; } From patchwork Thu Dec 12 10:25:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1208377 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47YVMB2X5Fz9sPf for ; Thu, 12 Dec 2019 21:26:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728512AbfLLK0L (ORCPT ); Thu, 12 Dec 2019 05:26:11 -0500 Received: from mga04.intel.com ([192.55.52.120]:37532 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728410AbfLLK0L (ORCPT ); Thu, 12 Dec 2019 05:26:11 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 02:26:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,305,1571727600"; d="scan'208";a="388258197" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 12 Dec 2019 02:26:08 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 7126A2E6; Thu, 12 Dec 2019 12:26:05 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org, Mika Westerberg , hdegoede@redhat.com Cc: Andy Shevchenko Subject: [PATCH v1 5/5] pinctrl: baytrail: Reuse struct intel_pinctrl in the driver Date: Thu, 12 Dec 2019 12:25:57 +0200 Message-Id: <20191212102557.87754-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> References: <20191212102557.87754-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We may use now available struct intel_pinctrl in the driver. No functional change implied. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-baytrail.c | 186 +++++++++++------------ 1 file changed, 87 insertions(+), 99 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index ca5e394fca4e..c6f53ed626c9 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -93,7 +93,7 @@ #define BYT_DEFAULT_GPIO_MUX 0 #define BYT_ALTER_GPIO_MUX 1 -struct byt_gpio_pin_context { +struct intel_pad_context { u32 conf0; u32 val; }; @@ -105,17 +105,6 @@ struct byt_gpio_pin_context { .pad_map = (map),\ } -struct byt_gpio { - struct device *dev; - struct gpio_chip chip; - struct irq_chip irqchip; - struct pinctrl_dev *pctl_dev; - struct pinctrl_desc pctl_desc; - const struct intel_pinctrl_soc_data *soc_data; - struct intel_community *communities_copy; - struct byt_gpio_pin_context *saved_context; -}; - /* SCORE pins, aka GPIOC_ or GPIO_S0_SC[] */ static const struct pinctrl_pin_desc byt_score_pins[] = { PINCTRL_PIN(0, "SATA_GP0"), @@ -551,14 +540,14 @@ static const struct intel_pinctrl_soc_data *byt_soc_data[] = { static DEFINE_RAW_SPINLOCK(byt_lock); -static struct intel_community *byt_get_community(struct byt_gpio *vg, +static struct intel_community *byt_get_community(struct intel_pinctrl *vg, unsigned int pin) { struct intel_community *comm; int i; - for (i = 0; i < vg->soc_data->ncommunities; i++) { - comm = vg->communities_copy + i; + for (i = 0; i < vg->ncommunities; i++) { + comm = vg->communities + i; if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base) return comm; } @@ -566,7 +555,7 @@ static struct intel_community *byt_get_community(struct byt_gpio *vg, return NULL; } -static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset, +static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset, int reg) { struct intel_community *comm = byt_get_community(vg, offset); @@ -593,17 +582,17 @@ static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset, static int byt_get_groups_count(struct pinctrl_dev *pctldev) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->ngroups; + return vg->soc->ngroups; } static const char *byt_get_group_name(struct pinctrl_dev *pctldev, unsigned int selector) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->groups[selector].name; + return vg->soc->groups[selector].name; } static int byt_get_group_pins(struct pinctrl_dev *pctldev, @@ -611,10 +600,10 @@ static int byt_get_group_pins(struct pinctrl_dev *pctldev, const unsigned int **pins, unsigned int *num_pins) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - *pins = vg->soc_data->groups[selector].pins; - *num_pins = vg->soc_data->groups[selector].npins; + *pins = vg->soc->groups[selector].pins; + *num_pins = vg->soc->groups[selector].npins; return 0; } @@ -627,17 +616,17 @@ static const struct pinctrl_ops byt_pinctrl_ops = { static int byt_get_functions_count(struct pinctrl_dev *pctldev) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->nfunctions; + return vg->soc->nfunctions; } static const char *byt_get_function_name(struct pinctrl_dev *pctldev, unsigned int selector) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->functions[selector].name; + return vg->soc->functions[selector].name; } static int byt_get_function_groups(struct pinctrl_dev *pctldev, @@ -645,15 +634,15 @@ static int byt_get_function_groups(struct pinctrl_dev *pctldev, const char * const **groups, unsigned int *num_groups) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - *groups = vg->soc_data->functions[selector].groups; - *num_groups = vg->soc_data->functions[selector].ngroups; + *groups = vg->soc->functions[selector].groups; + *num_groups = vg->soc->functions[selector].ngroups; return 0; } -static void byt_set_group_simple_mux(struct byt_gpio *vg, +static void byt_set_group_simple_mux(struct intel_pinctrl *vg, const struct intel_pingroup group, unsigned int func) { @@ -683,7 +672,7 @@ static void byt_set_group_simple_mux(struct byt_gpio *vg, raw_spin_unlock_irqrestore(&byt_lock, flags); } -static void byt_set_group_mixed_mux(struct byt_gpio *vg, +static void byt_set_group_mixed_mux(struct intel_pinctrl *vg, const struct intel_pingroup group, const unsigned int *func) { @@ -716,9 +705,9 @@ static void byt_set_group_mixed_mux(struct byt_gpio *vg, static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, unsigned int group_selector) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); - const struct intel_function func = vg->soc_data->functions[func_selector]; - const struct intel_pingroup group = vg->soc_data->groups[group_selector]; + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); + const struct intel_function func = vg->soc->functions[func_selector]; + const struct intel_pingroup group = vg->soc->groups[group_selector]; if (group.modes) byt_set_group_mixed_mux(vg, group, group.modes); @@ -730,22 +719,22 @@ static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, return 0; } -static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned int offset) +static u32 byt_get_gpio_mux(struct intel_pinctrl *vg, unsigned int offset) { /* SCORE pin 92-93 */ - if (!strcmp(vg->soc_data->uid, BYT_SCORE_ACPI_UID) && + if (!strcmp(vg->soc->uid, BYT_SCORE_ACPI_UID) && offset >= 92 && offset <= 93) return BYT_ALTER_GPIO_MUX; /* SUS pin 11-21 */ - if (!strcmp(vg->soc_data->uid, BYT_SUS_ACPI_UID) && + if (!strcmp(vg->soc->uid, BYT_SUS_ACPI_UID) && offset >= 11 && offset <= 21) return BYT_ALTER_GPIO_MUX; return BYT_DEFAULT_GPIO_MUX; } -static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned int offset) +static void byt_gpio_clear_triggering(struct intel_pinctrl *vg, unsigned int offset) { void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); unsigned long flags; @@ -762,7 +751,7 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); u32 value, gpio_mux; unsigned long flags; @@ -799,7 +788,7 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); byt_gpio_clear_triggering(vg, offset); pm_runtime_put(vg->dev); @@ -810,7 +799,7 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, unsigned int offset, bool input) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); unsigned long flags; @@ -893,7 +882,7 @@ static int byt_set_pull_strength(u32 *reg, u16 strength) static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset, unsigned long *config) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); enum pin_config_param param = pinconf_to_config_param(*config); void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); @@ -978,7 +967,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, unsigned long *configs, unsigned int num_configs) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); unsigned int param, arg; void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); @@ -1115,7 +1104,7 @@ static const struct pinctrl_desc byt_pinctrl_desc = { static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); unsigned long flags; u32 val; @@ -1129,7 +1118,7 @@ static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset) static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); unsigned long flags; u32 old_val; @@ -1148,7 +1137,7 @@ static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); unsigned long flags; u32 value; @@ -1188,11 +1177,11 @@ static int byt_gpio_direction_output(struct gpio_chip *chip, static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); int i; u32 conf0, val; - for (i = 0; i < vg->soc_data->npins; i++) { + for (i = 0; i < vg->soc->npins; i++) { const struct intel_community *comm; const char *pull_str = NULL; const char *pull = NULL; @@ -1202,7 +1191,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) unsigned int pin; raw_spin_lock_irqsave(&byt_lock, flags); - pin = vg->soc_data->pins[i].number; + pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { seq_printf(s, @@ -1297,7 +1286,7 @@ static const struct gpio_chip byt_gpio_chip = { static void byt_irq_ack(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct byt_gpio *vg = gpiochip_get_data(gc); + struct intel_pinctrl *vg = gpiochip_get_data(gc); unsigned int offset = irqd_to_hwirq(d); void __iomem *reg; @@ -1313,7 +1302,7 @@ static void byt_irq_ack(struct irq_data *d) static void byt_irq_mask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct byt_gpio *vg = gpiochip_get_data(gc); + struct intel_pinctrl *vg = gpiochip_get_data(gc); byt_gpio_clear_triggering(vg, irqd_to_hwirq(d)); } @@ -1321,7 +1310,7 @@ static void byt_irq_mask(struct irq_data *d) static void byt_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct byt_gpio *vg = gpiochip_get_data(gc); + struct intel_pinctrl *vg = gpiochip_get_data(gc); unsigned int offset = irqd_to_hwirq(d); unsigned long flags; void __iomem *reg; @@ -1359,7 +1348,7 @@ static void byt_irq_unmask(struct irq_data *d) static int byt_irq_type(struct irq_data *d, unsigned int type) { - struct byt_gpio *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d)); + struct intel_pinctrl *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d)); u32 offset = irqd_to_hwirq(d); u32 value; unsigned long flags; @@ -1398,8 +1387,7 @@ static int byt_irq_type(struct irq_data *d, unsigned int type) static void byt_gpio_irq_handler(struct irq_desc *desc) { struct irq_data *data = irq_desc_get_irq_data(desc); - struct byt_gpio *vg = gpiochip_get_data( - irq_desc_get_handler_data(desc)); + struct intel_pinctrl *vg = gpiochip_get_data(irq_desc_get_handler_data(desc)); struct irq_chip *chip = irq_data_get_irq_chip(data); u32 base, pin; void __iomem *reg; @@ -1432,7 +1420,7 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, unsigned int ngpios) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg; u32 value; int i; @@ -1442,8 +1430,8 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, * do not use direct IRQ mode. This will prevent spurious * interrupts from misconfigured pins. */ - for (i = 0; i < vg->soc_data->npins; i++) { - unsigned int pin = vg->soc_data->pins[i].number; + for (i = 0; i < vg->soc->npins; i++) { + unsigned int pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { @@ -1466,12 +1454,12 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, static int byt_gpio_irq_init_hw(struct gpio_chip *chip) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg; u32 base, value; /* clear interrupt status trigger registers */ - for (base = 0; base < vg->soc_data->npins; base += 32) { + for (base = 0; base < vg->soc->npins; base += 32) { reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG); if (!reg) { @@ -1496,18 +1484,18 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) static int byt_gpio_add_pin_ranges(struct gpio_chip *chip) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); struct device *dev = vg->dev; int ret; - ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc_data->npins); + ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc->npins); if (ret) dev_err(dev, "failed to add GPIO pin range\n"); return ret; } -static int byt_gpio_probe(struct byt_gpio *vg) +static int byt_gpio_probe(struct intel_pinctrl *vg) { struct platform_device *pdev = to_platform_device(vg->dev); struct gpio_chip *gc; @@ -1522,12 +1510,12 @@ static int byt_gpio_probe(struct byt_gpio *vg) gc->can_sleep = false; gc->add_pin_ranges = byt_gpio_add_pin_ranges; gc->parent = vg->dev; - gc->ngpio = vg->soc_data->npins; + gc->ngpio = vg->soc->npins; #ifdef CONFIG_PM_SLEEP - vg->saved_context = devm_kcalloc(vg->dev, gc->ngpio, - sizeof(*vg->saved_context), GFP_KERNEL); - if (!vg->saved_context) + vg->context.pads = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->context.pads), + GFP_KERNEL); + if (!vg->context.pads) return -ENOMEM; #endif @@ -1567,24 +1555,24 @@ static int byt_gpio_probe(struct byt_gpio *vg) return ret; } -static int byt_set_soc_data(struct byt_gpio *vg, - const struct intel_pinctrl_soc_data *soc_data) +static int byt_set_soc_data(struct intel_pinctrl *vg, + const struct intel_pinctrl_soc_data *soc) { struct platform_device *pdev = to_platform_device(vg->dev); int i; - vg->soc_data = soc_data; - vg->communities_copy = devm_kcalloc(vg->dev, - soc_data->ncommunities, - sizeof(*vg->communities_copy), - GFP_KERNEL); - if (!vg->communities_copy) + vg->soc = soc; + + vg->ncommunities = vg->soc->ncommunities; + vg->communities = devm_kcalloc(vg->dev, vg->ncommunities, + sizeof(*vg->communities), GFP_KERNEL); + if (!vg->communities) return -ENOMEM; - for (i = 0; i < soc_data->ncommunities; i++) { - struct intel_community *comm = vg->communities_copy + i; + for (i = 0; i < vg->soc->ncommunities; i++) { + struct intel_community *comm = vg->communities + i; - *comm = vg->soc_data->communities[i]; + *comm = vg->soc->communities[i]; comm->pad_regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(comm->pad_regs)) @@ -1606,7 +1594,7 @@ static int byt_pinctrl_probe(struct platform_device *pdev) const struct intel_pinctrl_soc_data **soc_table; struct device *dev = &pdev->dev; struct acpi_device *acpi_dev; - struct byt_gpio *vg; + struct intel_pinctrl *vg; int i, ret; acpi_dev = ACPI_COMPANION(dev); @@ -1636,15 +1624,15 @@ static int byt_pinctrl_probe(struct platform_device *pdev) return ret; } - vg->pctl_desc = byt_pinctrl_desc; - vg->pctl_desc.name = dev_name(dev); - vg->pctl_desc.pins = vg->soc_data->pins; - vg->pctl_desc.npins = vg->soc_data->npins; + vg->pctldesc = byt_pinctrl_desc; + vg->pctldesc.name = dev_name(dev); + vg->pctldesc.pins = vg->soc->pins; + vg->pctldesc.npins = vg->soc->npins; - vg->pctl_dev = devm_pinctrl_register(dev, &vg->pctl_desc, vg); - if (IS_ERR(vg->pctl_dev)) { + vg->pctldev = devm_pinctrl_register(dev, &vg->pctldesc, vg); + if (IS_ERR(vg->pctldev)) { dev_err(dev, "failed to register pinctrl driver\n"); - return PTR_ERR(vg->pctl_dev); + return PTR_ERR(vg->pctldev); } ret = byt_gpio_probe(vg); @@ -1660,16 +1648,16 @@ static int byt_pinctrl_probe(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int byt_gpio_suspend(struct device *dev) { - struct byt_gpio *vg = dev_get_drvdata(dev); + struct intel_pinctrl *vg = dev_get_drvdata(dev); unsigned long flags; int i; raw_spin_lock_irqsave(&byt_lock, flags); - for (i = 0; i < vg->soc_data->npins; i++) { + for (i = 0; i < vg->soc->npins; i++) { void __iomem *reg; u32 value; - unsigned int pin = vg->soc_data->pins[i].number; + unsigned int pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { @@ -1679,11 +1667,11 @@ static int byt_gpio_suspend(struct device *dev) continue; } value = readl(reg) & BYT_CONF0_RESTORE_MASK; - vg->saved_context[i].conf0 = value; + vg->context.pads[i].conf0 = value; reg = byt_gpio_reg(vg, pin, BYT_VAL_REG); value = readl(reg) & BYT_VAL_RESTORE_MASK; - vg->saved_context[i].val = value; + vg->context.pads[i].val = value; } raw_spin_unlock_irqrestore(&byt_lock, flags); @@ -1692,16 +1680,16 @@ static int byt_gpio_suspend(struct device *dev) static int byt_gpio_resume(struct device *dev) { - struct byt_gpio *vg = dev_get_drvdata(dev); + struct intel_pinctrl *vg = dev_get_drvdata(dev); unsigned long flags; int i; raw_spin_lock_irqsave(&byt_lock, flags); - for (i = 0; i < vg->soc_data->npins; i++) { + for (i = 0; i < vg->soc->npins; i++) { void __iomem *reg; u32 value; - unsigned int pin = vg->soc_data->pins[i].number; + unsigned int pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { @@ -1712,9 +1700,9 @@ static int byt_gpio_resume(struct device *dev) } value = readl(reg); if ((value & BYT_CONF0_RESTORE_MASK) != - vg->saved_context[i].conf0) { + vg->context.pads[i].conf0) { value &= ~BYT_CONF0_RESTORE_MASK; - value |= vg->saved_context[i].conf0; + value |= vg->context.pads[i].conf0; writel(value, reg); dev_info(dev, "restored pin %d conf0 %#08x", i, value); } @@ -1722,11 +1710,11 @@ static int byt_gpio_resume(struct device *dev) reg = byt_gpio_reg(vg, pin, BYT_VAL_REG); value = readl(reg); if ((value & BYT_VAL_RESTORE_MASK) != - vg->saved_context[i].val) { + vg->context.pads[i].val) { u32 v; v = value & ~BYT_VAL_RESTORE_MASK; - v |= vg->saved_context[i].val; + v |= vg->context.pads[i].val; if (v != value) { writel(v, reg); dev_dbg(dev, "restored pin %d val %#08x\n",