From patchwork Tue Nov 19 08:42:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Wildt X-Patchwork-Id: 1197351 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=blueri.se Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47HMcP6qJ5z9sPn for ; Tue, 19 Nov 2019 21:33:41 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id A1F1BC21FA4; Tue, 19 Nov 2019 10:33:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6358AC21F02; Tue, 19 Nov 2019 08:43:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E85A5C21EA1; Tue, 19 Nov 2019 08:43:20 +0000 (UTC) Received: from pwildt.genua.de (pwildt.genua.de [80.154.94.49]) by lists.denx.de (Postfix) with ESMTPS id E60E6C21EE3 for ; Tue, 19 Nov 2019 08:42:08 +0000 (UTC) Received: from nox.fritz.box (p200300C1C723380048BD21D738D52463.dip0.t-ipconnect.de [2003:c1:c723:3800:48bd:21d7:38d5:2463]) by pwildt.genua.de (OpenSMTPD) with ESMTPSA id f28107a2 (TLSv1.2:ECDHE-RSA-CHACHA20-POLY1305:256:NO); Tue, 19 Nov 2019 09:42:08 +0100 (CET) Date: Tue, 19 Nov 2019 09:42:06 +0100 From: Patrick Wildt To: u-boot@lists.denx.de Message-ID: <20191119084206.GA17502@nox.fritz.box> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.12.2 (2019-09-21) Subject: [U-Boot] imx8m: fix rom version check to unbreak some B0 chips X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Recently the version check was improved to be able to determine that we're running on SoC revision 2.1. A check for B0 was tightened so that it now must equal 0x20 instead of being bigger than 0x20. On some B0 chips the value returned is 0x1020 instead of 0x20. This means even though it's B0, the check will fail and code relying on the correct chip revision will make wrong decisions. There is no documentation of those bits, but it seems that NXP always uses a byte to encode the revision. Thus remove the upper bits to fix the regression. Signed-off-by: Patrick Wildt diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 9a203e4736..4d42368057 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -216,6 +216,7 @@ u32 get_cpu_rev(void) readl((void __iomem *)ROM_VERSION_A0); if (rom_version != CHIP_REV_1_0) { rom_version = readl((void __iomem *)ROM_VERSION_B0); + rom_version &= 0xff; if (rom_version == CHIP_REV_2_0) reg = CHIP_REV_2_0; }