From patchwork Wed Oct 30 21:58:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1186993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jfYF08e0"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 473MmN6HHtz9sPT for ; Thu, 31 Oct 2019 08:59:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727232AbfJ3V7A (ORCPT ); Wed, 30 Oct 2019 17:59:00 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:45732 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726864AbfJ3V67 (ORCPT ); Wed, 30 Oct 2019 17:58:59 -0400 Received: by mail-lf1-f66.google.com with SMTP id v8so2789766lfa.12; Wed, 30 Oct 2019 14:58:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/D2IZ9aCfy9I24RPB3SSOachEcmLjtwKim1mzoRC2zU=; b=jfYF08e02pu9RPv9FZfl8uObu2QvjBi+U9XrFdOBHhqUO5LuWR216QtFJaC0Illx2b cUjtBPPl6GWu9SMypVcQLl3r558Q8fM1o4dimiEw2XpniFvKwC3GEhFHKPOallicSaNz WYtp7MOwDY6BeftraeMsvXDtosDcG93jg1KRczYbrow4pMdFy+0BCK/VwpzqGicA0DcQ URu2bdhBidphbb3MqD36bpyX/eQXc2f0Zq3fcMeBkD1EZwidOcEgC87cxHWhf5AUIPBZ JSGsNNv4WM7fLU09U9HU4z/QPHmFHBq271l35c6IXMLNo4tC7noN/DOBv8ICScxxE2gR fhpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/D2IZ9aCfy9I24RPB3SSOachEcmLjtwKim1mzoRC2zU=; b=e6isHwN9xL71BAqew81IoryCwdlYnWl4bqGCc2eFgCLG93aBf3Y3ud9NmTW2RdFYbb qB3ZOz+qkKv2M7tUQCYmjHdjx7St06va36VtCGJZBWwCikm2Jsbmg6GlbkGz53UBTQLz Xc8xu4rECBq5oizEdmSyz6lFKyRgXDT7/xa3E9b1JJ1VUxePk5hsEawuXP/r7z7ey4WB r2Dy0MYnAhMwuFd9z8fz3AiPzY42hNrEycwRCQAJPopDhq/q3P8wRQgfyGkAkZtCjcYM WTZ6MtpgC1/ub5Q/9Bm7gP7NMZ9/uaxGO4zTilBGnrsifxxuEHGMl8tJv9iWWpC8oSj+ c+tQ== X-Gm-Message-State: APjAAAUfrb1mQ3vycZroDfzsNGP5l8W1cI7hpjJLJYaNad5rTI7G94zV qCTLRitHsi50V3qYcwWK06U= X-Google-Smtp-Source: APXvYqyczW6OTna3YA3BhTHp8GcvXJ6hktP+iWoMc+jsZfsKO+XysuuVObH8VHpaGC7dtGRDZvavkg== X-Received: by 2002:a19:dc4c:: with SMTP id f12mr302650lfj.86.1572472737719; Wed, 30 Oct 2019 14:58:57 -0700 (PDT) Received: from localhost.localdomain (94-29-10-250.dynamic.spd-mgts.ru. [94.29.10.250]) by smtp.gmail.com with ESMTPSA id 9sm429988ljf.21.2019.10.30.14.58.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2019 14:58:57 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] clk: tegra20/30: Don't pre-initialize displays parent clock Date: Thu, 31 Oct 2019 00:58:26 +0300 Message-Id: <20191030215827.15533-1-digetx@gmail.com> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Both Tegra20 and Tegra30 are initializing display's parent clock incorrectly because PLLP is running at 216/408MHz while display rate is set to 600MHz, but pre-setting the parent isn't needed at all because display driver selects proper parent anyways. Signed-off-by: Dmitry Osipenko --- Changelog: v2: I accidentally didn't include the second "VDE" patch into the patchset in v1. drivers/clk/tegra/clk-tegra20.c | 2 -- drivers/clk/tegra/clk-tegra30.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index eb821666ca61..0d6441621989 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -1049,8 +1049,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA20_CLK_SBC3, TEGRA20_CLK_PLL_P, 100000000, 0 }, { TEGRA20_CLK_SBC4, TEGRA20_CLK_PLL_P, 100000000, 0 }, { TEGRA20_CLK_HOST1X, TEGRA20_CLK_PLL_C, 150000000, 0 }, - { TEGRA20_CLK_DISP1, TEGRA20_CLK_PLL_P, 600000000, 0 }, - { TEGRA20_CLK_DISP2, TEGRA20_CLK_PLL_P, 600000000, 0 }, { TEGRA20_CLK_GR2D, TEGRA20_CLK_PLL_C, 300000000, 0 }, { TEGRA20_CLK_GR3D, TEGRA20_CLK_PLL_C, 300000000, 0 }, { TEGRA20_CLK_VDE, TEGRA20_CLK_CLK_MAX, 300000000, 0 }, diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 0fe03d69fe1a..8146cc49ca3b 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1253,8 +1253,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA30_CLK_SBC6, TEGRA30_CLK_PLL_P, 100000000, 0 }, { TEGRA30_CLK_PLL_C, TEGRA30_CLK_CLK_MAX, 600000000, 0 }, { TEGRA30_CLK_HOST1X, TEGRA30_CLK_PLL_C, 150000000, 0 }, - { TEGRA30_CLK_DISP1, TEGRA30_CLK_PLL_P, 600000000, 0 }, - { TEGRA30_CLK_DISP2, TEGRA30_CLK_PLL_P, 600000000, 0 }, { TEGRA30_CLK_TWD, TEGRA30_CLK_CLK_MAX, 0, 1 }, { TEGRA30_CLK_GR2D, TEGRA30_CLK_PLL_C, 300000000, 0 }, { TEGRA30_CLK_GR3D, TEGRA30_CLK_PLL_C, 300000000, 0 }, From patchwork Wed Oct 30 21:58:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1186994 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="J/kASAQN"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 473MmV2KJhz9sPn for ; Thu, 31 Oct 2019 08:59:06 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727166AbfJ3V7B (ORCPT ); Wed, 30 Oct 2019 17:59:01 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:40179 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727127AbfJ3V7B (ORCPT ); Wed, 30 Oct 2019 17:59:01 -0400 Received: by mail-lj1-f195.google.com with SMTP id u22so4388351lji.7; Wed, 30 Oct 2019 14:58:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3PTvruMyJudl8KIl7cB1h1Hs9ux7BvolUSo2ebbahMc=; b=J/kASAQNnXbwLD/iXj8zuYKLlj+95pio3K1ygpMtBqiXjVyW1pjEmsqb0pBe+6z8or 23WZPac7j+FVjwj82qUV4YlgnPXmQzwcjtce4sGqHpWDI021jGHvYRFFWBr8+aBv7vaI /Cp/M9QpBwlNhIsDXEVKlOyv6nAugClAQ8TvjoJFnXGd4aj8NoWzrNznQ6w2qTt0aFBT mHpO6G6/3xVEFwaJ/7CUPd6F9JTcipXYdNho5Z+CNEGgmMLiXMaXPax5oAgsdHLdkNZM E78J8+HWybh+USRxKpPs5vLDYk6qYHk/t6QyNvFdUlia7SWhdcCi7SjSO9mHB0IgR32k tEAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3PTvruMyJudl8KIl7cB1h1Hs9ux7BvolUSo2ebbahMc=; b=jFsfNwYqttmcpIJHRr+yIxjna8lt7XJe7JlX/QF3gUXEb6YXrHHVOq0h/wGciy2K7e CYEoRPJfL3SZGUfpxyB9lM+XjtJ92121D+OhBJZuEeMSrobAllkr21IGDsUDNaDgF8jj IbPKXb8NBTvNoGUJE6YgToEfLnI4Yc3rdsEsjhtFiquNagl7DIaYNT/LpAnaGaEHTtiT KSc5tIJwsCbGLm1ehkD0SBJ6PPDJ3y4mgpYI7n29JfdsQtfgqCxT9N7ct9Lxxpa89W+l Knq8h14mBiCKY612K7S4MfWhJcmNnnpkmZysms5JafLEMwqmU4qp4D0fCf4+2MYppExU L0qg== X-Gm-Message-State: APjAAAVaSNligRA1ayg6cjlOyCzfvR+d0n5TVVZjheXmZhIcDtjXFzbD 6Gy/szTVmI+pU8ciwEXNL9M= X-Google-Smtp-Source: APXvYqyqTI9sAZowqVntg9lV7gOzQ/W2frzM85pFu9EjT/g3St3eAIDRSJrFSyusJ2E6OFXKSHXcFQ== X-Received: by 2002:a2e:6c0b:: with SMTP id h11mr1334976ljc.76.1572472738672; Wed, 30 Oct 2019 14:58:58 -0700 (PDT) Received: from localhost.localdomain (94-29-10-250.dynamic.spd-mgts.ru. [94.29.10.250]) by smtp.gmail.com with ESMTPSA id 9sm429988ljf.21.2019.10.30.14.58.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2019 14:58:58 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] clk: tegra20/30: Explicitly set parent clock for Video Decoder Date: Thu, 31 Oct 2019 00:58:27 +0300 Message-Id: <20191030215827.15533-2-digetx@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191030215827.15533-1-digetx@gmail.com> References: <20191030215827.15533-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The VDE parent won't be changed automatically to PLLC if bootloader didn't do that for us, hence let's explicitly set the parent for consistency. Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-tegra20.c | 2 +- drivers/clk/tegra/clk-tegra30.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 0d6441621989..abc6a2bc828a 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -1051,7 +1051,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA20_CLK_HOST1X, TEGRA20_CLK_PLL_C, 150000000, 0 }, { TEGRA20_CLK_GR2D, TEGRA20_CLK_PLL_C, 300000000, 0 }, { TEGRA20_CLK_GR3D, TEGRA20_CLK_PLL_C, 300000000, 0 }, - { TEGRA20_CLK_VDE, TEGRA20_CLK_CLK_MAX, 300000000, 0 }, + { TEGRA20_CLK_VDE, TEGRA20_CLK_PLL_C, 300000000, 0 }, /* must be the last entry */ { TEGRA20_CLK_CLK_MAX, TEGRA20_CLK_CLK_MAX, 0, 0 }, }; diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 8146cc49ca3b..43b94175ff33 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1258,7 +1258,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA30_CLK_GR3D, TEGRA30_CLK_PLL_C, 300000000, 0 }, { TEGRA30_CLK_GR3D2, TEGRA30_CLK_PLL_C, 300000000, 0 }, { TEGRA30_CLK_PLL_U, TEGRA30_CLK_CLK_MAX, 480000000, 0 }, - { TEGRA30_CLK_VDE, TEGRA30_CLK_CLK_MAX, 600000000, 0 }, + { TEGRA30_CLK_VDE, TEGRA30_CLK_PLL_C, 600000000, 0 }, { TEGRA30_CLK_SPDIF_IN_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, { TEGRA30_CLK_I2S0_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, { TEGRA30_CLK_I2S1_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 },