From patchwork Wed Oct 9 04:37:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 1173577 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46p1g11tJsz9sDQ for ; Wed, 9 Oct 2019 15:38:05 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E757DC21EA8; Wed, 9 Oct 2019 04:37:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9EF2AC21F3B; Wed, 9 Oct 2019 04:37:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2C462C21E89; Wed, 9 Oct 2019 04:37:39 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id 486B3C21EE3 for ; Wed, 9 Oct 2019 04:37:37 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 46p1fT0hkdz1rSBt; Wed, 9 Oct 2019 06:37:37 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 46p1fT0W4qz1qqkJ; Wed, 9 Oct 2019 06:37:37 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id sVAJyCbv69uo; Wed, 9 Oct 2019 06:37:36 +0200 (CEST) X-Auth-Info: r2ZGgoW2qQ1HKg7R4j0lHBkLsYbEOYr8fPmrcmz9lE0= Received: from mail-internal.denx.de (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Wed, 9 Oct 2019 06:37:36 +0200 (CEST) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail-internal.denx.de (Postfix) with ESMTP id AEFDB1807F9; Wed, 9 Oct 2019 06:37:25 +0200 (CEST) Received: by pollux.denx.de (Postfix, from userid 515) id AD4AD1A00A0; Wed, 9 Oct 2019 06:37:25 +0200 (CEST) From: Heiko Schocher To: U-Boot Mailing List Date: Wed, 9 Oct 2019 06:37:20 +0200 Message-Id: <20191009043722.3413717-2-hs@denx.de> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191009043722.3413717-1-hs@denx.de> References: <20191009043722.3413717-1-hs@denx.de> MIME-Version: 1.0 Cc: "Z.q. Hou" Subject: [U-Boot] [PATCH 1/3] pci: pcie_fsl: use pci_conv_size_to_32() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" simplify read/write functions and use pci_conv_size_to_32(). Signed-off-by: Heiko Schocher --- drivers/pci/pcie_fsl.c | 35 ++--------------------------------- 1 file changed, 2 insertions(+), 33 deletions(-) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index ab25aeee73..ada6e12e2f 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -58,21 +58,8 @@ static int fsl_pcie_read_config(struct udevice *bus, pci_dev_t bdf, bdf = bdf - PCI_BDF(bus->seq, 0, 0); val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; out_be32(®s->cfg_addr, val); - sync(); - - switch (size) { - case PCI_SIZE_8: - *valuep = in_8((u8 *)®s->cfg_data + (offset & 3)); - break; - case PCI_SIZE_16: - *valuep = in_le16((u16 *)((u8 *)®s->cfg_data + - (offset & 2))); - break; - case PCI_SIZE_32: - *valuep = in_le32(®s->cfg_data); - break; - } + *valuep = pci_conv_32_to_size(in_le32(®s->cfg_data), offset, size); return 0; } @@ -84,9 +71,6 @@ static int fsl_pcie_write_config(struct udevice *bus, pci_dev_t bdf, struct fsl_pcie *pcie = dev_get_priv(bus); ccsr_fsl_pci_t *regs = pcie->regs; u32 val; - u8 val_8; - u16 val_16; - u32 val_32; if (fsl_pcie_addr_valid(pcie, bdf)) return 0; @@ -94,23 +78,8 @@ static int fsl_pcie_write_config(struct udevice *bus, pci_dev_t bdf, bdf = bdf - PCI_BDF(bus->seq, 0, 0); val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; out_be32(®s->cfg_addr, val); - sync(); - - switch (size) { - case PCI_SIZE_8: - val_8 = value; - out_8((u8 *)®s->cfg_data + (offset & 3), val_8); - break; - case PCI_SIZE_16: - val_16 = value; - out_le16((u16 *)((u8 *)®s->cfg_data + (offset & 2)), val_16); - break; - case PCI_SIZE_32: - val_32 = value; - out_le32(®s->cfg_data, val_32); - break; - } + out_le32(®s->cfg_data, pci_conv_size_to_32(0, value, offset, size)); return 0; } From patchwork Wed Oct 9 04:37:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 1173578 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 9 Oct 2019 06:37:29 +0200 (CEST) Received: by pollux.denx.de (Postfix, from userid 515) id 1B46F1A00A0; Wed, 9 Oct 2019 06:37:29 +0200 (CEST) From: Heiko Schocher To: U-Boot Mailing List Date: Wed, 9 Oct 2019 06:37:21 +0200 Message-Id: <20191009043722.3413717-3-hs@denx.de> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191009043722.3413717-1-hs@denx.de> References: <20191009043722.3413717-1-hs@denx.de> MIME-Version: 1.0 Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 2/3] pci: pcie_fsl: reorder addr check function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" reorder checks in fsl_pcie_addr_valid(). Check first stuff, we also can check when we use driver for PCI devices. Signed-off-by: Heiko Schocher --- drivers/pci/pcie_fsl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index ada6e12e2f..05b2522dac 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -30,13 +30,13 @@ static int fsl_pcie_addr_valid(struct fsl_pcie *pcie, pci_dev_t bdf) if (PCI_BUS(bdf) < bus->seq) return -EINVAL; - if (PCI_BUS(bdf) > bus->seq && (!fsl_pcie_link_up(pcie) || pcie->mode)) + if (PCI_BUS(bdf) == (bus->seq + 1) && (PCI_DEV(bdf) > 0)) return -EINVAL; - if (PCI_BUS(bdf) == bus->seq && (PCI_DEV(bdf) > 0 || PCI_FUNC(bdf) > 0)) + if (PCI_BUS(bdf) > bus->seq && (!fsl_pcie_link_up(pcie) || pcie->mode)) return -EINVAL; - if (PCI_BUS(bdf) == (bus->seq + 1) && (PCI_DEV(bdf) > 0)) + if (PCI_BUS(bdf) == bus->seq && (PCI_DEV(bdf) > 0 || PCI_FUNC(bdf) > 0)) return -EINVAL; return 0; From patchwork Wed Oct 9 04:37:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 1173579 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 9 Oct 2019 06:37:30 +0200 (CEST) Received: by pollux.denx.de (Postfix, from userid 515) id 3F7051A00A0; Wed, 9 Oct 2019 06:37:30 +0200 (CEST) From: Heiko Schocher To: U-Boot Mailing List Date: Wed, 9 Oct 2019 06:37:22 +0200 Message-Id: <20191009043722.3413717-4-hs@denx.de> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191009043722.3413717-1-hs@denx.de> References: <20191009043722.3413717-1-hs@denx.de> MIME-Version: 1.0 Cc: Hou Zhiqiang Subject: [U-Boot] [PATCH 3/3] pci: pcie_fsl: add support for "fsl, mpc8540-pci" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" add support for "fsl,mpc8540-pci": - add flag "ispci" in struct fsl_pcie_data so we can code out differences to existing devices without breaking them - changes if ispci is set: - in fsl_pcie_addr_valid() check only common checks - fsl_pcie_link_up( returns always 1 - in inbound setup, add flag PIWAR_MEM_2G - set pcie->enabled always to 1 Signed-off-by: Heiko Schocher --- drivers/pci/pcie_fsl.c | 27 ++++++++++++++++++++++++++- drivers/pci/pcie_fsl.h | 1 + 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 05b2522dac..3c207e761e 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -23,6 +23,7 @@ static int fsl_pcie_link_up(struct fsl_pcie *pcie); static int fsl_pcie_addr_valid(struct fsl_pcie *pcie, pci_dev_t bdf) { struct udevice *bus = pcie->bus; + struct fsl_pcie_data *info = pcie->info; if (!pcie->enabled) return -ENXIO; @@ -33,6 +34,9 @@ static int fsl_pcie_addr_valid(struct fsl_pcie *pcie, pci_dev_t bdf) if (PCI_BUS(bdf) == (bus->seq + 1) && (PCI_DEV(bdf) > 0)) return -EINVAL; + if (info->ispci) + return 0; + if (PCI_BUS(bdf) > bus->seq && (!fsl_pcie_link_up(pcie) || pcie->mode)) return -EINVAL; @@ -161,9 +165,13 @@ static int fsl_pcie_hose_write_config_dword(struct fsl_pcie *pcie, uint offset, static int fsl_pcie_link_up(struct fsl_pcie *pcie) { + struct fsl_pcie_data *info = pcie->info; ccsr_fsl_pci_t *regs = pcie->regs; u16 ltssm; + if (info->ispci) + return 1; + if (pcie->block_rev >= PEX_IP_BLK_REV_3_0) { ltssm = (in_be32(®s->pex_csr0) & PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT; @@ -251,6 +259,7 @@ static int fsl_pcie_setup_inbound_win(struct fsl_pcie *pcie, int idx, bool pf, u64 phys, u64 bus_addr, pci_size_t size) { + struct fsl_pcie_data *info = pcie->info; ccsr_fsl_pci_t *regs = pcie->regs; pit_t *pi = ®s->pit[idx]; u32 sz = (__ilog2_u64(size) - 1); @@ -275,6 +284,10 @@ static int fsl_pcie_setup_inbound_win(struct fsl_pcie *pcie, int idx, flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; if (pf) flag |= PIWAR_PF; + + if (info->ispci) + flag |= PIWAR_MEM_2G; + out_be32(&pi->piwar, flag | sz); return 0; @@ -508,6 +521,7 @@ static int fsl_pcie_init_ep(struct fsl_pcie *pcie) static int fsl_pcie_probe(struct udevice *dev) { struct fsl_pcie *pcie = dev_get_priv(dev); + struct fsl_pcie_data *info = pcie->info; ccsr_fsl_pci_t *regs = pcie->regs; u16 val_16; @@ -515,7 +529,10 @@ static int fsl_pcie_probe(struct udevice *dev) pcie->block_rev = in_be32(®s->block_rev1); list_add(&pcie->list, &fsl_pcie_list); - pcie->enabled = is_serdes_configured(PCIE1 + pcie->idx); + if (info->ispci) + pcie->enabled = 1; + else + pcie->enabled = is_serdes_configured(PCIE1 + pcie->idx); if (!pcie->enabled) { printf("PCIe%d: %s disabled\n", pcie->idx, dev->name); return 0; @@ -579,6 +596,13 @@ static const struct dm_pci_ops fsl_pcie_ops = { .write_config = fsl_pcie_write_config, }; +static struct fsl_pcie_data mpc85xx_data = { + .block_offset = 0x8000, + .block_offset_mask = 0xffff, + .stride = 0x1000, + .ispci = 1, +}; + static struct fsl_pcie_data p1_p2_data = { .block_offset = 0xa000, .block_offset_mask = 0xffff, @@ -598,6 +622,7 @@ static struct fsl_pcie_data t2080_data = { }; static const struct udevice_id fsl_pcie_ids[] = { + { .compatible = "fsl,mpc8540-pci", .data = (ulong)&mpc85xx_data }, { .compatible = "fsl,pcie-mpc8548", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-p1_p2", .data = (ulong)&p1_p2_data }, { .compatible = "fsl,pcie-p2041", .data = (ulong)&p2041_data }, diff --git a/drivers/pci/pcie_fsl.h b/drivers/pci/pcie_fsl.h index dc8368d559..ef1b1ac8d4 100644 --- a/drivers/pci/pcie_fsl.h +++ b/drivers/pci/pcie_fsl.h @@ -47,6 +47,7 @@ struct fsl_pcie_data { u32 block_offset; /* Offset from CCSR of 1st controller */ u32 block_offset_mask; /* Mask out the CCSR base */ u32 stride; /* Offset stride between controllers */ + int ispci; /* if PCI only */ }; struct fsl_pcie {