From patchwork Fri Oct 4 13:32:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1171850 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="K86FwHST"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46l9mg6TWwz9sR5 for ; Fri, 4 Oct 2019 23:33:07 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388575AbfJDNdD (ORCPT ); Fri, 4 Oct 2019 09:33:03 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:35838 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388554AbfJDNdD (ORCPT ); Fri, 4 Oct 2019 09:33:03 -0400 Received: by mail-lf1-f66.google.com with SMTP id w6so4510235lfl.2 for ; Fri, 04 Oct 2019 06:32:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=84d/4Z+Ct38UY+63PRtlhnBYnsxa6bKE+yT9EoLxBQ8=; b=K86FwHSTa8imnI9kd9BEczCcJ4FljqrcPnSq74CItPMRqe8R6vfy70DGfXffz1/7UZ TODX6szyElyk+mI/cd/cryh1cWqSMz12FRwMKfpiXnWC0M4ETDbYLC7NyJj+MiXKKcls niGe1in8ylcyKNdPXYsk+8eMs1lSfo8FUHpbQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=84d/4Z+Ct38UY+63PRtlhnBYnsxa6bKE+yT9EoLxBQ8=; b=tT7w0ta0AvTYfJdpBNKdjxgqgswGTtaOVrGOikd2K4Gl/fJA8QAu1RRp4HCoVw0XcX 6A7LK4k8rhY7NrK8/QPy2rxGZ9Y1Yf34GJ12Bs1H7BSUlpXHtCAlg+06yjncHS9J+0YU 2jPYHL6coGuW7nDVm7wl5ZzSnFG4QGKZHtZUawNfkDDUqH+5aH+0WMs7rc24N4vEXHjc EDHsFP8WlhvzjCUZ1ivORXaR1d8NGQ72NQhXnPjLkcPm6l+R+HYIjgZeXUKg3EB7EVUy JNkvr43m6gsdvTlPfg2joUjbsItdsGxZktXrAuyrbIRvcdqorMo6uvomLoX/fWqBX5L7 8TeA== X-Gm-Message-State: APjAAAWdo4Fx94M1zKXEBzBzq3D2q0+YVAPAof69OBE9m1/4qmt17LtZ rFKeGw1VuGd86ic1YARYMReXtUAwgw8FPX6R X-Google-Smtp-Source: APXvYqzs5zFXhqdDNu2+43b758ZHk0CgecW26AuZBrDWWj+4OulMZAKBuWb/lzr0T//DOGSJ1OjAdA== X-Received: by 2002:a19:3805:: with SMTP id f5mr6004869lfa.173.1570195979142; Fri, 04 Oct 2019 06:32:59 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id y26sm1534991ljj.90.2019.10.04.06.32.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 06:32:58 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?b?w7ZuaWc=?= , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/6] pwm: mxs: implement ->apply Date: Fri, 4 Oct 2019 15:32:02 +0200 Message-Id: <20191004133207.6663-2-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191004133207.6663-1-linux@rasmusvillemoes.dk> References: <20191004133207.6663-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org In preparation for supporting setting the polarity, switch the driver to support the ->apply method. Signed-off-by: Rasmus Villemoes Reviewed-by: Uwe Kleine-König --- drivers/pwm/pwm-mxs.c | 70 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index b14376b47ac8..10efd3de0bb3 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -26,6 +26,7 @@ #define PERIOD_PERIOD_MAX 0x10000 #define PERIOD_ACTIVE_HIGH (3 << 16) #define PERIOD_INACTIVE_LOW (2 << 18) +#define PERIOD_POLARITY_NORMAL (PERIOD_ACTIVE_HIGH | PERIOD_INACTIVE_LOW) #define PERIOD_CDIV(div) (((div) & 0x7) << 20) #define PERIOD_CDIV_MAX 8 @@ -41,6 +42,74 @@ struct mxs_pwm_chip { #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip) +static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); + int ret, div = 0; + unsigned int period_cycles, duty_cycles; + unsigned long rate; + unsigned long long c; + + if (state->polarity != PWM_POLARITY_NORMAL) + return -ENOTSUPP; + + /* + * If the PWM channel is disabled, make sure to turn on the + * clock before calling clk_get_rate() and writing to the + * registers. Otherwise, just keep it enabled. + */ + if (!pwm_is_enabled(pwm)) { + ret = clk_prepare_enable(mxs->clk); + if (ret) + return ret; + } + + if (!state->enabled && pwm_is_enabled(pwm)) + writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); + + rate = clk_get_rate(mxs->clk); + while (1) { + c = rate / cdiv[div]; + c = c * state->period; + do_div(c, 1000000000); + if (c < PERIOD_PERIOD_MAX) + break; + div++; + if (div >= PERIOD_CDIV_MAX) + return -EINVAL; + } + + period_cycles = c; + c *= state->duty_cycle; + do_div(c, state->period); + duty_cycles = c; + + /* + * The data sheet the says registers must be written to in + * this order (ACTIVEn, then PERIODn). Also, the new settings + * only take effect at the beginning of a new period, avoiding + * glitches. + */ + writel(duty_cycles << 16, + mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); + writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | PERIOD_CDIV(div), + mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); + + if (state->enabled) { + if (!pwm_is_enabled(pwm)) { + /* + * The clock was enabled above. Just enable + * the channel in the control register. + */ + writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); + } + } else { + clk_disable_unprepare(mxs->clk); + } + return 0; +} + static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { @@ -116,6 +185,7 @@ static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) } static const struct pwm_ops mxs_pwm_ops = { + .apply = mxs_pwm_apply, .config = mxs_pwm_config, .enable = mxs_pwm_enable, .disable = mxs_pwm_disable, From patchwork Fri Oct 4 13:32:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1171856 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="PbMZgn+B"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46l9n16clLz9sRV for ; Fri, 4 Oct 2019 23:33:25 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388545AbfJDNdD (ORCPT ); Fri, 4 Oct 2019 09:33:03 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:41575 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388555AbfJDNdC (ORCPT ); Fri, 4 Oct 2019 09:33:02 -0400 Received: by mail-lf1-f65.google.com with SMTP id r2so4489074lfn.8 for ; Fri, 04 Oct 2019 06:33:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1OQAE57/CgK569gxX6I56M38ksMNygkjEmF6P3qjzis=; b=PbMZgn+B0Hr1ICWKuBiRjOj8UTS2Y+vMUyvS6z4bjDoc+6BlUbcFkmaZ36miTfWRij CAZ+zhVUI7ZF8Bilvydqep8UJoFtdGbRhxshN+PZASkatEMrVKqHEPzoFvxC5+Eu7C8L gkcIP07xJoVkwqZ1+SrYYKVfmpaWoTn1ulcag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1OQAE57/CgK569gxX6I56M38ksMNygkjEmF6P3qjzis=; b=N05P4Gpso7PeGEjiD/RuLXbctCkmzzf0mcltXMnFfmzVLsirrS23PkTo+tcH7OLund Ia2N0THv773eVKzfbDXjma/9b5j6Ejw+SuAkj1BVQSJO/59UYl05HWt2o4Gg2JZzK3ho llDt/wRJcvwBKE/NNa7qbGwKfCjUE+WmXy4yyZlkfk4jY0okriUyfFB5hFj01G4K0R10 S1iEusUAegKt6itLMLfR4h2c7xA5YGEmzlLI4cq2hLChPEwqX/qmVblxlLtPe34+PEhF Ue/4YmXQCmb46kIuYG6U7H37eHaiTiHZRl5b84dtLMR0HyThcoAT6Vrh6VF+1tasC2zb 8Qww== X-Gm-Message-State: APjAAAXlQibZEQiLe5OkMOjs6rk2D2kYvHLOq1IcsqLhlLs0mtdLIOFp U2UOjuIrUIqqNjDgFgMBm98C0Q== X-Google-Smtp-Source: APXvYqzE/7G06PEqAijCPxhGp3iO3G3UFBOnYRhZM+k3WGz1SKXbxv6e+QegMQXJuE7Pq/qA8KX19A== X-Received: by 2002:ac2:5326:: with SMTP id f6mr9224821lfh.33.1570195980792; Fri, 04 Oct 2019 06:33:00 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id y26sm1534991ljj.90.2019.10.04.06.32.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 06:33:00 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?b?w7ZuaWc=?= , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/6] pwm: mxs: remove legacy methods Date: Fri, 4 Oct 2019 15:32:03 +0200 Message-Id: <20191004133207.6663-3-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191004133207.6663-1-linux@rasmusvillemoes.dk> References: <20191004133207.6663-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Since we now have ->apply, these are no longer relevant. Signed-off-by: Rasmus Villemoes Reviewed-by: Uwe Kleine-König --- drivers/pwm/pwm-mxs.c | 77 ------------------------------------------- 1 file changed, 77 deletions(-) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 10efd3de0bb3..5a6835e18fc6 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -110,85 +110,8 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } -static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - int duty_ns, int period_ns) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - int ret, div = 0; - unsigned int period_cycles, duty_cycles; - unsigned long rate; - unsigned long long c; - - rate = clk_get_rate(mxs->clk); - while (1) { - c = rate / cdiv[div]; - c = c * period_ns; - do_div(c, 1000000000); - if (c < PERIOD_PERIOD_MAX) - break; - div++; - if (div >= PERIOD_CDIV_MAX) - return -EINVAL; - } - - period_cycles = c; - c *= duty_ns; - do_div(c, period_ns); - duty_cycles = c; - - /* - * If the PWM channel is disabled, make sure to turn on the clock - * before writing the register. Otherwise, keep it enabled. - */ - if (!pwm_is_enabled(pwm)) { - ret = clk_prepare_enable(mxs->clk); - if (ret) - return ret; - } - - writel(duty_cycles << 16, - mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); - writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH | - PERIOD_INACTIVE_LOW | PERIOD_CDIV(div), - mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); - - /* - * If the PWM is not enabled, turn the clock off again to save power. - */ - if (!pwm_is_enabled(pwm)) - clk_disable_unprepare(mxs->clk); - - return 0; -} - -static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - int ret; - - ret = clk_prepare_enable(mxs->clk); - if (ret) - return ret; - - writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); - - return 0; -} - -static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - - writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); - - clk_disable_unprepare(mxs->clk); -} - static const struct pwm_ops mxs_pwm_ops = { .apply = mxs_pwm_apply, - .config = mxs_pwm_config, - .enable = mxs_pwm_enable, - .disable = mxs_pwm_disable, .owner = THIS_MODULE, }; From patchwork Fri Oct 4 13:32:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1171855 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="EGVRYZjk"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46l9my6MN9z9sRc for ; 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Signed-off-by: Rasmus Villemoes --- drivers/pwm/pwm-mxs.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 5a6835e18fc6..57562221c439 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -25,8 +25,11 @@ #define PERIOD_PERIOD(p) ((p) & 0xffff) #define PERIOD_PERIOD_MAX 0x10000 #define PERIOD_ACTIVE_HIGH (3 << 16) +#define PERIOD_ACTIVE_LOW (2 << 16) +#define PERIOD_INACTIVE_HIGH (3 << 18) #define PERIOD_INACTIVE_LOW (2 << 18) #define PERIOD_POLARITY_NORMAL (PERIOD_ACTIVE_HIGH | PERIOD_INACTIVE_LOW) +#define PERIOD_POLARITY_INVERSE (PERIOD_ACTIVE_LOW | PERIOD_INACTIVE_HIGH) #define PERIOD_CDIV(div) (((div) & 0x7) << 20) #define PERIOD_CDIV_MAX 8 @@ -50,9 +53,7 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, unsigned int period_cycles, duty_cycles; unsigned long rate; unsigned long long c; - - if (state->polarity != PWM_POLARITY_NORMAL) - return -ENOTSUPP; + unsigned int pol_bits; /* * If the PWM channel is disabled, make sure to turn on the @@ -91,9 +92,12 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, * only take effect at the beginning of a new period, avoiding * glitches. */ + + pol_bits = state->polarity == PWM_POLARITY_NORMAL ? + PERIOD_POLARITY_NORMAL : PERIOD_POLARITY_INVERSE; writel(duty_cycles << 16, mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); - writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | PERIOD_CDIV(div), + writel(PERIOD_PERIOD(period_cycles) | pol_bits | PERIOD_CDIV(div), mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); if (state->enabled) { @@ -135,6 +139,8 @@ static int mxs_pwm_probe(struct platform_device *pdev) mxs->chip.dev = &pdev->dev; mxs->chip.ops = &mxs_pwm_ops; + mxs->chip.of_xlate = of_pwm_xlate_with_flags; + mxs->chip.of_pwm_n_cells = 3; mxs->chip.base = -1; ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm); From patchwork Fri Oct 4 13:32:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1171854 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="QLFFDcVH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46l9my0HbMz9sRV for ; Fri, 4 Oct 2019 23:33:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388675AbfJDNdI (ORCPT ); Fri, 4 Oct 2019 09:33:08 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:39257 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388662AbfJDNdI (ORCPT ); Fri, 4 Oct 2019 09:33:08 -0400 Received: by mail-lj1-f196.google.com with SMTP id y3so6533771ljj.6 for ; Fri, 04 Oct 2019 06:33:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KJd8sbimmy5mnSq6QgFxWdBMbJR5jACe59+ThyKK82g=; b=QLFFDcVHI2EhaLtxhPso76+poBjMJHw10fNMzcHwmoy9Cx7Afn8Mk5EQT7FCzlOnBI YhUhbpnEWCSXynuZYJcKXvG2a71t2R0i9EybdRZHp3LNjkXGueILouvZUvIxp9OnQl5a T4QtdWuCdh0huq8+tgQQPgcDyr9ovSMCjdFsQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KJd8sbimmy5mnSq6QgFxWdBMbJR5jACe59+ThyKK82g=; b=TPtzlhemDLL4f5TGzFCqvg5JjuvdbZt9eVzCCuo4lrnUpHSbzcOCW7tzRccim/S8m4 boHLQ2NbbTrnqHBV8SabiLeixhiLnglHPQpFGX4zi/xRD4mBh4es0Y87YxX521pFOUIa XvyX3FwkuZtLsJxnSWjozVpZvmklMigZnVdhAzK6r75zosqpe0veny6hjtVChYdpyFkn Y7v9jntsSXYR7NNOS4agX6KnRa467lLWyxuK9JFIYsKxPY7lBZI30A5o3nQFCnb74ykP GamrBmKLxXu1RQrYqUfjrf01hmy8eJ0rp7F+hhWeaa0VDSOVdUOicDDKI9Nr7E8CslDc AhvQ== X-Gm-Message-State: APjAAAVDFzZQAVEMkfAp8xQzDWOCzeBesugGTgejrbupuSDlZkzjdbGD L1w6zuYxW+U1HYrDYPJgcvvRGA== X-Google-Smtp-Source: APXvYqwvmj9emNdcSYaeyQ5bIj8DBfAdIXf//abqi9CfcXTehTrWUROGkbvTAyHXk/O4qK9ZmcUc3Q== X-Received: by 2002:a2e:9f12:: with SMTP id u18mr9775583ljk.23.1570195984389; Fri, 04 Oct 2019 06:33:04 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id y26sm1534991ljj.90.2019.10.04.06.33.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 06:33:03 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?b?w7ZuaWc=?= , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rasmus Villemoes , Rob Herring , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/6] dt-bindings: pwm: mxs-pwm: Increase #pwm-cells Date: Fri, 4 Oct 2019 15:32:05 +0200 Message-Id: <20191004133207.6663-5-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191004133207.6663-1-linux@rasmusvillemoes.dk> References: <20191004133207.6663-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org We need to increase the pwm-cells for the optional flags parameter, in order to implement support for polarity setting via DT. Acked-by: Rob Herring Signed-off-by: Rasmus Villemoes Acked-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/mxs-pwm.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt index 96cdde5f6208..1697dcd3b07c 100644 --- a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt @@ -3,7 +3,7 @@ Freescale MXS PWM controller Required properties: - compatible: should be "fsl,imx23-pwm" - reg: physical base address and length of the controller's registers -- #pwm-cells: should be 2. See pwm.txt in this directory for a description of +- #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. - fsl,pwm-number: the number of PWM devices @@ -12,6 +12,6 @@ Example: pwm: pwm@80064000 { compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; reg = <0x80064000 0x2000>; - #pwm-cells = <2>; + #pwm-cells = <3>; fsl,pwm-number = <8>; }; From patchwork Fri Oct 4 13:32:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1171853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="cVOCOZBf"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46l9mw6gv6z9sRN for ; Fri, 4 Oct 2019 23:33:20 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388682AbfJDNdI (ORCPT ); Fri, 4 Oct 2019 09:33:08 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:38552 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388667AbfJDNdI (ORCPT ); Fri, 4 Oct 2019 09:33:08 -0400 Received: by mail-lj1-f195.google.com with SMTP id b20so6543058ljj.5 for ; Fri, 04 Oct 2019 06:33:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=enjD7GinjPEmXbD794v1TL8qB8AXAn8TuqNGVlImRwo=; b=cVOCOZBfFV4/Q55ikZfbm3e6RfV3oQtgU+vNCBrhPnWHW0yMoE/YOhCTLpEuSkzPyt p/jSR/BxvhMiDKgCkwbGaaribeHJHsoJnVzAtd0w3FmfMc8fEw6xUkR16/spC40jUK7j aqmMH79uB6vD7zvJf5xhJIjmux8oZvPGm4juI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=enjD7GinjPEmXbD794v1TL8qB8AXAn8TuqNGVlImRwo=; b=IcMO0KJk3mbFNxhhBR1I4Agrx7n0CbiN7C7BNILGdcCr6yqFh8EGKrtf9nWMZgTALb Tk2H0/ufBTEH1iPRUzT4vxmFFR51wg1eVfIdsqBrEkTzLAG7YpTGBC3dpK4jSksAzHn4 ZTrIWCu6WQJJvzCsKmUM0VAji+PIlHZzldLnlnVllKc01Ve02ffnIetEEarbs5zZj6SD l/QFy6vdo+kiOJclNmRzimPNWZoxjZJVNW/DkSG+tR1dq3JrMlpR1OcpgftvVc0+QftI AKCR78eYI3+kfyvNUuUvKb0IIwG/4oodapAiJF6BuOVA+VvjXmyqOZi4pg8S7ind//Ws MMfg== X-Gm-Message-State: APjAAAVLCrvGT96x9EGXOGWeYyYywOwWRO0ZuhEG1vwAoQPa0Bx46ylq UqB+jvjzBpyKJzq5ZyIO3HubNA== X-Google-Smtp-Source: APXvYqzZiPqBZ6nH+PAoIMx4rztRtbFWWqjLzLXZv4d3HV/oeGtcTwju/gptKDUYmHusErUAOSz6bA== X-Received: by 2002:a2e:9585:: with SMTP id w5mr3871975ljh.220.1570195985888; Fri, 04 Oct 2019 06:33:05 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id y26sm1534991ljj.90.2019.10.04.06.33.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 06:33:05 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?b?w7ZuaWc=?= , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] pwm: mxs: avoid a division in mxs_pwm_apply() Date: Fri, 4 Oct 2019 15:32:06 +0200 Message-Id: <20191004133207.6663-6-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191004133207.6663-1-linux@rasmusvillemoes.dk> References: <20191004133207.6663-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Since the divisor is not a compile-time constant (unless gcc somehow decided to unroll the loop PERIOD_CDIV_MAX times), this does a somewhat expensive 32/32 division. Replace that with a right shift. We still have a 64/32 division just below, but at least in that case the divisor is compile-time constant. Signed-off-by: Rasmus Villemoes Reviewed-by: Uwe Kleine-König --- drivers/pwm/pwm-mxs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 57562221c439..f2e57fcf8f8b 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -33,8 +33,8 @@ #define PERIOD_CDIV(div) (((div) & 0x7) << 20) #define PERIOD_CDIV_MAX 8 -static const unsigned int cdiv[PERIOD_CDIV_MAX] = { - 1, 2, 4, 8, 16, 64, 256, 1024 +static const u8 cdiv_shift[PERIOD_CDIV_MAX] = { + 0, 1, 2, 3, 4, 6, 8, 10 }; struct mxs_pwm_chip { @@ -71,7 +71,7 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, rate = clk_get_rate(mxs->clk); while (1) { - c = rate / cdiv[div]; + c = rate >> cdiv_shift[div]; c = c * state->period; do_div(c, 1000000000); if (c < PERIOD_PERIOD_MAX) From patchwork Fri Oct 4 13:32:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 1171851 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rasmusvillemoes.dk Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="GsEaQ4PA"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46l9mq0btwz9sQn for ; Fri, 4 Oct 2019 23:33:15 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388673AbfJDNdO (ORCPT ); Fri, 4 Oct 2019 09:33:14 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:40320 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388703AbfJDNdK (ORCPT ); Fri, 4 Oct 2019 09:33:10 -0400 Received: by mail-lj1-f193.google.com with SMTP id 7so6529992ljw.7 for ; Fri, 04 Oct 2019 06:33:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=35c6WKfWiVzHcoZfDnuVi6Z0edUxk0lXRUfNHbINisM=; b=GsEaQ4PAaCg++2pIX8jFuqPCmCG8bW4FnbepiCXMbGjjqMgVq+BZTo5sWrviIz1nm1 HaZ0oOMcm5OU0oH0Si//o9G1g6UNYV/pOzZ85f+Rzk438Yvx3R2adqlKoUe0QxGD0W2m habr3gaCWgS2zCIavFKTIkmpOJqVSPVeh/h6M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=35c6WKfWiVzHcoZfDnuVi6Z0edUxk0lXRUfNHbINisM=; b=fh1i9VN/XdIe6fjdFr1zvTv/g4TiV6x9Ik8fIHjid9eIBBjDLPYpfAWjd6q1S5w8uY veBtwDRQRQCX/Y3qkj4HnB6i9goDL/jjeoLABl52c1yPZIT1dhf784+xt9Cb1DZzYV/9 6HJBZMuIa4OT06RFld9FaaruHXjh97fLVrQmz7RXsSm8WDiCvNlqtu9kvLdAzejQdiwV rFJ9+wNe1Vxl+qJmmS9ZGAC3XKeYlvpqGjfuaQd19Z4i+A8IILEDkoudpgzPiTsI4YYl a6FBsHHJvKHTIGl+I8JogC0NK//ovc+Eb60ruSLs41YmSOj528vvWyZaAHnnp8yPvarH X2IA== X-Gm-Message-State: APjAAAWkew4w45wpY1nwbX/VkYYXDCo8angq/YfmJxQsxeIL51x+LcTd Rfins50ioMZIHfvBxtp5JqvuRGGls6X4i7K8 X-Google-Smtp-Source: APXvYqzJapqdmPdUJMsrzSIurqdBWvVg4OUKJvpEiH2P9BXBMl+o8sCqNS90VSQHpgefK9j1QdikyA== X-Received: by 2002:a2e:9094:: with SMTP id l20mr9895013ljg.35.1570195987641; Fri, 04 Oct 2019 06:33:07 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id y26sm1534991ljj.90.2019.10.04.06.33.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 06:33:07 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?b?w7ZuaWc=?= Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/6] pwm: update comment on struct pwm_ops::apply Date: Fri, 4 Oct 2019 15:32:07 +0200 Message-Id: <20191004133207.6663-7-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191004133207.6663-1-linux@rasmusvillemoes.dk> References: <20191004133207.6663-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Commit 71523d1812ac (pwm: Ensure pwm_apply_state() doesn't modify the state argument) updated the kernel-doc for pwm_apply_state(), but not for the ->apply callback in the pwm_ops struct. Signed-off-by: Rasmus Villemoes Reviewed-by: Uwe Kleine-König Reviewed-by: Bjorn Andersson --- include/linux/pwm.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/include/linux/pwm.h b/include/linux/pwm.h index b2c9c460947d..0ef808d925bb 100644 --- a/include/linux/pwm.h +++ b/include/linux/pwm.h @@ -243,10 +243,7 @@ pwm_set_relative_duty_cycle(struct pwm_state *state, unsigned int duty_cycle, * @request: optional hook for requesting a PWM * @free: optional hook for freeing a PWM * @capture: capture and report PWM signal - * @apply: atomically apply a new PWM config. The state argument - * should be adjusted with the real hardware config (if the - * approximate the period or duty_cycle value, state should - * reflect it) + * @apply: atomically apply a new PWM config * @get_state: get the current PWM state. This function is only * called once per PWM device when the PWM chip is * registered.