From patchwork Fri Aug 16 16:16:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1148318 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4697p35kH5z9s7T for ; Sat, 17 Aug 2019 02:20:11 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="MSa6ejRg"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4697p33FSXzDrPZ for ; Sat, 17 Aug 2019 02:20:11 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=yadro.com (client-ip=89.207.88.252; helo=mta-01.yadro.com; envelope-from=s.miroshnichenko@yadro.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="MSa6ejRg"; dkim-atps=neutral Received: from mta-01.yadro.com (mta-02.yadro.com [89.207.88.252]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4697js0jQvzDrBp for ; Sat, 17 Aug 2019 02:16:32 +1000 (AEST) Received: from localhost (unknown [127.0.0.1]) by mta-01.yadro.com (Postfix) with ESMTP id F0D84412D2; Fri, 16 Aug 2019 16:16:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=yadro.com; h= content-type:content-type:content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:date:subject :subject:from:from:received:received:received; s=mta-01; t= 1565972187; x=1567786588; bh=cB7nR8ROtC5SNpdNjWl3OOWL9lMc4HM9EGb ygpicsCA=; b=MSa6ejRg32U+blKOQnoiM43+8JLPUNg3twBM1aKIzKf42/S9dXU /90dHlEQXTWqglGfCM/0AVjv9HAi/pAshEsWYLfbcaqQEfjxe59gUikhD+AMF8Ti kSVEdfiLkpbvGdLNtpjTeCXCh4px9WWTTpbY9iG0EHVEHRqt3Bpwq0Mc= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Vwde7SmTYqRP; Fri, 16 Aug 2019 19:16:27 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id 4FDAA412D6; Fri, 16 Aug 2019 19:16:27 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.60) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Fri, 16 Aug 2019 19:16:25 +0300 From: Sergey Miroshnichenko To: Subject: [PATCH v6 1/5] powerpc/pci: Access PCI config space directly w/o pci_dn Date: Fri, 16 Aug 2019 19:16:10 +0300 Message-ID: <20190816161614.32344-2-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190816161614.32344-1-s.miroshnichenko@yadro.com> References: <20190816161614.32344-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.60] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Bobroff , Sergey Miroshnichenko , Oliver O'Halloran , linux@yadro.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" To fetch an updated DT for the newly hotplugged device, OS must explicitly request it from the firmware via the pnv_php driver. If pnv_php wasn't triggered/loaded, it is still possible to discover new devices if PCIe I/O will not stop in absence of the pci_dn structure. Reviewed-by: Oliver O'Halloran Signed-off-by: Sergey Miroshnichenko --- arch/powerpc/kernel/rtas_pci.c | 97 +++++++++++++++++++--------- arch/powerpc/platforms/powernv/pci.c | 64 ++++++++++++------ 2 files changed, 109 insertions(+), 52 deletions(-) diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c index ae5e43eaca48..912da28b3737 100644 --- a/arch/powerpc/kernel/rtas_pci.c +++ b/arch/powerpc/kernel/rtas_pci.c @@ -42,10 +42,26 @@ static inline int config_access_valid(struct pci_dn *dn, int where) return 0; } -int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) +static int rtas_read_raw_config(unsigned long buid, int busno, unsigned int devfn, + int where, int size, u32 *val) { int returnval = -1; - unsigned long buid, addr; + unsigned long addr = rtas_config_addr(busno, devfn, where); + int ret; + + if (buid) { + ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, + addr, BUID_HI(buid), BUID_LO(buid), size); + } else { + ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); + } + *val = returnval; + + return ret; +} + +int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) +{ int ret; if (!pdn) @@ -58,16 +74,8 @@ int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) return PCIBIOS_SET_FAILED; #endif - addr = rtas_config_addr(pdn->busno, pdn->devfn, where); - buid = pdn->phb->buid; - if (buid) { - ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, - addr, BUID_HI(buid), BUID_LO(buid), size); - } else { - ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); - } - *val = returnval; - + ret = rtas_read_raw_config(pdn->phb->buid, pdn->busno, pdn->devfn, + where, size, val); if (ret) return PCIBIOS_DEVICE_NOT_FOUND; @@ -85,18 +93,44 @@ static int rtas_pci_read_config(struct pci_bus *bus, pdn = pci_get_pdn_by_devfn(bus, devfn); - /* Validity of pdn is checked in here */ - ret = rtas_read_config(pdn, where, size, val); - if (*val == EEH_IO_ERROR_VALUE(size) && - eeh_dev_check_failure(pdn_to_eeh_dev(pdn))) - return PCIBIOS_DEVICE_NOT_FOUND; + if (pdn) { + /* Validity of pdn is checked in here */ + ret = rtas_read_config(pdn, where, size, val); + + if (*val == EEH_IO_ERROR_VALUE(size) && + eeh_dev_check_failure(pdn_to_eeh_dev(pdn))) + ret = PCIBIOS_DEVICE_NOT_FOUND; + } else { + struct pci_controller *phb = pci_bus_to_host(bus); + + ret = rtas_read_raw_config(phb->buid, bus->number, devfn, + where, size, val); + } return ret; } +static int rtas_write_raw_config(unsigned long buid, int busno, unsigned int devfn, + int where, int size, u32 val) +{ + unsigned long addr = rtas_config_addr(busno, devfn, where); + int ret; + + if (buid) { + ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, + BUID_HI(buid), BUID_LO(buid), size, (ulong)val); + } else { + ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); + } + + if (ret) + return PCIBIOS_DEVICE_NOT_FOUND; + + return PCIBIOS_SUCCESSFUL; +} + int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val) { - unsigned long buid, addr; int ret; if (!pdn) @@ -109,15 +143,8 @@ int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val) return PCIBIOS_SET_FAILED; #endif - addr = rtas_config_addr(pdn->busno, pdn->devfn, where); - buid = pdn->phb->buid; - if (buid) { - ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, - BUID_HI(buid), BUID_LO(buid), size, (ulong) val); - } else { - ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); - } - + ret = rtas_write_raw_config(pdn->phb->buid, pdn->busno, pdn->devfn, + where, size, val); if (ret) return PCIBIOS_DEVICE_NOT_FOUND; @@ -128,12 +155,20 @@ static int rtas_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { - struct pci_dn *pdn; + struct pci_dn *pdn = pci_get_pdn_by_devfn(bus, devfn); + int ret; - pdn = pci_get_pdn_by_devfn(bus, devfn); + if (pdn) { + /* Validity of pdn is checked in here. */ + ret = rtas_write_config(pdn, where, size, val); + } else { + struct pci_controller *phb = pci_bus_to_host(bus); - /* Validity of pdn is checked in here. */ - return rtas_write_config(pdn, where, size, val); + ret = rtas_write_raw_config(phb->buid, bus->number, devfn, + where, size, val); + } + + return ret; } static struct pci_ops rtas_pci_ops = { diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c index 6104418c9ad5..8d6c094f074e 100644 --- a/arch/powerpc/platforms/powernv/pci.c +++ b/arch/powerpc/platforms/powernv/pci.c @@ -647,30 +647,29 @@ static void pnv_pci_config_check_eeh(struct pci_dn *pdn) } } -int pnv_pci_cfg_read(struct pci_dn *pdn, - int where, int size, u32 *val) +static int pnv_pci_cfg_read_raw(u64 phb_id, int busno, unsigned int devfn, + int where, int size, u32 *val) { - struct pnv_phb *phb = pdn->phb->private_data; - u32 bdfn = (pdn->busno << 8) | pdn->devfn; + u32 bdfn = (busno << 8) | devfn; s64 rc; switch (size) { case 1: { u8 v8; - rc = opal_pci_config_read_byte(phb->opal_id, bdfn, where, &v8); + rc = opal_pci_config_read_byte(phb_id, bdfn, where, &v8); *val = (rc == OPAL_SUCCESS) ? v8 : 0xff; break; } case 2: { __be16 v16; - rc = opal_pci_config_read_half_word(phb->opal_id, bdfn, where, - &v16); + rc = opal_pci_config_read_half_word(phb_id, bdfn, where, + &v16); *val = (rc == OPAL_SUCCESS) ? be16_to_cpu(v16) : 0xffff; break; } case 4: { __be32 v32; - rc = opal_pci_config_read_word(phb->opal_id, bdfn, where, &v32); + rc = opal_pci_config_read_word(phb_id, bdfn, where, &v32); *val = (rc == OPAL_SUCCESS) ? be32_to_cpu(v32) : 0xffffffff; break; } @@ -679,27 +678,28 @@ int pnv_pci_cfg_read(struct pci_dn *pdn, } pr_devel("%s: bus: %x devfn: %x +%x/%x -> %08x\n", - __func__, pdn->busno, pdn->devfn, where, size, *val); + __func__, busno, devfn, where, size, *val); + return PCIBIOS_SUCCESSFUL; } -int pnv_pci_cfg_write(struct pci_dn *pdn, - int where, int size, u32 val) +static int pnv_pci_cfg_write_raw(u64 phb_id, int busno, unsigned int devfn, + int where, int size, u32 val) { - struct pnv_phb *phb = pdn->phb->private_data; - u32 bdfn = (pdn->busno << 8) | pdn->devfn; + u32 bdfn = (busno << 8) | devfn; pr_devel("%s: bus: %x devfn: %x +%x/%x -> %08x\n", - __func__, pdn->busno, pdn->devfn, where, size, val); + __func__, busno, devfn, where, size, val); + switch (size) { case 1: - opal_pci_config_write_byte(phb->opal_id, bdfn, where, val); + opal_pci_config_write_byte(phb_id, bdfn, where, val); break; case 2: - opal_pci_config_write_half_word(phb->opal_id, bdfn, where, val); + opal_pci_config_write_half_word(phb_id, bdfn, where, val); break; case 4: - opal_pci_config_write_word(phb->opal_id, bdfn, where, val); + opal_pci_config_write_word(phb_id, bdfn, where, val); break; default: return PCIBIOS_FUNC_NOT_SUPPORTED; @@ -708,6 +708,24 @@ int pnv_pci_cfg_write(struct pci_dn *pdn, return PCIBIOS_SUCCESSFUL; } +int pnv_pci_cfg_read(struct pci_dn *pdn, + int where, int size, u32 *val) +{ + struct pnv_phb *phb = pdn->phb->private_data; + + return pnv_pci_cfg_read_raw(phb->opal_id, pdn->busno, pdn->devfn, + where, size, val); +} + +int pnv_pci_cfg_write(struct pci_dn *pdn, + int where, int size, u32 val) +{ + struct pnv_phb *phb = pdn->phb->private_data; + + return pnv_pci_cfg_write_raw(phb->opal_id, pdn->busno, pdn->devfn, + where, size, val); +} + #if CONFIG_EEH static bool pnv_pci_cfg_check(struct pci_dn *pdn) { @@ -743,13 +761,15 @@ static int pnv_pci_read_config(struct pci_bus *bus, int where, int size, u32 *val) { struct pci_dn *pdn; - struct pnv_phb *phb; + struct pci_controller *hose = pci_bus_to_host(bus); + struct pnv_phb *phb = hose->private_data; int ret; *val = 0xFFFFFFFF; pdn = pci_get_pdn_by_devfn(bus, devfn); if (!pdn) - return PCIBIOS_DEVICE_NOT_FOUND; + return pnv_pci_cfg_read_raw(phb->opal_id, bus->number, devfn, + where, size, val); if (!pnv_pci_cfg_check(pdn)) return PCIBIOS_DEVICE_NOT_FOUND; @@ -772,12 +792,14 @@ static int pnv_pci_write_config(struct pci_bus *bus, int where, int size, u32 val) { struct pci_dn *pdn; - struct pnv_phb *phb; + struct pci_controller *hose = pci_bus_to_host(bus); + struct pnv_phb *phb = hose->private_data; int ret; pdn = pci_get_pdn_by_devfn(bus, devfn); if (!pdn) - return PCIBIOS_DEVICE_NOT_FOUND; + return pnv_pci_cfg_write_raw(phb->opal_id, bus->number, devfn, + where, size, val); if (!pnv_pci_cfg_check(pdn)) return PCIBIOS_DEVICE_NOT_FOUND; From patchwork Fri Aug 16 16:16:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1148319 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4697rc49gqz9s7T for ; Sat, 17 Aug 2019 02:22:24 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="IKl5PBMr"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4697rb5z8LzDqYj for ; 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Fri, 16 Aug 2019 19:16:26 +0300 From: Sergey Miroshnichenko To: Subject: [PATCH v6 2/5] powerpc/powernv/pci: Suppress an EEH error when reading an empty slot Date: Fri, 16 Aug 2019 19:16:11 +0300 Message-ID: <20190816161614.32344-3-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190816161614.32344-1-s.miroshnichenko@yadro.com> References: <20190816161614.32344-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.60] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Bobroff , Sergey Miroshnichenko , Oliver O'Halloran , linux@yadro.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Reading an empty slot returns all ones, which triggers a false EEH error event on PowerNV. This patch unfreezes the bus where it has happened. Reviewed-by: Oliver O'Halloran Signed-off-by: Sergey Miroshnichenko --- arch/powerpc/include/asm/ppc-pci.h | 1 + arch/powerpc/kernel/pci_dn.c | 2 +- arch/powerpc/platforms/powernv/pci.c | 31 +++++++++++++++++++++++++--- 3 files changed, 30 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h index cec2d6409515..8b51c8577b94 100644 --- a/arch/powerpc/include/asm/ppc-pci.h +++ b/arch/powerpc/include/asm/ppc-pci.h @@ -36,6 +36,7 @@ void *traverse_pci_dn(struct pci_dn *root, void *(*fn)(struct pci_dn *, void *), void *data); extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); +struct pci_dn *pci_bus_to_pdn(struct pci_bus *bus); /* From rtas_pci.h */ extern void init_pci_config_tokens (void); diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c index c4c8c237a106..e1a0ab2caafe 100644 --- a/arch/powerpc/kernel/pci_dn.c +++ b/arch/powerpc/kernel/pci_dn.c @@ -27,7 +27,7 @@ * one of PF's bridge. For other devices, their firmware * data is linked to that of their bridge. */ -static struct pci_dn *pci_bus_to_pdn(struct pci_bus *bus) +struct pci_dn *pci_bus_to_pdn(struct pci_bus *bus) { struct pci_bus *pbus; struct device_node *dn; diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c index 8d6c094f074e..a5b04410c8b4 100644 --- a/arch/powerpc/platforms/powernv/pci.c +++ b/arch/powerpc/platforms/powernv/pci.c @@ -756,6 +756,21 @@ static inline pnv_pci_cfg_check(struct pci_dn *pdn) } #endif /* CONFIG_EEH */ +static int get_bus_pe_number(struct pci_bus *bus) +{ + struct pci_dn *pdn = pci_bus_to_pdn(bus); + struct pci_dn *child; + + if (!pdn) + return IODA_INVALID_PE; + + list_for_each_entry(child, &pdn->child_list, list) + if (child->pe_number != IODA_INVALID_PE) + return child->pe_number; + + return IODA_INVALID_PE; +} + static int pnv_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) @@ -767,9 +782,19 @@ static int pnv_pci_read_config(struct pci_bus *bus, *val = 0xFFFFFFFF; pdn = pci_get_pdn_by_devfn(bus, devfn); - if (!pdn) - return pnv_pci_cfg_read_raw(phb->opal_id, bus->number, devfn, - where, size, val); + if (!pdn) { + int pe_number = get_bus_pe_number(bus); + + ret = pnv_pci_cfg_read_raw(phb->opal_id, bus->number, devfn, + where, size, val); + + if (!ret && (*val == EEH_IO_ERROR_VALUE(size)) && phb->unfreeze_pe) + phb->unfreeze_pe(phb, (pe_number == IODA_INVALID_PE) ? + phb->ioda.reserved_pe_idx : pe_number, + OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); + + return ret; + } if (!pnv_pci_cfg_check(pdn)) return PCIBIOS_DEVICE_NOT_FOUND; From patchwork Fri Aug 16 16:16:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1148320 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4697v15kqvz9s7T for ; Sat, 17 Aug 2019 02:24:29 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="lQS1HxBw"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4697v14Kw7zDqcw for ; Sat, 17 Aug 2019 02:24:29 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=yadro.com (client-ip=89.207.88.252; helo=mta-01.yadro.com; envelope-from=s.miroshnichenko@yadro.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="lQS1HxBw"; dkim-atps=neutral Received: from mta-01.yadro.com (mta-02.yadro.com [89.207.88.252]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4697js5WRrzDrCj for ; Sat, 17 Aug 2019 02:16:33 +1000 (AEST) Received: from localhost (unknown [127.0.0.1]) by mta-01.yadro.com (Postfix) with ESMTP id 2429B41200; Fri, 16 Aug 2019 16:16:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=yadro.com; h= content-type:content-type:content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:date:subject :subject:from:from:received:received:received; s=mta-01; t= 1565972189; x=1567786590; bh=M3q+n/GWaVDpD9TUZhsnxUWV9/Q4vO0m4zu +dMgM/qY=; b=lQS1HxBw9tKp/+4/KUI7YIZS89Ms/KPWa7nRTzL1G+sOhhPhh52 PWEm9UkWEkN1WTvlEY+sUvy6I0K4Bczg+AlqMBbY6nWmDOKd3K/tafbGkjaAeMIe Dtb3yXnbRXxRSjp9oqzg6mGXF1rZQgU31NCdmk5IJtxv+DkF1toDgpPQ= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fov88eiz541S; Fri, 16 Aug 2019 19:16:29 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id C7DAA42001; Fri, 16 Aug 2019 19:16:27 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.60) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Fri, 16 Aug 2019 19:16:27 +0300 From: Sergey Miroshnichenko To: Subject: [PATCH v6 3/5] powerpc/pci: Create pci_dn on demand Date: Fri, 16 Aug 2019 19:16:12 +0300 Message-ID: <20190816161614.32344-4-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190816161614.32344-1-s.miroshnichenko@yadro.com> References: <20190816161614.32344-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.60] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Bobroff , Sergey Miroshnichenko , Oliver O'Halloran , linux@yadro.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" If a struct pci_dn hasn't yet been created for the PCIe device (there was no DT node for it), allocate this structure and fill with info read from the device directly. Signed-off-by: Sergey Miroshnichenko --- arch/powerpc/kernel/pci_dn.c | 88 ++++++++++++++++++++++++++++++------ 1 file changed, 74 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c index e1a0ab2caafe..261d61460eac 100644 --- a/arch/powerpc/kernel/pci_dn.c +++ b/arch/powerpc/kernel/pci_dn.c @@ -20,6 +20,9 @@ #include #include +static struct pci_dn *pci_create_pdn_from_dev(struct pci_dev *pdev, + struct pci_dn *parent); + /* * The function is used to find the firmware data of one * specific PCI device, which is attached to the indicated @@ -52,6 +55,9 @@ struct pci_dn *pci_bus_to_pdn(struct pci_bus *bus) dn = pci_bus_to_OF_node(pbus); pdn = dn ? PCI_DN(dn) : NULL; + if (!pdn && pbus->self) + pdn = pbus->self->dev.archdata.pci_data; + return pdn; } @@ -61,10 +67,13 @@ struct pci_dn *pci_get_pdn_by_devfn(struct pci_bus *bus, struct device_node *dn = NULL; struct pci_dn *parent, *pdn; struct pci_dev *pdev = NULL; + bool pdev_found = false; /* Fast path: fetch from PCI device */ list_for_each_entry(pdev, &bus->devices, bus_list) { if (pdev->devfn == devfn) { + pdev_found = true; + if (pdev->dev.archdata.pci_data) return pdev->dev.archdata.pci_data; @@ -73,6 +82,9 @@ struct pci_dn *pci_get_pdn_by_devfn(struct pci_bus *bus, } } + if (!pdev_found) + pdev = NULL; + /* Fast path: fetch from device node */ pdn = dn ? PCI_DN(dn) : NULL; if (pdn) @@ -85,9 +97,12 @@ struct pci_dn *pci_get_pdn_by_devfn(struct pci_bus *bus, list_for_each_entry(pdn, &parent->child_list, list) { if (pdn->busno == bus->number && - pdn->devfn == devfn) - return pdn; - } + pdn->devfn == devfn) { + if (pdev) + pdev->dev.archdata.pci_data = pdn; + return pdn; + } + } return NULL; } @@ -117,17 +132,17 @@ struct pci_dn *pci_get_pdn(struct pci_dev *pdev) list_for_each_entry(pdn, &parent->child_list, list) { if (pdn->busno == pdev->bus->number && - pdn->devfn == pdev->devfn) + pdn->devfn == pdev->devfn) { + pdev->dev.archdata.pci_data = pdn; return pdn; + } } - return NULL; + return pci_create_pdn_from_dev(pdev, parent); } -#ifdef CONFIG_PCI_IOV -static struct pci_dn *add_one_dev_pci_data(struct pci_dn *parent, - int vf_index, - int busno, int devfn) +static struct pci_dn *pci_alloc_pdn(struct pci_dn *parent, + int busno, int devfn) { struct pci_dn *pdn; @@ -143,7 +158,6 @@ static struct pci_dn *add_one_dev_pci_data(struct pci_dn *parent, pdn->parent = parent; pdn->busno = busno; pdn->devfn = devfn; - pdn->vf_index = vf_index; pdn->pe_number = IODA_INVALID_PE; INIT_LIST_HEAD(&pdn->child_list); INIT_LIST_HEAD(&pdn->list); @@ -151,7 +165,51 @@ static struct pci_dn *add_one_dev_pci_data(struct pci_dn *parent, return pdn; } -#endif + +static struct pci_dn *pci_create_pdn_from_dev(struct pci_dev *pdev, + struct pci_dn *parent) +{ + struct pci_dn *pdn = NULL; + u32 class_code; + u16 device_id; + u16 vendor_id; + + if (!parent) + return NULL; + + pdn = pci_alloc_pdn(parent, pdev->bus->busn_res.start, pdev->devfn); + pci_info(pdev, "Create a new pdn for devfn %2x\n", pdev->devfn / 8); + + if (!pdn) { + pci_err(pdev, "%s: Failed to allocate pdn\n", __func__); + return NULL; + } + + #ifdef CONFIG_EEH + if (!eeh_dev_init(pdn)) { + kfree(pdn); + pci_err(pdev, "%s: Failed to allocate edev\n", __func__); + return NULL; + } + #endif /* CONFIG_EEH */ + + pci_bus_read_config_word(pdev->bus, pdev->devfn, + PCI_VENDOR_ID, &vendor_id); + pdn->vendor_id = vendor_id; + + pci_bus_read_config_word(pdev->bus, pdev->devfn, + PCI_DEVICE_ID, &device_id); + pdn->device_id = device_id; + + pci_bus_read_config_dword(pdev->bus, pdev->devfn, + PCI_CLASS_REVISION, &class_code); + class_code >>= 8; + pdn->class_code = class_code; + + pdev->dev.archdata.pci_data = pdn; + + return pdn; +} struct pci_dn *add_dev_pci_data(struct pci_dev *pdev) { @@ -176,15 +234,17 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev) for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { struct eeh_dev *edev __maybe_unused; - pdn = add_one_dev_pci_data(parent, i, - pci_iov_virtfn_bus(pdev, i), - pci_iov_virtfn_devfn(pdev, i)); + pdn = pci_alloc_pdn(parent, + pci_iov_virtfn_bus(pdev, i), + pci_iov_virtfn_devfn(pdev, i)); if (!pdn) { dev_warn(&pdev->dev, "%s: Cannot create firmware data for VF#%d\n", __func__, i); return NULL; } + pdn->vf_index = i; + #ifdef CONFIG_EEH /* Create the EEH device for the VF */ edev = eeh_dev_init(pdn); From patchwork Fri Aug 16 16:16:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1148321 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4697xs39c4z9s7T for ; Sat, 17 Aug 2019 02:26:57 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="l/qgAOns"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4697xs0GF8zDrGx for ; Sat, 17 Aug 2019 02:26:57 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; 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s=mta-01; t= 1565972189; x=1567786590; bh=2mQY7T6R/M7OQA2zxjW7ZjAXYZVYrU3dEDH zPnojeBY=; b=l/qgAOnsORU8BllT1sMPVWzZF5hHa80e9kmEZ84sba1f2O+tniw ZyC/WWlf6dE6HApBVyoMORV/jn+DdTLxfDXSDm7maUY06tHeDj9+zRYUJ7oEdDFN 0zZb2UKmUYQeLU0VM7p5c7CmLwjsjEILTUW2h0aIy9+EE16wJH0ShUIU= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Irgaf_mSzF_V; Fri, 16 Aug 2019 19:16:29 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id 0BA1842ECA; Fri, 16 Aug 2019 19:16:28 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.60) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Fri, 16 Aug 2019 19:16:27 +0300 From: Sergey Miroshnichenko To: Subject: [PATCH v6 4/5] powerpc/powernv/pci: Hook up the writes to PCI_SECONDARY_BUS register Date: Fri, 16 Aug 2019 19:16:13 +0300 Message-ID: <20190816161614.32344-5-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190816161614.32344-1-s.miroshnichenko@yadro.com> References: <20190816161614.32344-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.60] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Bobroff , Sergey Miroshnichenko , Oliver O'Halloran , linux@yadro.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Writing a new value to the PCI_SECONDARY_BUS register of the bridge means that its children will become addressable on another address (new B in BDF) or even un-addressable if the secondary bus is set to zero. On PowerNV, device PEs are heavily BDF-dependent, so they must be updated on every such change of its address. Signed-off-by: Sergey Miroshnichenko --- arch/powerpc/platforms/powernv/pci.c | 118 ++++++++++++++++++++++++++- 1 file changed, 116 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c index a5b04410c8b4..e9b4ed0f97a3 100644 --- a/arch/powerpc/platforms/powernv/pci.c +++ b/arch/powerpc/platforms/powernv/pci.c @@ -717,13 +717,127 @@ int pnv_pci_cfg_read(struct pci_dn *pdn, where, size, val); } +static void invalidate_children_pes(struct pci_dn *pdn) +{ + struct pnv_phb *phb = pdn->phb->private_data; + struct pci_dn *child; + bool found_pe = false; + int pe_num; + int pe_bus; + + list_for_each_entry(child, &pdn->child_list, list) { + struct pnv_ioda_pe *pe = (child->pe_number != IODA_INVALID_PE) ? + &phb->ioda.pe_array[child->pe_number] : + NULL; + + if (!child->busno) + continue; + + if ((child->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) + invalidate_children_pes(child); + + if (pe) { + u8 rid_bus = (pe->rid >> 8) & 0xff; + + if (rid_bus) { + pe_num = child->pe_number; + pe_bus = rid_bus; + found_pe = true; + } + + pe->rid &= 0xff; + } + + child->busno = 0; + } + + if (found_pe) { + u16 rid = pe_bus << 8; + + opal_pci_set_pe(phb->opal_id, pe_num, rid, 7, 0, 0, OPAL_UNMAP_PE); + } +} + +static u8 pre_hook_new_sec_bus(struct pci_dn *pdn, u8 new_secondary_bus) +{ + u32 old_secondary_bus = 0; + + if ((pdn->class_code >> 8) != PCI_CLASS_BRIDGE_PCI) + return 0; + + pnv_pci_cfg_read(pdn, PCI_SECONDARY_BUS, 1, &old_secondary_bus); + old_secondary_bus &= 0xff; + + if (old_secondary_bus != new_secondary_bus) + invalidate_children_pes(pdn); + + return old_secondary_bus; +} + +static void update_children_pes(struct pci_dn *pdn, u8 new_secondary_bus) +{ + struct pnv_phb *phb = pdn->phb->private_data; + struct pci_dn *child; + bool found_pe = false; + int pe_num; + + if (!new_secondary_bus) + return; + + list_for_each_entry(child, &pdn->child_list, list) { + struct pnv_ioda_pe *pe = (child->pe_number != IODA_INVALID_PE) ? + &phb->ioda.pe_array[child->pe_number] : + NULL; + + if (child->busno) + continue; + + child->busno = new_secondary_bus; + + if (pe) { + pe->rid |= (child->busno << 8); + pe_num = child->pe_number; + found_pe = true; + } + } + + if (found_pe) { + u16 rid = new_secondary_bus << 8; + + opal_pci_set_pe(phb->opal_id, pe_num, rid, 7, 0, 0, OPAL_MAP_PE); + } +} + +static void post_hook_new_sec_bus(struct pci_dn *pdn, u8 new_secondary_bus) +{ + if ((pdn->class_code >> 8) != PCI_CLASS_BRIDGE_PCI) + return; + + update_children_pes(pdn, new_secondary_bus); +} + int pnv_pci_cfg_write(struct pci_dn *pdn, int where, int size, u32 val) { struct pnv_phb *phb = pdn->phb->private_data; + u8 old_secondary_bus = 0, new_secondary_bus = 0; + int rc; + + if (where == PCI_SECONDARY_BUS) { + new_secondary_bus = val & 0xff; + old_secondary_bus = pre_hook_new_sec_bus(pdn, new_secondary_bus); + } else if (where == PCI_PRIMARY_BUS && size > 1) { + new_secondary_bus = (val >> 8) & 0xff; + old_secondary_bus = pre_hook_new_sec_bus(pdn, new_secondary_bus); + } - return pnv_pci_cfg_write_raw(phb->opal_id, pdn->busno, pdn->devfn, - where, size, val); + rc = pnv_pci_cfg_write_raw(phb->opal_id, pdn->busno, pdn->devfn, + where, size, val); + + if (new_secondary_bus && old_secondary_bus != new_secondary_bus) + post_hook_new_sec_bus(pdn, new_secondary_bus); + + return rc; } #if CONFIG_EEH From patchwork Fri Aug 16 16:16:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1148323 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4698185P34z9s7T for ; Sat, 17 Aug 2019 02:29:48 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; 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Fri, 16 Aug 2019 19:16:28 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.60) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Fri, 16 Aug 2019 19:16:27 +0300 From: Sergey Miroshnichenko To: Subject: [PATCH v6 5/5] powerpc/pci: Enable assigning bus numbers instead of reading them from DT Date: Fri, 16 Aug 2019 19:16:14 +0300 Message-ID: <20190816161614.32344-6-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190816161614.32344-1-s.miroshnichenko@yadro.com> References: <20190816161614.32344-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.60] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Bobroff , Sergey Miroshnichenko , Oliver O'Halloran , linux@yadro.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" If the firmware indicates support of reassigning bus numbers via the PHB's "ibm,supported-movable-bdfs" property in DT, PowerNV will not depend on PCI topology info from DT anymore. This makes possible to re-enumerate the fabric, assign the new bus numbers and switch from the pnv_php module to the standard pciehp driver for PCI hotplug functionality. Signed-off-by: Sergey Miroshnichenko --- arch/powerpc/kernel/pci_dn.c | 5 +++++ arch/powerpc/platforms/powernv/eeh-powernv.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c index 261d61460eac..90f8d46550df 100644 --- a/arch/powerpc/kernel/pci_dn.c +++ b/arch/powerpc/kernel/pci_dn.c @@ -542,6 +542,11 @@ void pci_devs_phb_init_dynamic(struct pci_controller *phb) phb->pci_data = pdn; } + if (of_get_property(dn, "ibm,supported-movable-bdfs", NULL)) { + pci_add_flags(PCI_REASSIGN_ALL_BUS); + return; + } + /* Update dn->phb ptrs for new phb and children devices */ pci_traverse_device_nodes(dn, add_pdn, phb); } diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index 620a986209f5..eb01f16c4e60 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c @@ -41,7 +41,7 @@ void pnv_pcibios_bus_add_device(struct pci_dev *pdev) { struct pci_dn *pdn = pci_get_pdn(pdev); - if (!pdev->is_virtfn) + if (!pdev->is_virtfn && !pci_has_flag(PCI_REASSIGN_ALL_BUS)) return; /*