From patchwork Wed Jul 10 18:59:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 1130540 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Y4EVTExV"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45kT6B5pmXz9s4V for ; Thu, 11 Jul 2019 05:00:34 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5CA6CC21D8E; Wed, 10 Jul 2019 19:00:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 164DEC21C51; Wed, 10 Jul 2019 18:59:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CE199C21C6A; Wed, 10 Jul 2019 18:59:34 +0000 (UTC) Received: from mail-io1-f68.google.com (mail-io1-f68.google.com [209.85.166.68]) by lists.denx.de (Postfix) with ESMTPS id C5A00C21C27 for ; Wed, 10 Jul 2019 18:59:26 +0000 (UTC) Received: by mail-io1-f68.google.com with SMTP id o9so7102814iom.3 for ; Wed, 10 Jul 2019 11:59:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=ahjCV9jzWQ9YeteKvfCXNNMgFLpnlZuq49sSRjPoQKE=; b=Y4EVTExVlz9XWA7Lckj6g23ns+0AmRFa9PrsSTUFA7y0HH5TLDV7D8HJX9ssarpKTl PtExDsGL9iWIaHLrljvgTyB7yrXcc7CKIGGLjqxt+D9tNxazvijKwPAtedUD8bsEWSm+ gzOTy9CX3tMwl5plbJvipyrBBla1J1tKgnJMALV5EXZWM8HhFjaHAg+jwnmgVurk6atE TfjEflZ9AwkVk1P2Lj/SodLrHmwDmTEYZx4PSe4BLjcYLk19PClF4++Kndrl2dVoe+OV Tmf/Q62Dmn0Xp/lbylwQvkGN2Ms5VPHNIeP2MTjWEeUGQM+caZa4tUicEuNSuiztg7Hk +Lbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ahjCV9jzWQ9YeteKvfCXNNMgFLpnlZuq49sSRjPoQKE=; b=SEjj6N9WAGRLzaou5OHL4noLIiwAgh4gKuWvAsfVCFc74zkrAZXLxprxMC0xDulhjN 6aKYQyMyyjlgP9M6B4KgCFb8840t/g8H9QOn6/fYtAvMhWqaoug2kUHZPB688dBCMzDf FCeGoh4tIb0KXrThrIhAhGe7Vd6ToH+ApwjAGtPhy0sjsWpoU6d0t99a7SM1LTQImmh9 hWenkcIpiAFLPY+P7iA38kY02GzOpVDaZ8x1f9YyN66S51eET5MsEwUjwRhCFQgZYV9m WLINBqh5Jzey+1I0yZrUqvBcNb8p6UTHzMhTwUaDcGxg+l1aGtN5cfEWyVlSxuQF8VVL Cr9A== X-Gm-Message-State: APjAAAVQiuf3jBe8tHG/bUkoUxeqH/Yy/qmYi0BKB9DLx0pWocLIlFIf mVMcHP+zBq3d9DNu53SAbksvN6Tz X-Google-Smtp-Source: APXvYqzBf7PTSujDetHPfbn5OX3zyQfrxUPR1MP+1/t0ap6eICSmIHQBY0eiyCAOWrKq4ZqTSJADSw== X-Received: by 2002:a6b:641a:: with SMTP id t26mr11516864iog.3.1562785164741; Wed, 10 Jul 2019 11:59:24 -0700 (PDT) Received: from localhost.localdomain (c-73-37-219-234.hsd1.mn.comcast.net. [73.37.219.234]) by smtp.gmail.com with ESMTPSA id m10sm5006203ioj.75.2019.07.10.11.59.23 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 11:59:23 -0700 (PDT) From: Adam Ford To: u-boot@lists.denx.de Date: Wed, 10 Jul 2019 13:59:09 -0500 Message-Id: <20190710185911.6983-1-aford173@gmail.com> X-Mailer: git-send-email 2.17.1 Cc: marex@denx.de, adam.ford@logicpd.com Subject: [U-Boot] [PATCH V2 1/3] phy: Add support for phy-da8xx-usb X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" In preparation for supporting the musb driver, this patch adds support for the usb phy associated with the musb driver. Signed-off-by: Adam Ford --- drivers/phy/Kconfig | 6 ++++ drivers/phy/Makefile | 1 + drivers/phy/phy-da8xx-usb.c | 64 +++++++++++++++++++++++++++++++++++++ 3 files changed, 71 insertions(+) V2: Split phy into a separate driver diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 957efb3984..8209ca7323 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -84,6 +84,12 @@ config BCM6368_USBH_PHY help Support for the Broadcom MIPS BCM6368 USBH PHY. +config PHY_DA8XX_USB + tristate "TI DA8xx USB PHY Driver" + depends on PHY && ARCH_DAVINCI + help + Enable this to support the USB PHY on DA8xx SoCs. + config PIPE3_PHY bool "Support omap's PIPE3 PHY" depends on PHY && ARCH_OMAP2PLUS diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 90646ca55b..b9f5195e1c 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o obj-$(CONFIG_KEYSTONE_USB_PHY) += keystone-usb-phy.o obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o +obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c new file mode 100644 index 0000000000..034b47932d --- /dev/null +++ b/drivers/phy/phy-da8xx-usb.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Based on the DA8xx "glue layer" code. + * Copyright (c) 2008-2019, MontaVista Software, Inc. + * + * DT support added by: Adam Ford + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static int da8xx_usb_phy_power_on(struct phy *phy) +{ + unsigned long timeout; + + clrsetbits_le32(&davinci_syscfg_regs->cfgchip2, + CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | + CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ, + CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | + CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ); + + /* wait until the usb phy pll locks */ + timeout = get_timer(0); + while (get_timer(timeout) < 10) { + if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) + return 0; + } + + debug("Phy was not turned on\n"); + + return -ENODEV; +} + +static int da8xx_usb_phy_power_off(struct phy *phy) +{ + clrsetbits_le32(&davinci_syscfg_regs->cfgchip2, + CFGCHIP2_PHY_PLLON, + CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN); + + return 0; +} + +static const struct udevice_id da8xx_phy_ids[] = { + { .compatible = "ti,da830-usb-phy" }, + { } +}; + +static struct phy_ops da8xx_phy_ops = { + .power_on = da8xx_usb_phy_power_on, + .power_off = da8xx_usb_phy_power_off, +}; + +U_BOOT_DRIVER(da8xx_phy) = { + .name = "da8xx-usb-phy", + .id = UCLASS_PHY, + .of_match = da8xx_phy_ids, + .ops = &da8xx_phy_ops, +}; From patchwork Wed Jul 10 18:59:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 1130541 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DtTUl44u"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45kTC71CW3z9s4V for ; Thu, 11 Jul 2019 05:04:51 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D0772C21DD9; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id m10sm5006203ioj.75.2019.07.10.11.59.30 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 11:59:30 -0700 (PDT) From: Adam Ford To: u-boot@lists.denx.de Date: Wed, 10 Jul 2019 13:59:10 -0500 Message-Id: <20190710185911.6983-2-aford173@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190710185911.6983-1-aford173@gmail.com> References: <20190710185911.6983-1-aford173@gmail.com> Cc: marex@denx.de, adam.ford@logicpd.com Subject: [U-Boot] [PATCH V2 2/3] usb: musb-new: Add support for da8xx-musb X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" With the recently added phy driver, this patch will enable the musb driver on the da8xx to operate in host mode. Signed-off-by: Adam Ford Reviewed-by: Marek Vasut --- drivers/usb/musb-new/Kconfig | 8 + drivers/usb/musb-new/Makefile | 1 + drivers/usb/musb-new/da8xx.c | 350 ++++++++++++++++++++++++++++++++++ 3 files changed, 359 insertions(+) V2: Remove poorly formatted comments. Remove dead code. Point to new PHY driver. diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig index 75005ccdd1..79ad14ef66 100644 --- a/drivers/usb/musb-new/Kconfig +++ b/drivers/usb/musb-new/Kconfig @@ -18,6 +18,14 @@ config USB_MUSB_GADGET help Enables the MUSB USB dual-role controller in gadget mode. +config USB_MUSB_DA8XX + bool "Enable DA8xx MUSB Controller" + depends on DM_USB + help + Say y here to enable support for the dual role high + speed USB controller based on the Mentor Graphics + silicon IP. + config USB_MUSB_TI bool "Enable TI OTG USB controller" depends on DM_USB diff --git a/drivers/usb/musb-new/Makefile b/drivers/usb/musb-new/Makefile index 4eca0e5631..ec7852ce94 100644 --- a/drivers/usb/musb-new/Makefile +++ b/drivers/usb/musb-new/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_USB_MUSB_GADGET) += musb_gadget.o musb_gadget_ep0.o musb_core.o obj-$(CONFIG_USB_MUSB_GADGET) += musb_uboot.o obj-$(CONFIG_USB_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o +obj-$(CONFIG_USB_MUSB_DA8XX) += da8xx.o obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o diff --git a/drivers/usb/musb-new/da8xx.c b/drivers/usb/musb-new/da8xx.c new file mode 100644 index 0000000000..40fe4d72e4 --- /dev/null +++ b/drivers/usb/musb-new/da8xx.c @@ -0,0 +1,350 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Texas Instruments da8xx "glue layer" + * + * Copyright (c) 2019, by Texas Instruments + * + * Based on the DA8xx "glue layer" code. + * Copyright (c) 2008-2019, MontaVista Software, Inc. + * + * DT support + * Copyright (c) 2016 Petr Kulhavy + * This file is part of the Inventra Controller Driver for Linux. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "linux-compat.h" +#include "musb_core.h" +#include "musb_uboot.h" + +/* USB 2.0 OTG module registers */ +#define DA8XX_USB_REVISION_REG 0x00 +#define DA8XX_USB_CTRL_REG 0x04 +#define DA8XX_USB_STAT_REG 0x08 +#define DA8XX_USB_EMULATION_REG 0x0c +#define DA8XX_USB_SRP_FIX_TIME_REG 0x18 +#define DA8XX_USB_INTR_SRC_REG 0x20 +#define DA8XX_USB_INTR_SRC_SET_REG 0x24 +#define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28 +#define DA8XX_USB_INTR_MASK_REG 0x2c +#define DA8XX_USB_INTR_MASK_SET_REG 0x30 +#define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34 +#define DA8XX_USB_INTR_SRC_MASKED_REG 0x38 +#define DA8XX_USB_END_OF_INTR_REG 0x3c +#define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2)) + +/* Control register bits */ +#define DA8XX_SOFT_RESET_MASK 1 + +#define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */ +#define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */ + +/* USB interrupt register bits */ +#define DA8XX_INTR_USB_SHIFT 16 +#define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */ + /* interrupts and DRVVBUS interrupt */ +#define DA8XX_INTR_DRVVBUS 0x100 +#define DA8XX_INTR_RX_SHIFT 8 +#define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT) +#define DA8XX_INTR_TX_SHIFT 0 +#define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT) + +#define DA8XX_MENTOR_CORE_OFFSET 0x400 + +static irqreturn_t da8xx_musb_interrupt(int irq, void *hci) +{ + struct musb *musb = hci; + void __iomem *reg_base = musb->ctrl_base; + unsigned long flags; + irqreturn_t ret = IRQ_NONE; + u32 status; + + spin_lock_irqsave(&musb->lock, flags); + + /* + * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through + * the Mentor registers (except for setup), use the TI ones and EOI. + */ + + /* Acknowledge and handle non-CPPI interrupts */ + status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG); + if (!status) + goto eoi; + + musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status); + dev_dbg(musb->controller, "USB IRQ %08x\n", status); + + musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT; + musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT; + musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT; + + /* + * DRVVBUS IRQs are the only proxy we have (a very poor one!) for + * DA8xx's missing ID change IRQ. We need an ID change IRQ to + * switch appropriately between halves of the OTG state machine. + * Managing DEVCTL.Session per Mentor docs requires that we know its + * value but DEVCTL.BDevice is invalid without DEVCTL.Session set. + * Also, DRVVBUS pulses for SRP (but not at 5 V)... + */ + if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) { + int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG); + void __iomem *mregs = musb->mregs; + u8 devctl = musb_readb(mregs, MUSB_DEVCTL); + int err; + + err = musb->int_usb & MUSB_INTR_VBUSERROR; + if (err) { + /* + * The Mentor core doesn't debounce VBUS as needed + * to cope with device connect current spikes. This + * means it's not uncommon for bus-powered devices + * to get VBUS errors during enumeration. + * + * This is a workaround, but newer RTL from Mentor + * seems to allow a better one: "re"-starting sessions + * without waiting for VBUS to stop registering in + * devctl. + */ + musb->int_usb &= ~MUSB_INTR_VBUSERROR; + WARNING("VBUS error workaround (delay coming)\n"); + } else if (drvvbus) { + MUSB_HST_MODE(musb); + musb->port1_status |= USB_PORT_STAT_POWER; + } else if (!(musb->int_usb & MUSB_INTR_BABBLE)) { + /* + * When babble condition happens, drvvbus interrupt + * is also generated. Ignore this drvvbus interrupt + * and let babble interrupt handler recovers the + * controller; otherwise, the host-mode flag is lost + * due to the MUSB_DEV_MODE() call below and babble + * recovery logic will not be called. + */ + musb->is_active = 0; + MUSB_DEV_MODE(musb); + musb->port1_status &= ~USB_PORT_STAT_POWER; + } + ret = IRQ_HANDLED; + } + + if (musb->int_tx || musb->int_rx || musb->int_usb) + ret |= musb_interrupt(musb); +eoi: + /* EOI needs to be written for the IRQ to be re-asserted. */ + if (ret == IRQ_HANDLED || status) + musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); + + spin_unlock_irqrestore(&musb->lock, flags); + + return ret; +} + +static int da8xx_musb_init(struct musb *musb) +{ + u32 revision; + void __iomem *reg_base = musb->ctrl_base; + + int ret; + + /* reset the controller */ + writel(0x1, &da8xx_usb_regs->control); + udelay(50); + + /* Returns zero if e.g. not clocked */ + revision = readl(&da8xx_usb_regs->revision); + if (revision == 0) + return -ENODEV; + + /* Disable all interrupts */ + writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK | + DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set); + + musb->mregs += DA8XX_MENTOR_CORE_OFFSET; + + /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */ + debug("DA8xx OTG revision %08x, control %02x\n", revision, + musb_readb(reg_base, DA8XX_USB_CTRL_REG)); + + musb->isr = da8xx_musb_interrupt; + return 0; +} + +static int da8xx_musb_exit(struct musb *musb) +{ + /* flush any interrupts */ + writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK | + DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr); + writel(0, &da8xx_usb_regs->eoi); + + return 0; +} + +/** + * da8xx_musb_enable - enable interrupts + */ +static int da8xx_musb_enable(struct musb *musb) +{ + void __iomem *reg_base = musb->ctrl_base; + u32 mask; + + /* Workaround: setup IRQs through both register sets. */ + mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) | + ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) | + DA8XX_INTR_USB_MASK; + musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask); + + /* Force the DRVVBUS IRQ so we can start polling for ID change. */ + musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG, + DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT); + + return 0; +} + +/** + * da8xx_musb_disable - disable HDRC and flush interrupts + */ +static void da8xx_musb_disable(struct musb *musb) +{ + void __iomem *reg_base = musb->ctrl_base; + + musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG, + DA8XX_INTR_USB_MASK | + DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK); + musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); +} + +void da8xx_musb_reset(struct udevice *dev) +{ + void *reg_base = dev_read_addr_ptr(dev); + + /* Reset the controller */ + musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK); +} + +void da8xx_musb_clear_irq(struct udevice *dev) +{ + /* flush any interrupts */ + writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK | + DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr); + writel(0, &da8xx_usb_regs->eoi); +} + +const struct musb_platform_ops da8xx_ops = { + .init = da8xx_musb_init, + .exit = da8xx_musb_exit, + .enable = da8xx_musb_enable, + .disable = da8xx_musb_disable, +}; + +struct da8xx_musb_platdata { + void *base; + void *ctrl_mod_base; + struct musb_hdrc_platform_data plat; + struct musb_hdrc_config musb_config; + struct omap_musb_board_data otg_board_data; + struct phy phy; +}; + +static int da8xx_musb_ofdata_to_platdata(struct udevice *dev) +{ + struct da8xx_musb_platdata *platdata = dev_get_platdata(dev); + const void *fdt = gd->fdt_blob; + int node = dev_of_offset(dev); + + platdata->base = (void *)dev_read_addr_ptr(dev); + platdata->musb_config.multipoint = 1; + platdata->musb_config.dyn_fifo = 1; + platdata->musb_config.num_eps = 5; + platdata->musb_config.ram_bits = 10; + platdata->plat.power = fdtdec_get_int(fdt, node, "power", 50); + platdata->otg_board_data.interface_type = MUSB_INTERFACE_UTMI; + platdata->plat.mode = MUSB_HOST; + platdata->otg_board_data.dev = dev; + platdata->plat.config = &platdata->musb_config; + platdata->plat.platform_ops = &da8xx_ops; + platdata->plat.board_data = &platdata->otg_board_data; + platdata->otg_board_data.clear_irq = da8xx_musb_clear_irq; + platdata->otg_board_data.reset = da8xx_musb_reset; + return 0; +} + +static int da8xx_musb_probe(struct udevice *dev) +{ + struct musb_host_data *host = dev_get_priv(dev); + struct da8xx_musb_platdata *platdata = dev_get_platdata(dev); + struct usb_bus_priv *priv = dev_get_uclass_priv(dev); + struct omap_musb_board_data *otg_board_data; + int ret; + void *base = dev_read_addr_ptr(dev); + + /* Get the phy info from the device tree */ + ret = generic_phy_get_by_name(dev, "usb-phy", &platdata->phy); + if (ret) + return ret; + + /* Initialize the phy */ + ret = generic_phy_init(&platdata->phy); + if (ret) + return ret; + + /* enable psc for usb2.0 */ + lpsc_on(33); + + /* Enable phy */ + generic_phy_power_on(&platdata->phy); + + priv->desc_before_addr = true; + otg_board_data = &platdata->otg_board_data; + + host->host = musb_init_controller(&platdata->plat, + (struct device *)otg_board_data, + platdata->base); + if (!host->host) { + ret = -ENODEV; + goto shutdown; /* Shutdown what we started */ + } + + ret = musb_lowlevel_init(host); + + if (ret == 0) + return 0; +shutdown: + /* Turn off the phy if we fail */ + generic_phy_power_off(&platdata->phy); + lpsc_disable(33); + return ret; +} + +static int da8xx_musb_remove(struct udevice *dev) +{ + struct musb_host_data *host = dev_get_priv(dev); + + musb_stop(host->host); + + return 0; +} + +static const struct udevice_id da8xx_musb_ids[] = { + { .compatible = "ti,da830-musb" }, + { } +}; + +U_BOOT_DRIVER(da8xx_musb) = { + .name = "da8xx-musb", + .id = UCLASS_USB, + .of_match = da8xx_musb_ids, + .ofdata_to_platdata = da8xx_musb_ofdata_to_platdata, + .probe = da8xx_musb_probe, + .remove = da8xx_musb_remove, + .ops = &musb_usb_ops, + .platdata_auto_alloc_size = sizeof(struct da8xx_musb_platdata), + .priv_auto_alloc_size = sizeof(struct musb_host_data), +}; From patchwork Wed Jul 10 18:59:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 1130543 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id m10sm5006203ioj.75.2019.07.10.11.59.35 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 10 Jul 2019 11:59:35 -0700 (PDT) From: Adam Ford To: u-boot@lists.denx.de Date: Wed, 10 Jul 2019 13:59:11 -0500 Message-Id: <20190710185911.6983-3-aford173@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190710185911.6983-1-aford173@gmail.com> References: <20190710185911.6983-1-aford173@gmail.com> Cc: marex@denx.de, adam.ford@logicpd.com Subject: [U-Boot] [PATCH V2 3/3] ARM: da850-evm: Enable the USB PHY and MUSB Driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch will enable the MUSB driver to support mass storage devices connected to the OTG port in host mode. Signed-off-by: Adam Ford --- configs/da850evm_defconfig | 6 ++++++ configs/da850evm_direct_nor_defconfig | 6 ++++++ configs/da850evm_nand_defconfig | 6 ++++++ include/configs/da850evm.h | 3 --- 4 files changed, 18 insertions(+), 3 deletions(-) V2: Split off adding the da850evm configs until all other drivers have been added diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index c095058282..4e8d122752 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -61,6 +61,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y +CONFIG_PHY=y +CONFIG_PHY_DA8XX_USB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y @@ -73,5 +75,9 @@ CONFIG_DM_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_DA8XX=y +CONFIG_USB_MUSB_PIO_ONLY=y +CONFIG_USB_STORAGE=y # CONFIG_FAT_WRITE is not set CONFIG_USE_TINY_PRINTF=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 166e77b8e3..412a6d69a2 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -52,6 +52,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y +CONFIG_PHY=y +CONFIG_PHY_DA8XX_USB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_SPECIFY_CONSOLE_INDEX=y @@ -60,3 +62,7 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_DA8XX=y +CONFIG_USB_MUSB_PIO_ONLY=y +CONFIG_USB_STORAGE=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 7271016346..17a901587a 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -59,6 +59,8 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY=y +CONFIG_PHY_DA8XX_USB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y @@ -66,5 +68,9 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_DA8XX=y +CONFIG_USB_MUSB_PIO_ONLY=y +CONFIG_USB_STORAGE=y # CONFIG_FAT_WRITE is not set CONFIG_USE_TINY_PRINTF=y diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ccdac0abec..855deb5f94 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -270,10 +270,7 @@ /* USB Configs */ #define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_USB_OHCI_NEW -#define CONFIG_USB_STORAGE -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "da850evm" #ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */