From patchwork Wed Jun 26 08:17:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1122584 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-503762-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="ce1jb4Pt"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qlLFav9x"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45YbW45ssYz9s3Z for ; Wed, 26 Jun 2019 18:17:47 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:cc:content-type; q=dns; s=default; b=X4PqfFGHVMnStOn0grtqAfkqK+gy2uGFnQtkz8akyE/ QpzcBkD6cSQQcd+9Q2HMXykLQcfa3cFACLeDpLC9YlskwlXJy6X+tTkO1auNtz5h htNOn/iyWx8NID0dbX0OInfGF/kShmi1rPXq8HO41g0UWkhrm3V9lDbAny6xswYs = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:cc:content-type; s=default; bh=iPKI4IQIOOIshXDaYo9LjNkdoag=; b=ce1jb4Pt4L+VL8dW2 3sGmnKfQKKybkuaf2z3LE+NT6MlJb/dOBbRlUe6xLIkgwmJHqAwPPjDDrxf4YUQG APxzWhEHk4O7o2JjWMMBD2OW7otXjCRHSh62TyFQHdGlRRRyT3eDvTR2fk5G+ICZ G4yIraiElywm3vabY3Tz+1XtBA= Received: (qmail 21752 invoked by alias); 26 Jun 2019 08:17:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 21743 invoked by uid 89); 26 Jun 2019 08:17:41 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-14.9 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mail-io1-f50.google.com Received: from mail-io1-f50.google.com (HELO mail-io1-f50.google.com) (209.85.166.50) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 26 Jun 2019 08:17:39 +0000 Received: by mail-io1-f50.google.com with SMTP id e3so3032065ioc.12 for ; Wed, 26 Jun 2019 01:17:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to:cc; bh=Iq4JhNBHk766atNMEjeQH4eNIJKaj9juMceyBrF5MRI=; b=qlLFav9x2LD8Iw5PYqs/g97/eGQIcMOeYPkk1jEnIz6vjh4pKjHdq53Zyd4gb1EdyD KTFiZZW2Za8vggHtPgU6w2cdxqTaAT7HQ2etN1TxnZP/fPyyswYMNVqia60u/bk43ycX 5ejvGmYAqTdz+Kyrvc+3eQwn3iNUUe+PXJQrcSb1WhvBvlLFJHLLYeUrNypyy4wnIMNO 3p6J+/X03O0Vtk79tdUurmSIF4TEvfoYb11S78lJBmDkzRaptZcvXs43MCaDQeo6HAVL 9IdmSNCWzNFQcq2UiRyvrq+hEYxu4mQEWnHiWV4HkSj89uV1G8gPg/ssOQL9txcRs/Xk BNCw== MIME-Version: 1.0 From: Uros Bizjak Date: Wed, 26 Jun 2019 10:17:26 +0200 Message-ID: Subject: [RFC PATCH, i386]: Autovectorize 8-byte vectors To: "gcc-patches@gcc.gnu.org" Cc: Jakub Jelinek , Richard Biener Now that TARGET_MMX_WITH_SSE is implemented, the compiler should be able to auto-vectorize: void foo (char *restrict r, char *restrict a) { for (int i = 0; i < 8; i++) r[i] += a[i]; } Attached patch enables the conversion and produces: foo: movq (%rdi), %xmm1 movq (%rsi), %xmm0 paddb %xmm1, %xmm0 movq %xmm0, (%rdi) ret Please note that the patch regresses FAIL: gcc.target/i386/sse2-vect-simd-11.c scan-tree-dump-times vect "vectorized [1-3] loops" 2 FAIL: gcc.target/i386/sse2-vect-simd-15.c scan-tree-dump-times vect "vectorized [1-3] loops" 2 For some reason, the compiler decides to vectorize with 8-byte vectors, resulting in: missed: not vectorized: relevant stmt not supported: _8 = (short unsigned int) _4; missed: bad operation or unsupported loop bound. missed: couldn't vectorize loop However, the unpatched compiler is able to vectorize loop using 16-byte vectors. It looks that the compiler should re-run vectorization with wider vectors, if vectorization with narrower vectors fails. Jakub, Richard, do you have any insight in this issue? 2019-06-26 Uroš Bizjak * config/i386/i386.c (ix86_autovectorize_vector_sizes): Autovectorize 8-byte vectors for TARGET_MMX_WITH_SSE. testsuite/ChangeLog: 2019-06-26 Uroš Bizjak * lib/target-supports.exp (available_vector_sizes) <[istarget i?86-*-*] || [istarget x86_64-*-*]>: Add 64-bit vectors for !ia32. The patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1ca1712183dc..24bd0896f137 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -21401,6 +21401,9 @@ ix86_autovectorize_vector_sizes (vector_sizes *sizes, bool all) sizes->safe_push (16); sizes->safe_push (32); } + + if (TARGET_MMX_WITH_SSE) + sizes->safe_push (8); } /* Implemenation of targetm.vectorize.get_mask_mode. */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 1d4aaa2a87ec..285c32f8cebb 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6603,9 +6603,14 @@ proc available_vector_sizes { } { } elseif { [istarget arm*-*-*] && [check_effective_target_arm_neon_ok] } { lappend result 128 64 - } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*]) - && ([check_avx_available] && ![check_prefer_avx128])) } { - lappend result 256 128 + } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } { + if { [check_avx_available] && ![check_prefer_avx128] } { + lappend result 256 + } + lappend result 128 + if { ![is-effective-target ia32] } { + lappend result 64 + } } elseif { [istarget sparc*-*-*] } { lappend result 64 } else {