From patchwork Tue Jun 18 07:29:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117656 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfs21DD8z9s3l for ; Tue, 18 Jun 2019 17:31:18 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfs164SczDqfs for ; Tue, 18 Jun 2019 17:31:17 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45Sfq55hgYzDqYb for ; Tue, 18 Jun 2019 17:29:37 +1000 (AEST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SZFt134478 for ; Tue, 18 Jun 2019 03:29:36 -0400 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6qxjyjp8-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:35 -0400 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:32 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TVn838994338 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:31 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5D832B2066 for ; Tue, 18 Jun 2019 07:29:31 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DB5DFB205F for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 2B97A4E6BB3; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:09 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0060-0000-0000-00000351B1AC X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:32 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0061-0000-0000-000049CFEF2C Message-Id: <20190618072925.5299-2-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 01/17] op_display: make platform function rather than "FSP" specific X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We have an implementation for non-FSP systems now, and we shouldn't be calling that from code in an fsp/ directory, so move op_display() to a platform function. Signed-off-by: Stewart Smith --- core/platform.c | 6 ++++++ hw/fsp/fsp-op-panel.c | 6 ++---- include/fsp.h | 2 ++ include/platform.h | 8 ++++++++ platforms/astbmc/barreleye.c | 1 + platforms/astbmc/firestone.c | 1 + platforms/astbmc/garrison.c | 1 + platforms/astbmc/habanero.c | 1 + platforms/astbmc/p8dnu.c | 1 + platforms/astbmc/p8dtu.c | 2 ++ platforms/astbmc/p9dsu.c | 1 + platforms/astbmc/palmetto.c | 1 + platforms/astbmc/romulus.c | 1 + platforms/astbmc/talos.c | 1 + platforms/astbmc/vesnin.c | 1 + platforms/astbmc/witherspoon.c | 1 + platforms/astbmc/zaius.c | 1 + platforms/ibm-fsp/firenze.c | 1 + platforms/ibm-fsp/zz.c | 1 + 19 files changed, 34 insertions(+), 4 deletions(-) diff --git a/core/platform.c b/core/platform.c index afa00adf7157..efcf63d7719e 100644 --- a/core/platform.c +++ b/core/platform.c @@ -295,3 +295,9 @@ int wait_for_resource_loaded(enum resource_id id, uint32_t idx) id, idx, waited); return r; } + +void op_display(enum op_severity sev, enum op_module mod, uint16_t code) +{ + if (platform.op_display) + platform.op_display(sev, mod, code); +} diff --git a/hw/fsp/fsp-op-panel.c b/hw/fsp/fsp-op-panel.c index 6477e73c1c4d..530871f8eb35 100644 --- a/hw/fsp/fsp-op-panel.c +++ b/hw/fsp/fsp-op-panel.c @@ -49,16 +49,14 @@ static void fsp_op_display_fatal(uint32_t w0, uint32_t w1) fsp_fatal_msg(&op_msg); } -void op_display(enum op_severity sev, enum op_module mod, uint16_t code) +void fsp_op_display(enum op_severity sev, enum op_module mod, uint16_t code) { struct fsp_msg *op_msg; uint32_t w0; uint32_t w1; - if (!fsp_present()) { - op_display_lpc(sev, mod, code); + if (!fsp_present()) return; - } w0 = sev << 16 | mod; diff --git a/include/fsp.h b/include/fsp.h index cfa51afbc7c4..0df7f93f9ff5 100644 --- a/include/fsp.h +++ b/include/fsp.h @@ -853,4 +853,6 @@ extern void fsp_chiptod_init(void); /* Terminate immediate */ extern void __attribute__((noreturn)) ibm_fsp_terminate(const char *msg); +void fsp_op_display(enum op_severity sev, enum op_module mod, uint16_t code); + #endif /* __FSP_H */ diff --git a/include/platform.h b/include/platform.h index 4f8627a3a680..9a77586a9cbf 100644 --- a/include/platform.h +++ b/include/platform.h @@ -237,6 +237,14 @@ struct platform { * SEEPROM update routine */ void (*seeprom_update)(void); + + /* + * Operator Panel display + * Physical FSP op panel or LPC port 80h + * or any other "get boot status out to the user" thing. + */ + void (*op_display)(enum op_severity sev, enum op_module mod, + uint16_t code); }; extern struct platform __platforms_start; diff --git a/platforms/astbmc/barreleye.c b/platforms/astbmc/barreleye.c index 554aacf12105..6cc55370acae 100644 --- a/platforms/astbmc/barreleye.c +++ b/platforms/astbmc/barreleye.c @@ -172,4 +172,5 @@ DECLARE_PLATFORM(barreleye) = { .resource_loaded = flash_resource_loaded, .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/firestone.c b/platforms/astbmc/firestone.c index 28719e300fb0..29ee377c2df6 100644 --- a/platforms/astbmc/firestone.c +++ b/platforms/astbmc/firestone.c @@ -159,4 +159,5 @@ DECLARE_PLATFORM(firestone) = { .resource_loaded = flash_resource_loaded, .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/garrison.c b/platforms/astbmc/garrison.c index ddd33721ccfd..b931057dc740 100644 --- a/platforms/astbmc/garrison.c +++ b/platforms/astbmc/garrison.c @@ -306,4 +306,5 @@ DECLARE_PLATFORM(garrison) = { .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, .seeprom_update = astbmc_seeprom_update, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/habanero.c b/platforms/astbmc/habanero.c index ab010278a711..068c31545820 100644 --- a/platforms/astbmc/habanero.c +++ b/platforms/astbmc/habanero.c @@ -150,4 +150,5 @@ DECLARE_PLATFORM(habanero) = { .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, .seeprom_update = astbmc_seeprom_update, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/p8dnu.c b/platforms/astbmc/p8dnu.c index 391aa7a8b814..8d7d16be341e 100644 --- a/platforms/astbmc/p8dnu.c +++ b/platforms/astbmc/p8dnu.c @@ -362,4 +362,5 @@ DECLARE_PLATFORM(p8dnu) = { .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, .seeprom_update = astbmc_seeprom_update, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/p8dtu.c b/platforms/astbmc/p8dtu.c index 6f66dc22e8e7..f4a0c7fb97a5 100644 --- a/platforms/astbmc/p8dtu.c +++ b/platforms/astbmc/p8dtu.c @@ -263,6 +263,7 @@ DECLARE_PLATFORM(p8dtu1u) = { .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, .seeprom_update = astbmc_seeprom_update, + .op_display = op_display_lpc, }; DECLARE_PLATFORM(p8dtu2u) = { @@ -281,5 +282,6 @@ DECLARE_PLATFORM(p8dtu2u) = { .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, .seeprom_update = astbmc_seeprom_update, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/p9dsu.c b/platforms/astbmc/p9dsu.c index eeb8fd76284d..72645ec1c615 100644 --- a/platforms/astbmc/p9dsu.c +++ b/platforms/astbmc/p9dsu.c @@ -732,4 +732,5 @@ DECLARE_PLATFORM(p9dsu1u) = { .elog_commit = ipmi_elog_commit, .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/palmetto.c b/platforms/astbmc/palmetto.c index 29739c03b771..9136d15e9908 100644 --- a/platforms/astbmc/palmetto.c +++ b/platforms/astbmc/palmetto.c @@ -133,4 +133,5 @@ DECLARE_PLATFORM(palmetto) = { .resource_loaded = flash_resource_loaded, .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/romulus.c b/platforms/astbmc/romulus.c index 7bb07cce5363..3e4003a772e2 100644 --- a/platforms/astbmc/romulus.c +++ b/platforms/astbmc/romulus.c @@ -82,4 +82,5 @@ DECLARE_PLATFORM(romulus) = { .elog_commit = ipmi_elog_commit, .exit = astbmc_exit, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/talos.c b/platforms/astbmc/talos.c index 0dea87ef23b5..f4cbb769be0f 100644 --- a/platforms/astbmc/talos.c +++ b/platforms/astbmc/talos.c @@ -83,4 +83,5 @@ DECLARE_PLATFORM(talos) = { .elog_commit = ipmi_elog_commit, .exit = astbmc_exit, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/vesnin.c b/platforms/astbmc/vesnin.c index 47e98e7198c4..8ec1ebc62566 100644 --- a/platforms/astbmc/vesnin.c +++ b/platforms/astbmc/vesnin.c @@ -352,4 +352,5 @@ DECLARE_PLATFORM(vesnin) = { .resource_loaded = flash_resource_loaded, .exit = ipmi_wdt_final_reset, .terminate = ipmi_terminate, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/witherspoon.c b/platforms/astbmc/witherspoon.c index 52971ecfd6b6..dd53b4f72247 100644 --- a/platforms/astbmc/witherspoon.c +++ b/platforms/astbmc/witherspoon.c @@ -512,4 +512,5 @@ DECLARE_PLATFORM(witherspoon) = { .pci_get_slot_info = dt_slot_get_slot_info, .ocapi = &witherspoon_ocapi, .npu2_device_detect = witherspoon_npu2_device_detect, + .op_display = op_display_lpc, }; diff --git a/platforms/astbmc/zaius.c b/platforms/astbmc/zaius.c index 23a40725ccf8..ae8ca4bb885f 100644 --- a/platforms/astbmc/zaius.c +++ b/platforms/astbmc/zaius.c @@ -269,4 +269,5 @@ DECLARE_PLATFORM(zaius) = { .terminate = ipmi_terminate, .ocapi = &zaius_ocapi, .npu2_device_detect = npu2_i2c_presence_detect, + .op_display = op_display_lpc, }; diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index dc705466acb5..8f6a3921b2f6 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -226,4 +226,5 @@ DECLARE_PLATFORM(firenze) = { .resource_loaded = fsp_resource_loaded, .sensor_read = ibm_fsp_sensor_read, .terminate = ibm_fsp_terminate, + .op_display = fsp_op_display, }; diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 705906a041d5..09599f85e842 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -90,4 +90,5 @@ DECLARE_PLATFORM(zz) = { .terminate = ibm_fsp_terminate, .ocapi = &zz_ocapi, .npu2_device_detect = npu2_i2c_presence_detect, + .op_display = fsp_op_display, }; From patchwork Tue Jun 18 07:29:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117653 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfqf14qnz9s3l for ; Tue, 18 Jun 2019 17:30:06 +1000 (AEST) Authentication-Results: ozlabs.org; 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Tue, 18 Jun 2019 07:29:31 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CC12EBE04F for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 349FE4E6BB6; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:10 +1000 Message-Id: <20190618072925.5299-3-stewart@linux.ibm.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 02/17] Move more FSP functions to FSP platform X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/init.c | 12 ------------ platforms/ibm-fsp/common.c | 13 +++++++++++++ 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/core/init.c b/core/init.c index 3db9df314292..9990483a599b 100644 --- a/core/init.c +++ b/core/init.c @@ -558,16 +558,6 @@ void __noreturn load_and_boot_kernel(bool is_reboot) */ nvram_wait_for_load(); - /* Wait for FW VPD data read to complete */ - fsp_code_update_wait_vpd(true); - - /* - * OCC takes few secs to boot. Call this as late as - * as possible to avoid delay. - */ - if (fsp_present()) - occ_pstates_init(); - if (!occ_sensors_init()) dts_sensor_create_nodes(sensor_node); @@ -580,8 +570,6 @@ void __noreturn load_and_boot_kernel(bool is_reboot) occ_pstates_init(); } - fsp_console_select_stdout(); - /* Use nvram bootargs over device tree */ cmdline = nvram_query_safe("bootargs"); if (cmdline) { diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index a7f2beedcb78..573cd51861ee 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -180,6 +180,19 @@ void ibm_fsp_exit(void) * ensure we have all the LED information. */ create_led_device_nodes(); + + /* Wait for FW VPD data read to complete */ + fsp_code_update_wait_vpd(true); + + /* + * OCC takes few secs to boot. Call this as late as + * as possible to avoid delay. + */ + if (fsp_present()) + occ_pstates_init(); + + fsp_console_select_stdout(); + } int64_t ibm_fsp_cec_reboot(void) From patchwork Tue Jun 18 07:29:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117652 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45SfqC4lLrz9s3l for ; Tue, 18 Jun 2019 17:29:43 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45SfqC3jbBzDqcV for ; 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Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 3B9404E6BB7; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:11 +1000 Message-Id: <20190618072925.5299-4-stewart@linux.ibm.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 03/17] Split FSP OCC code out into hw/fsp/ X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- hw/fsp/Makefile.inc | 2 +- hw/fsp/fsp-occ.c | 424 ++++++++++++++++++++++++++++++++++++++++++++ hw/occ.c | 388 +--------------------------------------- 3 files changed, 426 insertions(+), 388 deletions(-) create mode 100644 hw/fsp/fsp-occ.c diff --git a/hw/fsp/Makefile.inc b/hw/fsp/Makefile.inc index 7a477db78a45..4649621ca633 100644 --- a/hw/fsp/Makefile.inc +++ b/hw/fsp/Makefile.inc @@ -5,6 +5,6 @@ FSP_OBJS += fsp-surveillance.o fsp-codeupdate.o fsp-sensor.o FSP_OBJS += fsp-diag.o fsp-leds.o fsp-mem-err.o fsp-op-panel.o FSP_OBJS += fsp-elog-read.o fsp-elog-write.o fsp-epow.o fsp-dpo.o FSP_OBJS += fsp-dump.o fsp-mdst-table.o fsp-chiptod.o fsp-ipmi.o -FSP_OBJS += fsp-attn.o +FSP_OBJS += fsp-attn.o fsp-occ.o FSP = hw/fsp/built-in.a $(FSP): $(FSP_OBJS:%=hw/fsp/%) diff --git a/hw/fsp/fsp-occ.c b/hw/fsp/fsp-occ.c new file mode 100644 index 000000000000..6286078c3fb1 --- /dev/null +++ b/hw/fsp/fsp-occ.c @@ -0,0 +1,424 @@ +/* Copyright 2013-2019 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DEFINE_LOG_ENTRY(OPAL_RC_OCC_LOAD, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, + OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_GENERAL, + OPAL_NA); + +DEFINE_LOG_ENTRY(OPAL_RC_OCC_RESET, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, + OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_GENERAL, + OPAL_NA); + +struct occ_load_req { + u8 scope; + u32 dbob_id; + u32 seq_id; + struct list_node link; +}; +static LIST_HEAD(occ_load_req_list); + + +static void occ_queue_load(u8 scope, u32 dbob_id, u32 seq_id) +{ + struct occ_load_req *occ_req; + + occ_req = zalloc(sizeof(struct occ_load_req)); + if (!occ_req) { + /** + * @fwts-label OCCload_reqENOMEM + * @fwts-advice ENOMEM while allocating OCC load message. + * OCCs not started, consequently no power/frequency scaling + * will be functional. + */ + prlog(PR_ERR, "OCC: Could not allocate occ_load_req\n"); + return; + } + + occ_req->scope = scope; + occ_req->dbob_id = dbob_id; + occ_req->seq_id = seq_id; + list_add_tail(&occ_load_req_list, &occ_req->link); +} + +static void __occ_do_load(u8 scope, u32 dbob_id __unused, u32 seq_id) +{ + struct fsp_msg *stat; + int rc = -ENOMEM; + int status_word = 0; + struct proc_chip *chip = next_chip(NULL); + + /* Call HBRT... */ + rc = host_services_occ_load(); + + /* Handle fallback to preload */ + if (rc == -ENOENT && chip->homer_base) { + prlog(PR_INFO, "OCC: Load: Fallback to preloaded image\n"); + rc = 0; + } else if (!rc) { + struct opal_occ_msg occ_msg = { CPU_TO_BE64(OCC_LOAD), 0, 0 }; + + rc = _opal_queue_msg(OPAL_MSG_OCC, NULL, NULL, + sizeof(struct opal_occ_msg), &occ_msg); + if (rc) + prlog(PR_INFO, "OCC: Failed to queue message %d\n", + OCC_LOAD); + + /* Success, start OCC */ + rc = host_services_occ_start(); + } + if (rc) { + /* If either of hostservices call fail, send fail to FSP */ + /* Find a chip ID to send failure */ + for_each_chip(chip) { + if (scope == 0x01 && dbob_id != chip->dbob_id) + continue; + status_word = 0xB500 | (chip->pcid & 0xff); + break; + } + log_simple_error(&e_info(OPAL_RC_OCC_LOAD), + "OCC: Error %d in load/start OCC\n", rc); + } + + /* Send a single response for all chips */ + stat = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, status_word, seq_id); + if (stat) + rc = fsp_queue_msg(stat, fsp_freemsg); + if (rc) { + log_simple_error(&e_info(OPAL_RC_OCC_LOAD), + "OCC: Error %d queueing FSP OCC LOAD STATUS msg", rc); + fsp_freemsg(stat); + } +} + +void occ_poke_load_queue(void) +{ + struct occ_load_req *occ_req, *next; + + if (list_empty(&occ_load_req_list)) + return; + + list_for_each_safe(&occ_load_req_list, occ_req, next, link) { + __occ_do_load(occ_req->scope, occ_req->dbob_id, + occ_req->seq_id); + list_del(&occ_req->link); + free(occ_req); + } +} + +static u32 last_seq_id; +static bool in_ipl = true; +static void occ_do_load(u8 scope, u32 dbob_id __unused, u32 seq_id) +{ + struct fsp_msg *rsp; + int rc = -ENOMEM; + u8 err = 0; + + if (scope != 0x01 && scope != 0x02) { + /** + * @fwts-label OCCLoadInvalidScope + * @fwts-advice Invalid request for loading OCCs. Power and + * frequency management not functional + */ + prlog(PR_ERR, "OCC: Load message with invalid scope 0x%x\n", + scope); + err = 0x22; + } + + /* First queue up an OK response to the load message itself */ + rsp = fsp_mkmsg(FSP_RSP_LOAD_OCC | err, 0); + if (rsp) + rc = fsp_queue_msg(rsp, fsp_freemsg); + if (rc) { + log_simple_error(&e_info(OPAL_RC_OCC_LOAD), + "OCC: Error %d queueing FSP OCC LOAD reply\n", rc); + fsp_freemsg(rsp); + return; + } + + if (err) + return; + + if (proc_gen == proc_gen_p9) { + if (in_ipl) { + /* OCC is pre-loaded in P9, so send SUCCESS to FSP */ + rsp = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, 0, seq_id); + if (!rsp) + return; + + rc = fsp_queue_msg(rsp, fsp_freemsg); + if (rc) { + log_simple_error(&e_info(OPAL_RC_OCC_LOAD), + "OCC: Error %d queueing OCC LOAD STATUS msg", + rc); + fsp_freemsg(rsp); + } + in_ipl = false; + } else { + struct proc_chip *chip = next_chip(NULL); + + last_seq_id = seq_id; + prd_fsp_occ_load_start(chip->id); + } + return; + } + + /* + * Check if hostservices lid caching is complete. If not, queue + * the load request. + */ + if (!hservices_lid_preload_complete()) { + occ_queue_load(scope, dbob_id, seq_id); + return; + } + + __occ_do_load(scope, dbob_id, seq_id); +} + +int fsp_occ_reset_status(u64 chipid, s64 status) +{ + struct fsp_msg *stat; + int rc = OPAL_NO_MEM; + int status_word = 0; + + prlog(PR_INFO, "HBRT: OCC stop() completed with %lld\n", status); + + if (status) { + struct proc_chip *chip = get_chip(chipid); + + if (!chip) + return OPAL_PARAMETER; + + status_word = 0xfe00 | (chip->pcid & 0xff); + log_simple_error(&e_info(OPAL_RC_OCC_RESET), + "OCC: Error %lld in OCC reset of chip %lld\n", + status, chipid); + } else { + occ_msg_queue_occ_reset(); + } + + stat = fsp_mkmsg(FSP_CMD_RESET_OCC_STAT, 2, status_word, last_seq_id); + if (!stat) + return rc; + + rc = fsp_queue_msg(stat, fsp_freemsg); + if (rc) { + fsp_freemsg(stat); + log_simple_error(&e_info(OPAL_RC_OCC_RESET), + "OCC: Error %d queueing FSP OCC RESET STATUS message\n", + rc); + } + return rc; +} + +int fsp_occ_load_start_status(u64 chipid, s64 status) +{ + struct fsp_msg *stat; + int rc = OPAL_NO_MEM; + int status_word = 0; + + if (status) { + struct proc_chip *chip = get_chip(chipid); + + if (!chip) + return OPAL_PARAMETER; + + status_word = 0xB500 | (chip->pcid & 0xff); + log_simple_error(&e_info(OPAL_RC_OCC_LOAD), + "OCC: Error %d in load/start OCC %lld\n", rc, + chipid); + } + + stat = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, status_word, last_seq_id); + if (!stat) + return rc; + + rc = fsp_queue_msg(stat, fsp_freemsg); + if (rc) { + fsp_freemsg(stat); + log_simple_error(&e_info(OPAL_RC_OCC_LOAD), + "OCC: Error %d queueing FSP OCC LOAD STATUS msg", rc); + } + + return rc; +} + +static void occ_do_reset(u8 scope, u32 dbob_id, u32 seq_id) +{ + struct fsp_msg *rsp, *stat; + struct proc_chip *chip = next_chip(NULL); + int rc = -ENOMEM; + u8 err = 0; + + /* Check arguments */ + if (scope != 0x01 && scope != 0x02) { + /** + * @fwts-label OCCResetInvalidScope + * @fwts-advice Invalid request for resetting OCCs. Power and + * frequency management not functional + */ + prlog(PR_ERR, "OCC: Reset message with invalid scope 0x%x\n", + scope); + err = 0x22; + } + + /* First queue up an OK response to the reset message itself */ + rsp = fsp_mkmsg(FSP_RSP_RESET_OCC | err, 0); + if (rsp) + rc = fsp_queue_msg(rsp, fsp_freemsg); + if (rc) { + fsp_freemsg(rsp); + log_simple_error(&e_info(OPAL_RC_OCC_RESET), + "OCC: Error %d queueing FSP OCC RESET reply\n", rc); + return; + } + + /* If we had an error, return */ + if (err) + return; + + /* + * Call HBRT to stop OCC and leave it stopped. FSP will send load/start + * request subsequently. Also after few runtime restarts (currently 3), + * FSP will request OCC to left in stopped state. + */ + + switch (proc_gen) { + case proc_gen_p8: + rc = host_services_occ_stop(); + break; + case proc_gen_p9: + last_seq_id = seq_id; + chip = next_chip(NULL); + prd_fsp_occ_reset(chip->id); + return; + default: + return; + } + + /* Handle fallback to preload */ + if (rc == -ENOENT && chip->homer_base) { + prlog(PR_INFO, "OCC: Reset: Fallback to preloaded image\n"); + rc = 0; + } + if (!rc) { + /* Send a single success response for all chips */ + stat = fsp_mkmsg(FSP_CMD_RESET_OCC_STAT, 2, 0, seq_id); + if (stat) + rc = fsp_queue_msg(stat, fsp_freemsg); + if (rc) { + fsp_freemsg(stat); + log_simple_error(&e_info(OPAL_RC_OCC_RESET), + "OCC: Error %d queueing FSP OCC RESET" + " STATUS message\n", rc); + } + occ_msg_queue_occ_reset(); + } else { + + /* + * Then send a matching OCC Reset Status message with an 0xFE + * (fail) response code as well to the first matching chip + */ + for_each_chip(chip) { + if (scope == 0x01 && dbob_id != chip->dbob_id) + continue; + rc = -ENOMEM; + stat = fsp_mkmsg(FSP_CMD_RESET_OCC_STAT, 2, + 0xfe00 | (chip->pcid & 0xff), seq_id); + if (stat) + rc = fsp_queue_msg(stat, fsp_freemsg); + if (rc) { + fsp_freemsg(stat); + log_simple_error(&e_info(OPAL_RC_OCC_RESET), + "OCC: Error %d queueing FSP OCC RESET" + " STATUS message\n", rc); + } + break; + } + } +} + +static bool fsp_occ_msg(u32 cmd_sub_mod, struct fsp_msg *msg) +{ + u32 dbob_id, seq_id; + u8 scope; + + switch (cmd_sub_mod) { + case FSP_CMD_LOAD_OCC: + /* + * We get the "Load OCC" command at boot. We don't currently + * support loading it ourselves (we don't have the procedures, + * they will come with Host Services). For now HostBoot will + * have loaded a OCC firmware for us, but we still need to + * be nice and respond to OCC. + */ + scope = msg->data.bytes[3]; + dbob_id = msg->data.words[1]; + seq_id = msg->data.words[2]; + prlog(PR_INFO, "OCC: Got OCC Load message, scope=0x%x" + " dbob=0x%x seq=0x%x\n", scope, dbob_id, seq_id); + occ_do_load(scope, dbob_id, seq_id); + return true; + + case FSP_CMD_RESET_OCC: + /* + * We shouldn't be getting this one, but if we do, we have + * to reply something sensible or the FSP will get upset + */ + scope = msg->data.bytes[3]; + dbob_id = msg->data.words[1]; + seq_id = msg->data.words[2]; + prlog(PR_INFO, "OCC: Got OCC Reset message, scope=0x%x" + " dbob=0x%x seq=0x%x\n", scope, dbob_id, seq_id); + occ_do_reset(scope, dbob_id, seq_id); + return true; + } + return false; +} + +static struct fsp_client fsp_occ_client = { + .message = fsp_occ_msg, +}; + +void occ_fsp_init(void) +{ + /* OCC is supported in P8 and P9 */ + if (proc_gen < proc_gen_p8) + return; + + /* If we have an FSP, register for notifications */ + if (fsp_present()) + fsp_register_client(&fsp_occ_client, FSP_MCLASS_OCC); +} diff --git a/hw/occ.c b/hw/occ.c index 4e9783934a62..161fe8480bd4 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include @@ -33,6 +32,7 @@ #include #include #include +#include /* OCC Communication Area for PStates */ @@ -265,14 +265,6 @@ static bool occ_reset; static struct lock occ_lock = LOCK_UNLOCKED; static unsigned long homer_opal_data_offset; -DEFINE_LOG_ENTRY(OPAL_RC_OCC_LOAD, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, - OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_GENERAL, - OPAL_NA); - -DEFINE_LOG_ENTRY(OPAL_RC_OCC_RESET, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, - OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_GENERAL, - OPAL_NA); - DEFINE_LOG_ENTRY(OPAL_RC_OCC_PSTATE_INIT, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, OPAL_CEC_HARDWARE, OPAL_INFO, OPAL_NA); @@ -1849,14 +1841,6 @@ void occ_pstates_init(void) dt_add_property_cells(power_mgt, "domain-runs-at", domain_runs_at); } -struct occ_load_req { - u8 scope; - u32 dbob_id; - u32 seq_id; - struct list_node link; -}; -static LIST_HEAD(occ_load_req_list); - int find_master_and_slave_occ(uint64_t **master, uint64_t **slave, int *nr_masters, int *nr_slaves) { @@ -1901,161 +1885,6 @@ int find_master_and_slave_occ(uint64_t **master, uint64_t **slave, return 0; } -static void occ_queue_load(u8 scope, u32 dbob_id, u32 seq_id) -{ - struct occ_load_req *occ_req; - - occ_req = zalloc(sizeof(struct occ_load_req)); - if (!occ_req) { - /** - * @fwts-label OCCload_reqENOMEM - * @fwts-advice ENOMEM while allocating OCC load message. - * OCCs not started, consequently no power/frequency scaling - * will be functional. - */ - prlog(PR_ERR, "OCC: Could not allocate occ_load_req\n"); - return; - } - - occ_req->scope = scope; - occ_req->dbob_id = dbob_id; - occ_req->seq_id = seq_id; - list_add_tail(&occ_load_req_list, &occ_req->link); -} - -static void __occ_do_load(u8 scope, u32 dbob_id __unused, u32 seq_id) -{ - struct fsp_msg *stat; - int rc = -ENOMEM; - int status_word = 0; - struct proc_chip *chip = next_chip(NULL); - - /* Call HBRT... */ - rc = host_services_occ_load(); - - /* Handle fallback to preload */ - if (rc == -ENOENT && chip->homer_base) { - prlog(PR_INFO, "OCC: Load: Fallback to preloaded image\n"); - rc = 0; - } else if (!rc) { - struct opal_occ_msg occ_msg = { CPU_TO_BE64(OCC_LOAD), 0, 0 }; - - rc = _opal_queue_msg(OPAL_MSG_OCC, NULL, NULL, - sizeof(struct opal_occ_msg), &occ_msg); - if (rc) - prlog(PR_INFO, "OCC: Failed to queue message %d\n", - OCC_LOAD); - - /* Success, start OCC */ - rc = host_services_occ_start(); - } - if (rc) { - /* If either of hostservices call fail, send fail to FSP */ - /* Find a chip ID to send failure */ - for_each_chip(chip) { - if (scope == 0x01 && dbob_id != chip->dbob_id) - continue; - status_word = 0xB500 | (chip->pcid & 0xff); - break; - } - log_simple_error(&e_info(OPAL_RC_OCC_LOAD), - "OCC: Error %d in load/start OCC\n", rc); - } - - /* Send a single response for all chips */ - stat = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, status_word, seq_id); - if (stat) - rc = fsp_queue_msg(stat, fsp_freemsg); - if (rc) { - log_simple_error(&e_info(OPAL_RC_OCC_LOAD), - "OCC: Error %d queueing FSP OCC LOAD STATUS msg", rc); - fsp_freemsg(stat); - } -} - -void occ_poke_load_queue(void) -{ - struct occ_load_req *occ_req, *next; - - if (list_empty(&occ_load_req_list)) - return; - - list_for_each_safe(&occ_load_req_list, occ_req, next, link) { - __occ_do_load(occ_req->scope, occ_req->dbob_id, - occ_req->seq_id); - list_del(&occ_req->link); - free(occ_req); - } -} - -static u32 last_seq_id; -static bool in_ipl = true; -static void occ_do_load(u8 scope, u32 dbob_id __unused, u32 seq_id) -{ - struct fsp_msg *rsp; - int rc = -ENOMEM; - u8 err = 0; - - if (scope != 0x01 && scope != 0x02) { - /** - * @fwts-label OCCLoadInvalidScope - * @fwts-advice Invalid request for loading OCCs. Power and - * frequency management not functional - */ - prlog(PR_ERR, "OCC: Load message with invalid scope 0x%x\n", - scope); - err = 0x22; - } - - /* First queue up an OK response to the load message itself */ - rsp = fsp_mkmsg(FSP_RSP_LOAD_OCC | err, 0); - if (rsp) - rc = fsp_queue_msg(rsp, fsp_freemsg); - if (rc) { - log_simple_error(&e_info(OPAL_RC_OCC_LOAD), - "OCC: Error %d queueing FSP OCC LOAD reply\n", rc); - fsp_freemsg(rsp); - return; - } - - if (err) - return; - - if (proc_gen == proc_gen_p9) { - if (in_ipl) { - /* OCC is pre-loaded in P9, so send SUCCESS to FSP */ - rsp = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, 0, seq_id); - if (!rsp) - return; - - rc = fsp_queue_msg(rsp, fsp_freemsg); - if (rc) { - log_simple_error(&e_info(OPAL_RC_OCC_LOAD), - "OCC: Error %d queueing OCC LOAD STATUS msg", - rc); - fsp_freemsg(rsp); - } - in_ipl = false; - } else { - struct proc_chip *chip = next_chip(NULL); - - last_seq_id = seq_id; - prd_fsp_occ_load_start(chip->id); - } - return; - } - - /* - * Check if hostservices lid caching is complete. If not, queue - * the load request. - */ - if (!hservices_lid_preload_complete()) { - occ_queue_load(scope, dbob_id, seq_id); - return; - } - - __occ_do_load(scope, dbob_id, seq_id); -} int occ_msg_queue_occ_reset(void) { @@ -2089,169 +1918,6 @@ out: return rc; } -int fsp_occ_reset_status(u64 chipid, s64 status) -{ - struct fsp_msg *stat; - int rc = OPAL_NO_MEM; - int status_word = 0; - - prlog(PR_INFO, "HBRT: OCC stop() completed with %lld\n", status); - - if (status) { - struct proc_chip *chip = get_chip(chipid); - - if (!chip) - return OPAL_PARAMETER; - - status_word = 0xfe00 | (chip->pcid & 0xff); - log_simple_error(&e_info(OPAL_RC_OCC_RESET), - "OCC: Error %lld in OCC reset of chip %lld\n", - status, chipid); - } else { - occ_msg_queue_occ_reset(); - } - - stat = fsp_mkmsg(FSP_CMD_RESET_OCC_STAT, 2, status_word, last_seq_id); - if (!stat) - return rc; - - rc = fsp_queue_msg(stat, fsp_freemsg); - if (rc) { - fsp_freemsg(stat); - log_simple_error(&e_info(OPAL_RC_OCC_RESET), - "OCC: Error %d queueing FSP OCC RESET STATUS message\n", - rc); - } - return rc; -} - -int fsp_occ_load_start_status(u64 chipid, s64 status) -{ - struct fsp_msg *stat; - int rc = OPAL_NO_MEM; - int status_word = 0; - - if (status) { - struct proc_chip *chip = get_chip(chipid); - - if (!chip) - return OPAL_PARAMETER; - - status_word = 0xB500 | (chip->pcid & 0xff); - log_simple_error(&e_info(OPAL_RC_OCC_LOAD), - "OCC: Error %d in load/start OCC %lld\n", rc, - chipid); - } - - stat = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, status_word, last_seq_id); - if (!stat) - return rc; - - rc = fsp_queue_msg(stat, fsp_freemsg); - if (rc) { - fsp_freemsg(stat); - log_simple_error(&e_info(OPAL_RC_OCC_LOAD), - "OCC: Error %d queueing FSP OCC LOAD STATUS msg", rc); - } - - return rc; -} - -static void occ_do_reset(u8 scope, u32 dbob_id, u32 seq_id) -{ - struct fsp_msg *rsp, *stat; - struct proc_chip *chip = next_chip(NULL); - int rc = -ENOMEM; - u8 err = 0; - - /* Check arguments */ - if (scope != 0x01 && scope != 0x02) { - /** - * @fwts-label OCCResetInvalidScope - * @fwts-advice Invalid request for resetting OCCs. Power and - * frequency management not functional - */ - prlog(PR_ERR, "OCC: Reset message with invalid scope 0x%x\n", - scope); - err = 0x22; - } - - /* First queue up an OK response to the reset message itself */ - rsp = fsp_mkmsg(FSP_RSP_RESET_OCC | err, 0); - if (rsp) - rc = fsp_queue_msg(rsp, fsp_freemsg); - if (rc) { - fsp_freemsg(rsp); - log_simple_error(&e_info(OPAL_RC_OCC_RESET), - "OCC: Error %d queueing FSP OCC RESET reply\n", rc); - return; - } - - /* If we had an error, return */ - if (err) - return; - - /* - * Call HBRT to stop OCC and leave it stopped. FSP will send load/start - * request subsequently. Also after few runtime restarts (currently 3), - * FSP will request OCC to left in stopped state. - */ - - switch (proc_gen) { - case proc_gen_p8: - rc = host_services_occ_stop(); - break; - case proc_gen_p9: - last_seq_id = seq_id; - chip = next_chip(NULL); - prd_fsp_occ_reset(chip->id); - return; - default: - return; - } - - /* Handle fallback to preload */ - if (rc == -ENOENT && chip->homer_base) { - prlog(PR_INFO, "OCC: Reset: Fallback to preloaded image\n"); - rc = 0; - } - if (!rc) { - /* Send a single success response for all chips */ - stat = fsp_mkmsg(FSP_CMD_RESET_OCC_STAT, 2, 0, seq_id); - if (stat) - rc = fsp_queue_msg(stat, fsp_freemsg); - if (rc) { - fsp_freemsg(stat); - log_simple_error(&e_info(OPAL_RC_OCC_RESET), - "OCC: Error %d queueing FSP OCC RESET" - " STATUS message\n", rc); - } - occ_msg_queue_occ_reset(); - } else { - - /* - * Then send a matching OCC Reset Status message with an 0xFE - * (fail) response code as well to the first matching chip - */ - for_each_chip(chip) { - if (scope == 0x01 && dbob_id != chip->dbob_id) - continue; - rc = -ENOMEM; - stat = fsp_mkmsg(FSP_CMD_RESET_OCC_STAT, 2, - 0xfe00 | (chip->pcid & 0xff), seq_id); - if (stat) - rc = fsp_queue_msg(stat, fsp_freemsg); - if (rc) { - fsp_freemsg(stat); - log_simple_error(&e_info(OPAL_RC_OCC_RESET), - "OCC: Error %d queueing FSP OCC RESET" - " STATUS message\n", rc); - } - break; - } - } -} - #define PV_OCC_GP0 0x01000000 #define PV_OCC_GP0_AND 0x01000004 #define PV_OCC_GP0_OR 0x01000005 @@ -2280,47 +1946,6 @@ void occ_pnor_set_owner(enum pnor_owner owner) occ_pnor_set_one_owner(chip->id, owner); } -static bool fsp_occ_msg(u32 cmd_sub_mod, struct fsp_msg *msg) -{ - u32 dbob_id, seq_id; - u8 scope; - - switch (cmd_sub_mod) { - case FSP_CMD_LOAD_OCC: - /* - * We get the "Load OCC" command at boot. We don't currently - * support loading it ourselves (we don't have the procedures, - * they will come with Host Services). For now HostBoot will - * have loaded a OCC firmware for us, but we still need to - * be nice and respond to OCC. - */ - scope = msg->data.bytes[3]; - dbob_id = msg->data.words[1]; - seq_id = msg->data.words[2]; - prlog(PR_INFO, "OCC: Got OCC Load message, scope=0x%x" - " dbob=0x%x seq=0x%x\n", scope, dbob_id, seq_id); - occ_do_load(scope, dbob_id, seq_id); - return true; - - case FSP_CMD_RESET_OCC: - /* - * We shouldn't be getting this one, but if we do, we have - * to reply something sensible or the FSP will get upset - */ - scope = msg->data.bytes[3]; - dbob_id = msg->data.words[1]; - seq_id = msg->data.words[2]; - prlog(PR_INFO, "OCC: Got OCC Reset message, scope=0x%x" - " dbob=0x%x seq=0x%x\n", scope, dbob_id, seq_id); - occ_do_reset(scope, dbob_id, seq_id); - return true; - } - return false; -} - -static struct fsp_client fsp_occ_client = { - .message = fsp_occ_msg, -}; #define P8_OCB_OCI_OCCMISC 0x6a020 #define P8_OCB_OCI_OCCMISC_AND 0x6a021 @@ -2454,14 +2079,3 @@ void occ_p9_interrupt(uint32_t chip_id) xscom_write(chip_id, P9_OCB_OCI_OCCMISC_OR, OCB_OCI_OCIMISC_IRQ); } - -void occ_fsp_init(void) -{ - /* OCC is supported in P8 and P9 */ - if (proc_gen < proc_gen_p8) - return; - - /* If we have an FSP, register for notifications */ - if (fsp_present()) - fsp_register_client(&fsp_occ_client, FSP_MCLASS_OCC); -} From patchwork Tue Jun 18 07:29:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117668 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfwv3Glfz9s4V for ; Tue, 18 Jun 2019 17:34:39 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfwv2NQVzDqn2 for ; Tue, 18 Jun 2019 17:34:39 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45SfqD2ML8zDqfZ for ; Tue, 18 Jun 2019 17:29:44 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SsvY046464 for ; Tue, 18 Jun 2019 03:29:42 -0400 Received: from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6rncwrqw-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:38 -0400 Received: from localhost by e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 18 Jun 2019 08:29:34 +0100 Received: from b03cxnp08027.gho.boulder.ibm.com (9.17.130.19) by e32.co.us.ibm.com (192.168.1.132) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:32 +0100 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TVA810944886 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:31 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0E652BE05F for ; Tue, 18 Jun 2019 07:29:31 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D471FBE059 for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:30 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 412AE4E6BB8; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:12 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0004-0000-0000-0000151DAC55 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:33 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0005-0000-0000-00008C200E53 Message-Id: <20190618072925.5299-5-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 04/17] Move core/hostservices.c to platforms/ibm-fsp/ X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" It's only used on FSP systems so should really just be part of that platform support. Signed-off-by: Stewart Smith --- core/Makefile.inc | 2 +- hw/occ.c | 1 - include/hostservices.h | 2 -- include/occ.h | 2 ++ platforms/ibm-fsp/Makefile.inc | 3 +-- {core => platforms/ibm-fsp}/hostservices.c | 0 6 files changed, 4 insertions(+), 6 deletions(-) rename {core => platforms/ibm-fsp}/hostservices.c (100%) diff --git a/core/Makefile.inc b/core/Makefile.inc index 21c12fb8db31..64aa43ca213f 100644 --- a/core/Makefile.inc +++ b/core/Makefile.inc @@ -5,7 +5,7 @@ CORE_OBJS = relocate.o console.o stack.o init.o chip.o mem_region.o CORE_OBJS += malloc.o lock.o cpu.o utils.o fdt.o opal.o interrupts.o timebase.o CORE_OBJS += opal-msg.o pci.o pci-virt.o pci-slot.o pcie-slot.o CORE_OBJS += pci-opal.o fast-reboot.o device.o exceptions.o trace.o affinity.o -CORE_OBJS += vpd.o hostservices.o platform.o nvram.o nvram-format.o hmi.o +CORE_OBJS += vpd.o platform.o nvram.o nvram-format.o hmi.o CORE_OBJS += console-log.o ipmi.o time-utils.o pel.o pool.o errorlog.o CORE_OBJS += timer.o i2c.o rtc.o flash.o sensor.o ipmi-opal.o CORE_OBJS += flash-subpartition.o bitmap.o buddy.o pci-quirk.o powercap.o psr.o diff --git a/hw/occ.c b/hw/occ.c index 161fe8480bd4..2ebf141797a2 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/include/hostservices.h b/include/hostservices.h index bdff9daec86e..ebd1a5899617 100644 --- a/include/hostservices.h +++ b/include/hostservices.h @@ -36,8 +36,6 @@ void host_services_occ_base_setup(void); #define HOMER_IMAGE_SIZE 0x400000 /* 4MB per-chip */ #define OCC_COMMON_SIZE 0x800000 /* 8MB */ -int find_master_and_slave_occ(uint64_t **master, uint64_t **slave, - int *nr_masters, int *nr_slaves); int hservice_send_error_log(uint32_t plid, uint32_t dsize, void *data); int hservice_wakeup(uint32_t i_core, uint32_t i_mode); int fsp_occ_reset_status(u64 chipid, s64 status); diff --git a/include/occ.h b/include/occ.h index 6b831e01cd1b..7ba6be82f10d 100644 --- a/include/occ.h +++ b/include/occ.h @@ -20,6 +20,8 @@ extern void occ_pstates_init(void); extern void occ_fsp_init(void); +int find_master_and_slave_occ(uint64_t **master, uint64_t **slave, + int *nr_masters, int *nr_slaves); /* OCC interrupt for P8 */ extern void occ_p8_interrupt(uint32_t chip_id); diff --git a/platforms/ibm-fsp/Makefile.inc b/platforms/ibm-fsp/Makefile.inc index 653222fd7263..1b751e53c705 100644 --- a/platforms/ibm-fsp/Makefile.inc +++ b/platforms/ibm-fsp/Makefile.inc @@ -1,7 +1,6 @@ SUBDIRS += $(PLATDIR)/ibm-fsp -IBM_FSP_OBJS = common.o lxvpd.o \ +IBM_FSP_OBJS = common.o lxvpd.o hostservices.o \ firenze.o firenze-pci.o zz.o IBM_FSP = $(PLATDIR)/ibm-fsp/built-in.a $(IBM_FSP): $(IBM_FSP_OBJS:%=$(PLATDIR)/ibm-fsp/%) - diff --git a/core/hostservices.c b/platforms/ibm-fsp/hostservices.c similarity index 100% rename from core/hostservices.c rename to platforms/ibm-fsp/hostservices.c From patchwork Tue Jun 18 07:29:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfw64v0Bz9s9y for ; Tue, 18 Jun 2019 17:33:58 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfw63pF2zDqjk for ; Tue, 18 Jun 2019 17:33:58 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45Sfq80201zDqbG for ; Tue, 18 Jun 2019 17:29:39 +1000 (AEST) Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SXgd124560 for ; Tue, 18 Jun 2019 03:29:38 -0400 Received: from e13.ny.us.ibm.com (e13.ny.us.ibm.com [129.33.205.203]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6tuuspcb-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:37 -0400 Received: from localhost by e13.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com [9.57.199.107]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TW0S6291986 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A29CC124052 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 621E1124053 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 49C394F249B; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:13 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0064-0000-0000-000003EF51B6 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0065-0000-0000-00003DEDC9C1 Message-Id: <20190618072925.5299-6-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=961 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 05/17] host_services_occ_base_setup is core homer code not host_services X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- hw/homer.c | 25 +++++++++++++++++++++++++ include/hostservices.h | 1 - platforms/ibm-fsp/hostservices.c | 24 ------------------------ 3 files changed, 25 insertions(+), 25 deletions(-) diff --git a/hw/homer.c b/hw/homer.c index 34ee3370d63f..964a6e05d233 100644 --- a/hw/homer.c +++ b/hw/homer.c @@ -157,6 +157,31 @@ static void homer_init_chip(struct proc_chip *chip) } } + +static void host_services_occ_base_setup(void) +{ + struct proc_chip *chip; + uint64_t occ_common; + + chip = next_chip(NULL); /* Frist chip */ + occ_common = (uint64_t) local_alloc(chip->id, OCC_COMMON_SIZE, OCC_COMMON_SIZE); + + for_each_chip(chip) { + chip->occ_common_base = occ_common; + chip->occ_common_size = OCC_COMMON_SIZE; + + chip->homer_base = (uint64_t) local_alloc(chip->id, HOMER_IMAGE_SIZE, + HOMER_IMAGE_SIZE); + chip->homer_size = HOMER_IMAGE_SIZE; + memset((void *)chip->homer_base, 0, chip->homer_size); + + prlog(PR_DEBUG, "HBRT: Chip %d HOMER base %016llx : %08llx\n", + chip->id, chip->homer_base, chip->homer_size); + prlog(PR_DEBUG, "HBRT: OCC common base %016llx : %08llx\n", + chip->occ_common_base, chip->occ_common_size); + } +} + void homer_init(void) { struct proc_chip *chip; diff --git a/include/hostservices.h b/include/hostservices.h index ebd1a5899617..06c5fe797b4f 100644 --- a/include/hostservices.h +++ b/include/hostservices.h @@ -24,7 +24,6 @@ bool hservices_lid_preload_complete(void); int host_services_occ_load(void); int host_services_occ_start(void); int host_services_occ_stop(void); -void host_services_occ_base_setup(void); /* No LID can be larger than 16M, but OCC lid is less than 1 MB */ diff --git a/platforms/ibm-fsp/hostservices.c b/platforms/ibm-fsp/hostservices.c index d515f13403f0..9de8a63b3906 100644 --- a/platforms/ibm-fsp/hostservices.c +++ b/platforms/ibm-fsp/hostservices.c @@ -735,30 +735,6 @@ out: return rc; } -void host_services_occ_base_setup(void) -{ - struct proc_chip *chip; - uint64_t occ_common; - - chip = next_chip(NULL); /* Frist chip */ - occ_common = (uint64_t) local_alloc(chip->id, OCC_COMMON_SIZE, OCC_COMMON_SIZE); - - for_each_chip(chip) { - chip->occ_common_base = occ_common; - chip->occ_common_size = OCC_COMMON_SIZE; - - chip->homer_base = (uint64_t) local_alloc(chip->id, HOMER_IMAGE_SIZE, - HOMER_IMAGE_SIZE); - chip->homer_size = HOMER_IMAGE_SIZE; - memset((void *)chip->homer_base, 0, chip->homer_size); - - prlog(PR_DEBUG, "HBRT: Chip %d HOMER base %016llx : %08llx\n", - chip->id, chip->homer_base, chip->homer_size); - prlog(PR_DEBUG, "HBRT: OCC common base %016llx : %08llx\n", - chip->occ_common_base, chip->occ_common_size); - } -} - bool hservices_init(void) { void *code = NULL; From patchwork Tue Jun 18 07:29:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117654 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45SfrF63wpz9s3l for ; Tue, 18 Jun 2019 17:30:37 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45SfrF0D12zDqYd for ; Tue, 18 Jun 2019 17:30:37 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45Sfq51PCqzDqYb for ; Tue, 18 Jun 2019 17:29:36 +1000 (AEST) Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SVdp080968 for ; Tue, 18 Jun 2019 03:29:34 -0400 Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6uhp051u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:34 -0400 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x5I6Q3OZ004452 for ; Tue, 18 Jun 2019 06:29:51 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma01dal.us.ibm.com with ESMTP id 2t4ra6hvmd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 06:29:51 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TWvZ35389882 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A326CAE05C for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 631A9AE05F for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 508494E0A4D; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:14 +1000 Message-Id: <20190618072925.5299-7-stewart@linux.ibm.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 06/17] core/init.c: use if (platform.bmc) rather than !fsp_present() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This decouples FSP platform from core skiboot logic by using this small hack that may/may not be a good idea (although is already used elsewhere, so at least we're consistent). Signed-off-by: Stewart Smith --- core/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/core/init.c b/core/init.c index 9990483a599b..39e3faa3c99a 100644 --- a/core/init.c +++ b/core/init.c @@ -1205,7 +1205,7 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt) * OCC initialisation as late as possible to give it the * maximum time to boot up. */ - if (!fsp_present()) + if (platform.bmc) occ_pstates_init(); pci_nvram_init(); From patchwork Tue Jun 18 07:29:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117662 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfth5wGVz9sBp for ; Tue, 18 Jun 2019 17:32:44 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfth31glzDqMg for ; Tue, 18 Jun 2019 17:32:44 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45Sfq71NzHzDqbm for ; Tue, 18 Jun 2019 17:29:38 +1000 (AEST) Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SWVo038641 for ; Tue, 18 Jun 2019 03:29:37 -0400 Received: from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6u8n0vje-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:37 -0400 Received: from localhost by e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TWRr19661196 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id ADC2DB2064 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6DFDDB2065 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 5625F4FE486; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:15 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-2213-0000-0000-000003A05CC0 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000775; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-2214-0000-0000-00005EE5E7E9 Message-Id: <20190618072925.5299-8-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=915 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 07/17] core/init.c: no longer need to include FSP headers X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/init.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/core/init.c b/core/init.c index 39e3faa3c99a..55b562059247 100644 --- a/core/init.c +++ b/core/init.c @@ -15,8 +15,6 @@ */ #include -#include -#include #include #include #include From patchwork Tue Jun 18 07:29:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117667 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45SfwX11hDz9s5c for ; Tue, 18 Jun 2019 17:34:20 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45SfwW5kdFzDqgC for ; Tue, 18 Jun 2019 17:34:19 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45SfqB18XPzDqYb for ; Tue, 18 Jun 2019 17:29:41 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7Sv8W046726 for ; Tue, 18 Jun 2019 03:29:39 -0400 Received: from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6rncwrs1-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:36 -0400 Received: from localhost by e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b03ledav003.gho.boulder.ibm.com (b03ledav003.gho.boulder.ibm.com [9.17.130.234]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TWfk33882386 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8900A6A057 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 51C4C6A04F for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav003.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 5ADBA503F72; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:16 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0004-0000-0000-0000151DAC57 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0005-0000-0000-00008C200E59 Message-Id: <20190618072925.5299-9-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 08/17] Move FSP specific op-panel calls to platform.exit() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We move the platform exit call much closer to executing the kernel, which should all be safe, and in fact a much better time to do watchdog related things. Signed-off-by: Stewart Smith --- core/init.c | 13 +++---------- platforms/ibm-fsp/common.c | 4 ++++ 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/core/init.c b/core/init.c index 55b562059247..c2b7b70a69f4 100644 --- a/core/init.c +++ b/core/init.c @@ -534,9 +534,6 @@ void __noreturn load_and_boot_kernel(bool is_reboot) op_display(OP_LOG, OP_MOD_INIT, 0x000A); - if (platform.exit) - platform.exit(); - /* Load kernel LID */ if (!load_kernel()) { op_display(OP_FATAL, OP_MOD_INIT, 1); @@ -590,13 +587,6 @@ void __noreturn load_and_boot_kernel(bool is_reboot) op_display(OP_LOG, OP_MOD_INIT, 0x000C); - /* Start the kernel */ - if (!is_reboot) - op_panel_disable_src_echo(); - - /* Clear SRCs on the op-panel when Linux starts */ - op_panel_clear_src(); - mem_dump_free(); /* Dump the selected console */ @@ -611,6 +601,9 @@ void __noreturn load_and_boot_kernel(bool is_reboot) assert(0); } + if (platform.exit) + platform.exit(); + /* Take processors out of nap */ cpu_set_sreset_enable(false); cpu_set_ipi_enable(false); diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index 573cd51861ee..97fba33aff59 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -193,6 +193,10 @@ void ibm_fsp_exit(void) fsp_console_select_stdout(); + op_panel_disable_src_echo(); + + /* Clear SRCs on the op-panel when Linux starts */ + op_panel_clear_src(); } int64_t ibm_fsp_cec_reboot(void) From patchwork Tue Jun 18 07:29:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117663 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfv845VSz9s4V for ; Tue, 18 Jun 2019 17:33:08 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfv602VdzDqJh for ; Tue, 18 Jun 2019 17:33:06 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45Sfq72RNMzDqbr for ; Tue, 18 Jun 2019 17:29:39 +1000 (AEST) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SXYK141685 for ; Tue, 18 Jun 2019 03:29:36 -0400 Received: from e31.co.us.ibm.com (e31.co.us.ibm.com [32.97.110.149]) by mx0b-001b2d01.pphosted.com with ESMTP id 2t6rxxncqv-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:36 -0400 Received: from localhost by e31.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TW0N29491502 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 967A7C6057 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F4CAC605A for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 60BC250D300; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:17 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-8235-0000-0000-00000EAA025B X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-8236-0000-0000-0000460F1B7F Message-Id: <20190618072925.5299-10-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 09/17] core/opal: move HIR trigger to FSP poller X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/opal.c | 14 -------------- hw/fsp/fsp.c | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/core/opal.c b/core/opal.c index 3a2fbb95b05d..650811642590 100644 --- a/core/opal.c +++ b/core/opal.c @@ -53,12 +53,6 @@ static uint64_t opal_dynamic_events; extern uint32_t attn_trigger; extern uint32_t hir_trigger; -/* We make this look like a Surveillance error, even though it really - * isn't one. - */ -DEFINE_LOG_ENTRY(OPAL_INJECTED_HIR, OPAL_MISC_ERR_EVT, OPAL_SURVEILLANCE, - OPAL_SURVEILLANCE_ERR, OPAL_PREDICTIVE_ERR_GENERAL, - OPAL_MISCELLANEOUS_INFO_ONLY); void opal_table_init(void) { @@ -637,14 +631,6 @@ static int64_t opal_poll_events(__be64 *outstanding_event_mask) assert(false); } - /* Test the host initiated reset */ - if (hir_trigger == 0xdeadbeef) { - uint32_t plid = log_simple_error(&e_info(OPAL_INJECTED_HIR), - "SURV: Injected HIR, initiating FSP R/R\n"); - fsp_trigger_reset(plid); - hir_trigger = 0; - } - opal_run_pollers(); if (outstanding_event_mask) diff --git a/hw/fsp/fsp.c b/hw/fsp/fsp.c index aa393c719cd4..4415ab5a5952 100644 --- a/hw/fsp/fsp.c +++ b/hw/fsp/fsp.c @@ -38,6 +38,8 @@ #include #include +extern uint32_t hir_trigger; + DEFINE_LOG_ENTRY(OPAL_RC_FSP_POLL_TIMEOUT, OPAL_PLATFORM_ERR_EVT, OPAL_FSP, OPAL_PLATFORM_FIRMWARE, OPAL_RECOVERED_ERR_GENERAL, OPAL_NA); @@ -47,6 +49,13 @@ DEFINE_LOG_ENTRY(OPAL_RC_FSP_MBOX_ERR, OPAL_PLATFORM_ERR_EVT, OPAL_FSP, DEFINE_LOG_ENTRY(OPAL_RC_FSP_DISR_HIR_MASK, OPAL_PLATFORM_ERR_EVT, OPAL_FSP, OPAL_PLATFORM_FIRMWARE, OPAL_RECOVERED_ERR_GENERAL, OPAL_NA); +/* We make this look like a Surveillance error, even though it really + * isn't one. + */ +DEFINE_LOG_ENTRY(OPAL_INJECTED_HIR, OPAL_MISC_ERR_EVT, OPAL_SURVEILLANCE, + OPAL_SURVEILLANCE_ERR, OPAL_PREDICTIVE_ERR_GENERAL, + OPAL_MISCELLANEOUS_INFO_ONLY); + #define FSP_TRACE_MSG #define FSP_TRACE_EVENT @@ -2026,6 +2035,14 @@ static void fsp_create_fsp(struct dt_node *fsp_node) static void fsp_opal_poll(void *data __unused) { + /* Test the host initiated reset */ + if (hir_trigger == 0xdeadbeef) { + uint32_t plid = log_simple_error(&e_info(OPAL_INJECTED_HIR), + "SURV: Injected HIR, initiating FSP R/R\n"); + fsp_trigger_reset(plid); + hir_trigger = 0; + } + if (try_lock(&fsp_lock)) { __fsp_poll(false); unlock(&fsp_lock); From patchwork Tue Jun 18 07:29:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfsw1QtBz9s3l for ; Tue, 18 Jun 2019 17:32:04 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfsw0LCVzDqgW for ; Tue, 18 Jun 2019 17:32:04 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TWkS35193228 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E10DBE058 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 57024BE04F for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 665E650D301; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:18 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0012-0000-0000-000017451375 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0013-0000-0000-000057BB5242 Message-Id: <20190618072925.5299-11-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=731 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 10/17] hw/fsp/fsp.c: remove lying comments X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- hw/fsp/fsp.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/hw/fsp/fsp.c b/hw/fsp/fsp.c index 4415ab5a5952..456099f48357 100644 --- a/hw/fsp/fsp.c +++ b/hw/fsp/fsp.c @@ -14,15 +14,6 @@ * limitations under the License. */ -/* - * Service Processor handling code - * - * XXX This mixes PSI and FSP and currently only supports - * P7/P7+ PSI and FSP1 - * - * If we are going to support P8 PSI and FSP2, we probably want - * to split the PSI support from the FSP support proper first. - */ #include #include #include From patchwork Tue Jun 18 07:29:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfrk2sqMz9s3l for ; Tue, 18 Jun 2019 17:31:02 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfrk10l6zDqgD for ; Tue, 18 Jun 2019 17:31:02 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b03ledav003.gho.boulder.ibm.com (b03ledav003.gho.boulder.ibm.com [9.17.130.234]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TWTQ16843140 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B5B2D6A04D for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7D7456A05F for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav003.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 6B2CD4C79C3; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:19 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-8235-0000-0000-00000EAA025C X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000775; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:35 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-8236-0000-0000-0000460F1B80 Message-Id: <20190618072925.5299-12-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 11/17] core/pci: use !platform.bmc hack over fsp_present() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/pci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/core/pci.c b/core/pci.c index af9df7083e01..e870d09b5c55 100644 --- a/core/pci.c +++ b/core/pci.c @@ -22,7 +22,6 @@ #include #include #include -#include #define MAX_PHB_ID 256 static struct phb *phbs[MAX_PHB_ID]; @@ -1461,7 +1460,7 @@ static void pci_add_loc_code(struct dt_node *np, struct pci_device *pd) /* XXX Don't do that on openpower for now, we will need to sort things * out later, otherwise the mezzanine slot on Habanero gets weird results */ - if (class == 0x02 && sub == 0x00 && fsp_present()) { + if (class == 0x02 && sub == 0x00 && !platform.bmc) { /* There's usually several spaces at the end of the property. Test for, but don't rely on, that being the case */ len = strlen(blcode); From patchwork Tue Jun 18 07:29:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117669 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45SfxB2JKHz9s4V for ; Tue, 18 Jun 2019 17:34:54 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfx974Q2zDqnF for ; Tue, 18 Jun 2019 17:34:53 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45SfqJ0RrvzDqcS for ; Tue, 18 Jun 2019 17:29:47 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7Sv8b046726 for ; Tue, 18 Jun 2019 03:29:45 -0400 Received: from e33.co.us.ibm.com (e33.co.us.ibm.com [32.97.110.151]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6rncwrrt-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:36 -0400 Received: from localhost by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:33 +0100 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TWYH30802212 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:32 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B4D6ABE05D for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7CCDEBE053 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 6F74F4C75C5; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:20 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0036-0000-0000-00000ACC8F6B X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000775; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0037-0000-0000-00004C43374C Message-Id: <20190618072925.5299-13-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 12/17] fast-reboot: move platform specific bits to a platform call X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/fast-reboot.c | 4 ++-- include/platform.h | 5 +++++ platforms/ibm-fsp/firenze.c | 1 + platforms/ibm-fsp/zz.c | 1 + 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/core/fast-reboot.c b/core/fast-reboot.c index 07f83a30f2dc..35c9a2b748c8 100644 --- a/core/fast-reboot.c +++ b/core/fast-reboot.c @@ -433,8 +433,8 @@ void __noreturn fast_reboot_entry(void) /* Start clearing memory */ start_mem_region_clear_unused(); - /* Poke the consoles (see comments in the code there) */ - fsp_console_reset(); + if (platform.fast_reboot_init) + platform.fast_reboot_init(); if (proc_gen == proc_gen_p8) { /* XXX */ diff --git a/include/platform.h b/include/platform.h index 9a77586a9cbf..1a12718fb80d 100644 --- a/include/platform.h +++ b/include/platform.h @@ -124,6 +124,11 @@ struct platform { */ void (*init)(void); + /* + * Called once every thread is back in skiboot as part of fast reboot. + */ + void (*fast_reboot_init)(void); + /* * These are used to power down and reboot the machine */ diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index 8f6a3921b2f6..578bd1547b13 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -211,6 +211,7 @@ DECLARE_PLATFORM(firenze) = { .name = "Firenze", .probe = firenze_probe, .init = firenze_init, + .fast_reboot_init = fsp_console_reset, .exit = ibm_fsp_exit, .cec_power_down = ibm_fsp_cec_power_down, .cec_reboot = ibm_fsp_cec_reboot, diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 09599f85e842..c5ce01e4edc8 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -73,6 +73,7 @@ DECLARE_PLATFORM(zz) = { .name = "ZZ", .probe = zz_probe, .init = zz_init, + .fast_reboot_init = fsp_console_reset, .exit = ibm_fsp_exit, .cec_power_down = ibm_fsp_cec_power_down, .cec_reboot = ibm_fsp_cec_reboot, From patchwork Tue Jun 18 07:29:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117665 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfvp0xCcz9s4V for ; Tue, 18 Jun 2019 17:33:42 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfvn6rnKzDqhC for ; Tue, 18 Jun 2019 17:33:41 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:34 +0100 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TXBa31064440 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:33 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0B952BE05A for ; Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9CCBBBE059 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 764634C4BC1; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:21 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0016-0000-0000-000009C345DE X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641534; IPR=6.01000775; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0017-0000-0000-000043B02FF3 Message-Id: <20190618072925.5299-14-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 13/17] Move FSP-specific VPD functionality to platforms/ibm-fsp/ X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/init.c | 1 - core/vpd.c | 143 ---------------------------- hw/phb3.c | 3 +- hw/phb4.c | 3 +- include/platform.h | 8 ++ include/vpd.h | 3 - platforms/ibm-fsp/Makefile.inc | 2 +- platforms/ibm-fsp/common.c | 2 + platforms/ibm-fsp/firenze.c | 1 + platforms/ibm-fsp/fsp-vpd.c | 165 +++++++++++++++++++++++++++++++++ platforms/ibm-fsp/ibm-fsp.h | 5 + platforms/ibm-fsp/zz.c | 1 + 12 files changed, 187 insertions(+), 150 deletions(-) create mode 100644 platforms/ibm-fsp/fsp-vpd.c diff --git a/core/init.c b/core/init.c index c2b7b70a69f4..48533a0e7f05 100644 --- a/core/init.c +++ b/core/init.c @@ -1201,7 +1201,6 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt) pci_nvram_init(); - preload_io_vpd(); preload_capp_ucode(); start_preload_kernel(); diff --git a/core/vpd.c b/core/vpd.c index 054a708dfe74..f1b6495958e2 100644 --- a/core/vpd.c +++ b/core/vpd.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #define CHECK_SPACE(_p, _n, _e) (((_e) - (_p)) >= (_n)) @@ -147,145 +146,3 @@ const void *vpd_find(const void *vpd, size_t vpd_size, p = vpd_find_keyword(p, rec_sz, keyword, sz); return p; } - -static void *vpd_lid; -static size_t vpd_lid_size; -static uint32_t vpd_lid_no; - -/* Helper to load a VPD LID. Pass a ptr to the corresponding LX keyword */ -static void *vpd_lid_preload(const uint8_t *lx) -{ - int rc; - - if (!fsp_present()) - return NULL; - - /* Now this is a guess game as we don't have the info from the - * pHyp folks. But basically, it seems to boil down to loading - * a LID whose name is 0x80e000yy where yy is the last 2 digits - * of the LX record in hex. - * - * [ Correction: After a chat with some folks, it looks like it's - * actually 4 digits, though the lid number is limited to fff - * so we weren't far off. ] - * - * For safety, we look for a matching LX record in an LXRn - * (n = lxrn argument) or in VINI if lxrn=0xff - */ - vpd_lid_no = 0x80e00000 | ((lx[6] & 0xf) << 8) | lx[7]; - - /* We don't quite know how to get to the LID directory so - * we don't know the size. Let's allocate 16K. All the VPD LIDs - * I've seen so far are much smaller. - */ -#define VPD_LID_MAX_SIZE 0x4000 - vpd_lid = malloc(VPD_LID_MAX_SIZE); - - if (!vpd_lid) { - prerror("VPD: Failed to allocate memory for LID\n"); - return NULL; - } - - /* Adjust LID number for flash side */ - vpd_lid_no = fsp_adjust_lid_side(vpd_lid_no); - printf("VPD: Trying to load VPD LID 0x%08x...\n", vpd_lid_no); - - vpd_lid_size = VPD_LID_MAX_SIZE; - - /* Load it from the FSP */ - rc = fsp_preload_lid(vpd_lid_no, vpd_lid, &vpd_lid_size); - if (rc) { - prerror("VPD: Error %d loading VPD LID\n", rc); - goto fail; - } - - return vpd_lid; - fail: - free(vpd_lid); - return NULL; -} - -void vpd_iohub_load(struct dt_node *hub_node) -{ - uint8_t record[4] = { 'L','X','R','0' }; /* not null terminated */ - const void *valid_lx; - uint8_t lx_size; - int r; - const uint32_t *p; - const uint8_t *lx; - unsigned int lxrn; - - if (!fsp_present()) - return; - - p = dt_prop_get_def(hub_node, "ibm,vpd-lx-info", NULL); - if (!p) - return; - - lxrn = p[0]; - lx = (const char *)&p[1]; - - /* verify the lid preload has started */ - if (!vpd_lid || !vpd_lid_no) { - prlog(PR_WARNING, "VPD: WARNING: Unable to load VPD lid"); - return; - } - - r = fsp_wait_lid_loaded(vpd_lid_no); - - if (r) - goto fail; - - /* Validate it */ - if (lxrn < 9) - record[3] = '0' + lxrn; - else - memcpy(record, "VINI", 4); - - valid_lx = vpd_find(vpd_lid, vpd_lid_size, record, "LX", &lx_size); - if (!valid_lx || lx_size != 8) { - prerror("VPD: Cannot find validation LX record\n"); - goto fail; - } - if (memcmp(valid_lx, lx, 8) != 0) { - prerror("VPD: LX record mismatch !\n"); - goto fail; - } - - printf("VPD: Loaded %zu bytes\n", vpd_lid_size); - - dt_add_property(hub_node, "ibm,io-vpd", vpd_lid, vpd_lid_size); - free(vpd_lid); - return; - -fail: - free(vpd_lid); - vpd_lid = NULL; - prerror("VPD: Failed to load VPD LID\n"); - return; -} - -void vpd_preload(struct dt_node *hub_node) -{ - const uint32_t *p; - const char *lxr; - - p = dt_prop_get_def(hub_node, "ibm,vpd-lx-info", NULL); - if (!p) - return; - - lxr = (const char *)&p[1]; - - vpd_lid = vpd_lid_preload(lxr); -} - -void preload_io_vpd(void) -{ - const struct dt_property *prop; - - prop = dt_find_property(dt_root, "ibm,io-vpd"); - if (!prop) { - /* LX VPD Lid not already loaded */ - vpd_preload(dt_root); - } -} diff --git a/hw/phb3.c b/hw/phb3.c index 3042c3e69cbf..f2792b601d11 100644 --- a/hw/phb3.c +++ b/hw/phb3.c @@ -4741,7 +4741,8 @@ static void phb3_create(struct dt_node *np) prop = dt_find_property(dt_root, "ibm,io-vpd"); if (!prop) { /* LX VPD Lid not already loaded */ - vpd_iohub_load(dt_root); + if (platform.vpd_iohub_load) + platform.vpd_iohub_load(dt_root); } /* Allocate the SkiBoot internal in-memory tables for the PHB */ diff --git a/hw/phb4.c b/hw/phb4.c index 9a38dc7525ef..94726ef9ed25 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -5672,7 +5672,8 @@ static void phb4_create(struct dt_node *np) prop = dt_find_property(dt_root, "ibm,io-vpd"); if (!prop) { /* LX VPD Lid not already loaded */ - vpd_iohub_load(dt_root); + if (platform.vpd_iohub_load) + platform.vpd_iohub_load(dt_root); } /* Obtain informatin about the PHB from the hardware directly */ diff --git a/include/platform.h b/include/platform.h index 1a12718fb80d..966f7041cb42 100644 --- a/include/platform.h +++ b/include/platform.h @@ -77,6 +77,8 @@ struct platform_ocapi { * brick 1 lanes */ }; +struct dt_node; + /* * Each platform can provide a set of hooks * that can affect the generic code @@ -250,6 +252,12 @@ struct platform { */ void (*op_display)(enum op_severity sev, enum op_module mod, uint16_t code); + + /* + * VPD load. + * Currently FSP specific. + */ + void (*vpd_iohub_load)(struct dt_node *hub_node); }; extern struct platform __platforms_start; diff --git a/include/vpd.h b/include/vpd.h index 688945505cc2..bf66a129864d 100644 --- a/include/vpd.h +++ b/include/vpd.h @@ -39,9 +39,6 @@ bool vpd_valid(const void *vvpd, size_t vpd_size); /* Add model property to dt_root */ void add_dtb_model(void); -void vpd_iohub_load(struct dt_node *hub_node); -void vpd_preload(struct dt_node *hub_node); - #define VPD_LOAD_LXRN_VINI 0xff diff --git a/platforms/ibm-fsp/Makefile.inc b/platforms/ibm-fsp/Makefile.inc index 1b751e53c705..fc8f03341aec 100644 --- a/platforms/ibm-fsp/Makefile.inc +++ b/platforms/ibm-fsp/Makefile.inc @@ -1,6 +1,6 @@ SUBDIRS += $(PLATDIR)/ibm-fsp -IBM_FSP_OBJS = common.o lxvpd.o hostservices.o \ +IBM_FSP_OBJS = common.o lxvpd.o hostservices.o fsp-vpd.o \ firenze.o firenze-pci.o zz.o IBM_FSP = $(PLATDIR)/ibm-fsp/built-in.a $(IBM_FSP): $(IBM_FSP_OBJS:%=$(PLATDIR)/ibm-fsp/%) diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index 97fba33aff59..3bcb45801ea8 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -170,6 +170,8 @@ void ibm_fsp_init(void) if (proc_gen >= proc_gen_p9) prd_init(); + + preload_io_vpd(); } void ibm_fsp_exit(void) diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index 578bd1547b13..43f1af9cbcd8 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -228,4 +228,5 @@ DECLARE_PLATFORM(firenze) = { .sensor_read = ibm_fsp_sensor_read, .terminate = ibm_fsp_terminate, .op_display = fsp_op_display, + .vpd_iohub_load = vpd_iohub_load, }; diff --git a/platforms/ibm-fsp/fsp-vpd.c b/platforms/ibm-fsp/fsp-vpd.c new file mode 100644 index 000000000000..9871b32d1368 --- /dev/null +++ b/platforms/ibm-fsp/fsp-vpd.c @@ -0,0 +1,165 @@ +/* Copyright 2013-2019 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "ibm-fsp.h" + +static void *vpd_lid; +static size_t vpd_lid_size; +static uint32_t vpd_lid_no; + + +void vpd_iohub_load(struct dt_node *hub_node) +{ + uint8_t record[4] = { 'L','X','R','0' }; /* not null terminated */ + const void *valid_lx; + uint8_t lx_size; + int r; + const uint32_t *p; + const uint8_t *lx; + unsigned int lxrn; + + if (!fsp_present()) + return; + + p = dt_prop_get_def(hub_node, "ibm,vpd-lx-info", NULL); + if (!p) + return; + + lxrn = p[0]; + lx = (const char *)&p[1]; + + /* verify the lid preload has started */ + if (!vpd_lid || !vpd_lid_no) { + prlog(PR_WARNING, "VPD: WARNING: Unable to load VPD lid"); + return; + } + + r = fsp_wait_lid_loaded(vpd_lid_no); + + if (r) + goto fail; + + /* Validate it */ + if (lxrn < 9) + record[3] = '0' + lxrn; + else + memcpy(record, "VINI", 4); + + valid_lx = vpd_find(vpd_lid, vpd_lid_size, record, "LX", &lx_size); + if (!valid_lx || lx_size != 8) { + prerror("VPD: Cannot find validation LX record\n"); + goto fail; + } + if (memcmp(valid_lx, lx, 8) != 0) { + prerror("VPD: LX record mismatch !\n"); + goto fail; + } + + printf("VPD: Loaded %zu bytes\n", vpd_lid_size); + + dt_add_property(hub_node, "ibm,io-vpd", vpd_lid, vpd_lid_size); + free(vpd_lid); + return; + +fail: + free(vpd_lid); + vpd_lid = NULL; + prerror("VPD: Failed to load VPD LID\n"); + return; +} + +/* Helper to load a VPD LID. Pass a ptr to the corresponding LX keyword */ +static void *vpd_lid_preload(const uint8_t *lx) +{ + int rc; + + if (!fsp_present()) + return NULL; + + /* Now this is a guess game as we don't have the info from the + * pHyp folks. But basically, it seems to boil down to loading + * a LID whose name is 0x80e000yy where yy is the last 2 digits + * of the LX record in hex. + * + * [ Correction: After a chat with some folks, it looks like it's + * actually 4 digits, though the lid number is limited to fff + * so we weren't far off. ] + * + * For safety, we look for a matching LX record in an LXRn + * (n = lxrn argument) or in VINI if lxrn=0xff + */ + vpd_lid_no = 0x80e00000 | ((lx[6] & 0xf) << 8) | lx[7]; + + /* We don't quite know how to get to the LID directory so + * we don't know the size. Let's allocate 16K. All the VPD LIDs + * I've seen so far are much smaller. + */ +#define VPD_LID_MAX_SIZE 0x4000 + vpd_lid = malloc(VPD_LID_MAX_SIZE); + + if (!vpd_lid) { + prerror("VPD: Failed to allocate memory for LID\n"); + return NULL; + } + + /* Adjust LID number for flash side */ + vpd_lid_no = fsp_adjust_lid_side(vpd_lid_no); + printf("VPD: Trying to load VPD LID 0x%08x...\n", vpd_lid_no); + + vpd_lid_size = VPD_LID_MAX_SIZE; + + /* Load it from the FSP */ + rc = fsp_preload_lid(vpd_lid_no, vpd_lid, &vpd_lid_size); + if (rc) { + prerror("VPD: Error %d loading VPD LID\n", rc); + goto fail; + } + + return vpd_lid; + fail: + free(vpd_lid); + return NULL; +} + +void vpd_preload(struct dt_node *hub_node) +{ + const uint32_t *p; + const char *lxr; + + p = dt_prop_get_def(hub_node, "ibm,vpd-lx-info", NULL); + if (!p) + return; + + lxr = (const char *)&p[1]; + + vpd_lid = vpd_lid_preload(lxr); +} + +void preload_io_vpd(void) +{ + const struct dt_property *prop; + + prop = dt_find_property(dt_root, "ibm,io-vpd"); + if (!prop) { + /* LX VPD Lid not already loaded */ + vpd_preload(dt_root); + } +} diff --git a/platforms/ibm-fsp/ibm-fsp.h b/platforms/ibm-fsp/ibm-fsp.h index 6c1997809266..5466775277cf 100644 --- a/platforms/ibm-fsp/ibm-fsp.h +++ b/platforms/ibm-fsp/ibm-fsp.h @@ -43,4 +43,9 @@ extern void firenze_pci_setup_phb(struct phb *phb, extern void firenze_pci_get_slot_info(struct phb *phb, struct pci_device *pd); +/* VPD support */ +void vpd_iohub_load(struct dt_node *hub_node); +void vpd_preload(struct dt_node *hub_node); + + #endif /* __IBM_FSP_COMMON_H */ diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index c5ce01e4edc8..ac3e1c926cbb 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -92,4 +92,5 @@ DECLARE_PLATFORM(zz) = { .ocapi = &zz_ocapi, .npu2_device_detect = npu2_i2c_presence_detect, .op_display = fsp_op_display, + .vpd_iohub_load = vpd_iohub_load, }; From patchwork Tue Jun 18 07:29:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117658 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Sfsg0mjYz9s3l for ; Tue, 18 Jun 2019 17:31:51 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Sfsf72kVzDqfb for ; Tue, 18 Jun 2019 17:31:50 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45Sfq62cf6zDqYd for ; Tue, 18 Jun 2019 17:29:38 +1000 (AEST) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I7SXTP034560 for ; Tue, 18 Jun 2019 03:29:36 -0400 Received: from e35.co.us.ibm.com (e35.co.us.ibm.com [32.97.110.153]) by mx0a-001b2d01.pphosted.com with ESMTP id 2t6t8qtxhu-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 18 Jun 2019 03:29:35 -0400 Received: from localhost by e35.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:34 +0100 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TXKC27066672 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:33 GMT Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E250E78064 for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AB8567805E for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:32 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 7C5004C4BC4; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:22 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0012-0000-0000-000017451376 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0013-0000-0000-000057BB5243 Message-Id: <20190618072925.5299-15-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=945 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 14/17] core/timer: Use platform heartmeat_time call for FSP platforms X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- core/timer.c | 2 +- platforms/ibm-fsp/common.c | 6 ++++++ platforms/ibm-fsp/firenze.c | 1 + platforms/ibm-fsp/ibm-fsp.h | 3 +++ platforms/ibm-fsp/zz.c | 1 + 5 files changed, 12 insertions(+), 1 deletion(-) diff --git a/core/timer.c b/core/timer.c index 1c539517839e..8f754cd480dc 100644 --- a/core/timer.c +++ b/core/timer.c @@ -278,7 +278,7 @@ void late_init_timers(void) heartbeat = platform.heartbeat_time(); } else if (p9_sbe_timer_ok()) { heartbeat = HEARTBEAT_DEFAULT_MS * 10; - } else if (p8_sbe_timer_ok() || fsp_present()) { + } else if (p8_sbe_timer_ok()) { heartbeat = HEARTBEAT_DEFAULT_MS * 10; } diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index 3bcb45801ea8..055a75ce2119 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -255,3 +255,9 @@ int64_t ibm_fsp_sensor_read(uint32_t sensor_hndl, int token, { return fsp_opal_read_sensor(sensor_hndl, token, sensor_data); } + +int __attrconst fsp_heartbeat_time(void) +{ + /* Same as core/timer.c HEARTBEAT_DEFAULT_MS * 10 */ + return 200 * 10; +} diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index 43f1af9cbcd8..1aedc0576632 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -229,4 +229,5 @@ DECLARE_PLATFORM(firenze) = { .terminate = ibm_fsp_terminate, .op_display = fsp_op_display, .vpd_iohub_load = vpd_iohub_load, + .heartbeat_time = fsp_heartbeat_time, }; diff --git a/platforms/ibm-fsp/ibm-fsp.h b/platforms/ibm-fsp/ibm-fsp.h index 5466775277cf..c67202669a09 100644 --- a/platforms/ibm-fsp/ibm-fsp.h +++ b/platforms/ibm-fsp/ibm-fsp.h @@ -47,5 +47,8 @@ extern void firenze_pci_get_slot_info(struct phb *phb, void vpd_iohub_load(struct dt_node *hub_node); void vpd_preload(struct dt_node *hub_node); +/* Platform heartbeat time */ +int fsp_heartbeat_time(void); + #endif /* __IBM_FSP_COMMON_H */ diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index ac3e1c926cbb..87d06417d02f 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -93,4 +93,5 @@ DECLARE_PLATFORM(zz) = { .npu2_device_detect = npu2_i2c_presence_detect, .op_display = fsp_op_display, .vpd_iohub_load = vpd_iohub_load, + .heartbeat_time = fsp_heartbeat_time, }; From patchwork Tue Jun 18 07:29:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117664 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45SfvR60f4z9s5c for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 18 Jun 2019 08:29:34 +0100 Received: from b03ledav003.gho.boulder.ibm.com (b03ledav003.gho.boulder.ibm.com [9.17.130.234]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5I7TXla24838642 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 18 Jun 2019 07:29:34 GMT Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D1A646A05A for ; Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6E1AB6A04D for ; Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav003.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 815B54C4BC7; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:23 +1000 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19061807-0004-0000-0000-0000151DAC58 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011283; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01219633; UDB=6.00641533; IPR=6.01000774; MB=3.00027356; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-18 07:29:35 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19061807-0005-0000-0000-00008C200E5B Message-Id: <20190618072925.5299-16-stewart@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 15/17] Separate FSP specific PSI code X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- hw/fsp/Makefile.inc | 2 +- hw/fsp/fsp-psi.c | 97 +++++++++++++++++++++++++++++++++++++ hw/psi.c | 94 ++++------------------------------- include/platform.h | 15 ++++++ include/psi.h | 2 +- platforms/ibm-fsp/common.c | 14 ++++++ platforms/ibm-fsp/firenze.c | 1 + platforms/ibm-fsp/ibm-fsp.h | 1 + platforms/ibm-fsp/zz.c | 1 + 9 files changed, 140 insertions(+), 87 deletions(-) create mode 100644 hw/fsp/fsp-psi.c diff --git a/hw/fsp/Makefile.inc b/hw/fsp/Makefile.inc index 4649621ca633..bcb3f3b95528 100644 --- a/hw/fsp/Makefile.inc +++ b/hw/fsp/Makefile.inc @@ -5,6 +5,6 @@ FSP_OBJS += fsp-surveillance.o fsp-codeupdate.o fsp-sensor.o FSP_OBJS += fsp-diag.o fsp-leds.o fsp-mem-err.o fsp-op-panel.o FSP_OBJS += fsp-elog-read.o fsp-elog-write.o fsp-epow.o fsp-dpo.o FSP_OBJS += fsp-dump.o fsp-mdst-table.o fsp-chiptod.o fsp-ipmi.o -FSP_OBJS += fsp-attn.o fsp-occ.o +FSP_OBJS += fsp-attn.o fsp-occ.o fsp-psi.o FSP = hw/fsp/built-in.a $(FSP): $(FSP_OBJS:%=hw/fsp/%) diff --git a/hw/fsp/fsp-psi.c b/hw/fsp/fsp-psi.c new file mode 100644 index 000000000000..6c2d4bf70a5a --- /dev/null +++ b/hw/fsp/fsp-psi.c @@ -0,0 +1,97 @@ +/* Copyright 2013-2014 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include + +static void psi_tce_enable(struct psi *psi, bool enable) +{ + void *addr; + u64 val; + + switch (proc_gen) { + case proc_gen_p8: + case proc_gen_p9: + addr = psi->regs + PSIHB_PHBSCR; + break; + default: + prerror("%s: Unknown CPU type\n", __func__); + return; + } + + val = in_be64(addr); + if (enable) + val |= PSIHB_CR_TCE_ENABLE; + else + val &= ~PSIHB_CR_TCE_ENABLE; + out_be64(addr, val); +} + +/* + * Configure the PSI interface for communicating with + * an FSP, such as enabling the TCEs, FSP commands, + * etc... + */ +void psi_init_for_fsp(struct psi *psi) +{ + uint64_t reg; + bool enable_tce = true; + + lock(&psi_lock); + + /* Disable and setup TCE base address */ + psi_tce_enable(psi, false); + + switch (proc_gen) { + case proc_gen_p8: + case proc_gen_p9: + out_be64(psi->regs + PSIHB_TAR, PSI_TCE_TABLE_BASE | + PSIHB_TAR_256K_ENTRIES); + break; + default: + enable_tce = false; + }; + + /* Enable various other configuration register bits based + * on what pHyp does. We keep interrupts disabled until + * after the mailbox has been properly configured. We assume + * basic stuff such as PSI link enable is already there. + * + * - FSP CMD Enable + * - FSP MMIO Enable + * - TCE Enable + * - Error response enable + * + * Clear all other error bits + */ + if (!psi->active) { + prerror("PSI: psi_init_for_fsp() called on inactive link!\n"); + unlock(&psi_lock); + return; + } + + reg = in_be64(psi->regs + PSIHB_CR); + reg |= PSIHB_CR_FSP_CMD_ENABLE; + reg |= PSIHB_CR_FSP_MMIO_ENABLE; + reg |= PSIHB_CR_FSP_ERR_RSP_ENABLE; + reg &= ~0x00000000ffffffffull; + out_be64(psi->regs + PSIHB_CR, reg); + psi_tce_enable(psi, enable_tce); + + unlock(&psi_lock); +} diff --git a/hw/psi.c b/hw/psi.c index 5435c4655c2b..3b6ade1858d1 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -45,7 +45,7 @@ static bool psi_ext_irq_policy = EXTERNAL_IRQ_POLICY_LINUX; static void psi_activate_phb(struct psi *psi); -static struct lock psi_lock = LOCK_UNLOCKED; +struct lock psi_lock = LOCK_UNLOCKED; DEFINE_LOG_ENTRY(OPAL_RC_PSI_TIMEOUT, OPAL_PLATFORM_ERR_EVT, OPAL_PSI, OPAL_PLATFORM_FIRMWARE, @@ -199,7 +199,8 @@ static void psi_link_poll(void *data __unused) psi_activate_phb(psi); psi_set_link_polling(false); unlock(&psi_lock); - fsp_reinit_fsp(); + if (platform.psi && platform.psi->link_established) + platform.psi->link_established(); return; } } @@ -333,14 +334,14 @@ static void psihb_interrupt(struct irq_source *is, uint32_t isn __unused) */ if (!psi->active) psi_spurious_fsp_irq(psi); - else - fsp_interrupt(); + else { + if (platform.psi && platform.psi->fsp_interrupt) + platform.psi->fsp_interrupt(); + } } - /* Poll the console buffers on any interrupt since we don't - * get send notifications - */ - fsp_console_poll(NULL); + if (platform.psi && platform.psi->psihb_interrupt) + platform.psi->psihb_interrupt(); } @@ -627,83 +628,6 @@ static const struct irq_source_ops psi_p9_irq_ops = { .name = psi_p9_irq_name, }; -static void psi_tce_enable(struct psi *psi, bool enable) -{ - void *addr; - u64 val; - - switch (proc_gen) { - case proc_gen_p8: - case proc_gen_p9: - addr = psi->regs + PSIHB_PHBSCR; - break; - default: - prerror("%s: Unknown CPU type\n", __func__); - return; - } - - val = in_be64(addr); - if (enable) - val |= PSIHB_CR_TCE_ENABLE; - else - val &= ~PSIHB_CR_TCE_ENABLE; - out_be64(addr, val); -} - -/* - * Configure the PSI interface for communicating with - * an FSP, such as enabling the TCEs, FSP commands, - * etc... - */ -void psi_init_for_fsp(struct psi *psi) -{ - uint64_t reg; - bool enable_tce = true; - - lock(&psi_lock); - - /* Disable and setup TCE base address */ - psi_tce_enable(psi, false); - - switch (proc_gen) { - case proc_gen_p8: - case proc_gen_p9: - out_be64(psi->regs + PSIHB_TAR, PSI_TCE_TABLE_BASE | - PSIHB_TAR_256K_ENTRIES); - break; - default: - enable_tce = false; - }; - - /* Enable various other configuration register bits based - * on what pHyp does. We keep interrupts disabled until - * after the mailbox has been properly configured. We assume - * basic stuff such as PSI link enable is already there. - * - * - FSP CMD Enable - * - FSP MMIO Enable - * - TCE Enable - * - Error response enable - * - * Clear all other error bits - */ - if (!psi->active) { - prerror("PSI: psi_init_for_fsp() called on inactive link!\n"); - unlock(&psi_lock); - return; - } - - reg = in_be64(psi->regs + PSIHB_CR); - reg |= PSIHB_CR_FSP_CMD_ENABLE; - reg |= PSIHB_CR_FSP_MMIO_ENABLE; - reg |= PSIHB_CR_FSP_ERR_RSP_ENABLE; - reg &= ~0x00000000ffffffffull; - out_be64(psi->regs + PSIHB_CR, reg); - psi_tce_enable(psi, enable_tce); - - unlock(&psi_lock); -} - void psi_set_external_irq_policy(bool policy) { psi_ext_irq_policy = policy; diff --git a/include/platform.h b/include/platform.h index 966f7041cb42..f17847ac0d60 100644 --- a/include/platform.h +++ b/include/platform.h @@ -79,6 +79,16 @@ struct platform_ocapi { struct dt_node; +/* + * Just for FSP platforms, allows us to partly decouple + * FSP specific code from core code. + */ +struct platform_psi { + void (*psihb_interrupt)(void); + void (*link_established)(void); + void (*fsp_interrupt)(void); +}; + /* * Each platform can provide a set of hooks * that can affect the generic code @@ -93,6 +103,11 @@ struct platform { */ const struct bmc_platform *bmc; + /* + * PSI handling code. FSP specific. + */ + const struct platform_psi *psi; + /* OpenCAPI platform-specific I2C information */ const struct platform_ocapi *ocapi; diff --git a/include/psi.h b/include/psi.h index ad56ce17eabd..1aca1afd1a02 100644 --- a/include/psi.h +++ b/include/psi.h @@ -273,6 +273,6 @@ extern void psi_fsp_link_in_use(struct psi *psi); #define EXTERNAL_IRQ_POLICY_SKIBOOT true extern void psi_set_external_irq_policy(bool policy); - +extern struct lock psi_lock; #endif /* __PSI_H */ diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index 055a75ce2119..ba20d5070353 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -261,3 +261,17 @@ int __attrconst fsp_heartbeat_time(void) /* Same as core/timer.c HEARTBEAT_DEFAULT_MS * 10 */ return 200 * 10; } + +static void fsp_psihb_interrupt(void) +{ + /* Poll the console buffers on any interrupt since we don't + * get send notifications + */ + fsp_console_poll(NULL); +} + +struct platform_psi fsp_platform_psi = { + .psihb_interrupt = fsp_psihb_interrupt, + .link_established = fsp_reinit_fsp, + .fsp_interrupt = fsp_interrupt, +}; diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index 1aedc0576632..6c25023235e7 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -209,6 +209,7 @@ static void firenze_init(void) DECLARE_PLATFORM(firenze) = { .name = "Firenze", + .psi = &fsp_platform_psi, .probe = firenze_probe, .init = firenze_init, .fast_reboot_init = fsp_console_reset, diff --git a/platforms/ibm-fsp/ibm-fsp.h b/platforms/ibm-fsp/ibm-fsp.h index c67202669a09..66139f0c06de 100644 --- a/platforms/ibm-fsp/ibm-fsp.h +++ b/platforms/ibm-fsp/ibm-fsp.h @@ -50,5 +50,6 @@ void vpd_preload(struct dt_node *hub_node); /* Platform heartbeat time */ int fsp_heartbeat_time(void); +extern struct platform_psi fsp_platform_psi; #endif /* __IBM_FSP_COMMON_H */ diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 87d06417d02f..9e18e406a6f2 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -71,6 +71,7 @@ static void zz_init(void) DECLARE_PLATFORM(zz) = { .name = "ZZ", + .psi = &fsp_platform_psi, .probe = zz_probe, .init = zz_init, .fast_reboot_init = fsp_console_reset, From patchwork Tue Jun 18 07:29:24 2019 Content-Type: text/plain; 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Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 86ED84C4BC9; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:24 +1000 Message-Id: <20190618072925.5299-17-stewart@linux.ibm.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 16/17] Move platform specific PRD functionality to struct platform X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Stewart Smith --- hw/prd.c | 36 +++++++++++++++++++++++++----------- include/platform.h | 17 +++++++++++++++++ platforms/ibm-fsp/common.c | 9 +++++++++ platforms/ibm-fsp/firenze.c | 1 + platforms/ibm-fsp/ibm-fsp.h | 1 + platforms/ibm-fsp/zz.c | 1 + 6 files changed, 54 insertions(+), 11 deletions(-) diff --git a/hw/prd.c b/hw/prd.c index fea8cf054c24..904ed2c2c64c 100644 --- a/hw/prd.c +++ b/hw/prd.c @@ -130,7 +130,9 @@ static void prd_msg_consumed(void *data, int status) "PRD: Failed to send FSP -> HBRT message\n"); notify_status = FSP_STATUS_GENERIC_FAILURE; } - hservice_hbrt_msg_response(notify_status); + assert(platform.prd); + assert(platform.prd->msg_response); + platform.prd->msg_response(notify_status); break; case OPAL_PRD_MSG_TYPE_SBE_PASSTHROUGH: proc = msg->sbe_passthrough.chip; @@ -529,9 +531,11 @@ static int prd_msg_handle_firmware_req(struct opal_prd_msg *msg) rc = 0; break; case PRD_FW_MSG_TYPE_ERROR_LOG: - rc = hservice_send_error_log(fw_req->errorlog.plid, - fw_req->errorlog.size, - fw_req->errorlog.data); + assert(platform.prd); + assert(platform.prd->send_error_log); + rc = platform.prd->send_error_log(fw_req->errorlog.plid, + fw_req->errorlog.size, + fw_req->errorlog.data); /* Return generic response to HBRT */ fw_resp->type = cpu_to_be64(PRD_FW_MSG_TYPE_RESP_GENERIC); fw_resp->generic_resp.status = cpu_to_be64(rc); @@ -604,7 +608,9 @@ static int prd_msg_handle_firmware_req(struct opal_prd_msg *msg) unlock(&events_lock); /* Send message to FSP */ - rc = hservice_send_hbrt_msg(&(fw_resp->mbox_msg), data_len); + assert(platform.prd); + assert(platform.prd->send_hbrt_msg); + rc = platform.prd->send_hbrt_msg(&(fw_resp->mbox_msg), data_len); /* * Callback handler from hservice_send_hbrt_msg will take @@ -669,16 +675,24 @@ static int64_t opal_prd_msg(struct opal_prd_msg *msg) rc = prd_msg_handle_firmware_req(msg); break; case OPAL_PRD_MSG_TYPE_FSP_OCC_RESET_STATUS: - rc = fsp_occ_reset_status(msg->fsp_occ_reset_status.chip, - msg->fsp_occ_reset_status.status); + assert(platform.prd); + assert(platform.prd->fsp_occ_reset_status); + rc = platform.prd->fsp_occ_reset_status( + msg->fsp_occ_reset_status.chip, + msg->fsp_occ_reset_status.status); break; case OPAL_PRD_MSG_TYPE_CORE_SPECIAL_WAKEUP: - rc = hservice_wakeup(msg->spl_wakeup.core, - msg->spl_wakeup.mode); + assert(platform.prd); + assert(platform.prd->wakeup); + rc = platform.prd->wakeup(msg->spl_wakeup.core, + msg->spl_wakeup.mode); break; case OPAL_PRD_MSG_TYPE_FSP_OCC_LOAD_START_STATUS: - rc = fsp_occ_load_start_status(msg->fsp_occ_reset_status.chip, - msg->fsp_occ_reset_status.status); + assert(platform.prd); + assert(platform.prd->fsp_occ_load_start_status); + rc = platform.prd->fsp_occ_load_start_status( + msg->fsp_occ_reset_status.chip, + msg->fsp_occ_reset_status.status); break; default: prlog(PR_DEBUG, "PRD: Unsupported prd message type : 0x%x\n", diff --git a/include/platform.h b/include/platform.h index f17847ac0d60..0326e1a247e4 100644 --- a/include/platform.h +++ b/include/platform.h @@ -89,6 +89,18 @@ struct platform_psi { void (*fsp_interrupt)(void); }; +/* + * Some PRD functionality is platform specific. + */ +struct platform_prd { + void (*msg_response)(uint32_t rc); + int (*send_error_log)(uint32_t plid, uint32_t dsize, void *data); + int (*send_hbrt_msg)(void *data, u64 dsize); + int (*wakeup)(uint32_t i_core, uint32_t i_mode); + int (*fsp_occ_load_start_status)(u64 chipid, s64 status); + int (*fsp_occ_reset_status)(u64 chipid, s64 status); +}; + /* * Each platform can provide a set of hooks * that can affect the generic code @@ -108,6 +120,11 @@ struct platform { */ const struct platform_psi *psi; + /* + * Platform specific PRD handling + */ + const struct platform_prd *prd; + /* OpenCAPI platform-specific I2C information */ const struct platform_ocapi *ocapi; diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index ba20d5070353..7f7a1f246206 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -275,3 +275,12 @@ struct platform_psi fsp_platform_psi = { .link_established = fsp_reinit_fsp, .fsp_interrupt = fsp_interrupt, }; + +struct platform_prd fsp_platform_prd = { + .msg_response = hservice_hbrt_msg_response, + .send_error_log = hservice_send_error_log, + .send_hbrt_msg = hservice_send_hbrt_msg, + .wakeup = hservice_wakeup, + .fsp_occ_load_start_status = fsp_occ_load_start_status, + .fsp_occ_reset_status = fsp_occ_reset_status, +}; diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index 6c25023235e7..232833480f75 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -210,6 +210,7 @@ static void firenze_init(void) DECLARE_PLATFORM(firenze) = { .name = "Firenze", .psi = &fsp_platform_psi, + .prd = &fsp_platform_prd, .probe = firenze_probe, .init = firenze_init, .fast_reboot_init = fsp_console_reset, diff --git a/platforms/ibm-fsp/ibm-fsp.h b/platforms/ibm-fsp/ibm-fsp.h index 66139f0c06de..dc3969ec688d 100644 --- a/platforms/ibm-fsp/ibm-fsp.h +++ b/platforms/ibm-fsp/ibm-fsp.h @@ -51,5 +51,6 @@ void vpd_preload(struct dt_node *hub_node); int fsp_heartbeat_time(void); extern struct platform_psi fsp_platform_psi; +extern struct platform_prd fsp_platform_prd; #endif /* __IBM_FSP_COMMON_H */ diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 9e18e406a6f2..ac608f6aba7e 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -72,6 +72,7 @@ static void zz_init(void) DECLARE_PLATFORM(zz) = { .name = "ZZ", .psi = &fsp_platform_psi, + .prd = &fsp_platform_prd, .probe = zz_probe, .init = zz_init, .fast_reboot_init = fsp_console_reset, From patchwork Tue Jun 18 07:29:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 1117657 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45SfsN2ygYz9s3l for ; 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Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 71375BE04F for ; Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: from birb.localdomain (unknown [9.185.142.124]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP for ; Tue, 18 Jun 2019 07:29:33 +0000 (GMT) Received: by birb.localdomain (Postfix, from userid 1000) id 8BE574C4BCC; Tue, 18 Jun 2019 17:29:28 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 18 Jun 2019 17:29:25 +1000 Message-Id: <20190618072925.5299-18-stewart@linux.ibm.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618072925.5299-1-stewart@linux.ibm.com> References: <20190618072925.5299-1-stewart@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=800 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906180062 Subject: [Skiboot] [PATCH 17/17] Experimental support for building without FSP code X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Now, with CONFIG_FSP=0/1 we have: 1.6M/1.4M skiboot.lid 323K/375K skiboot.lid.xz Signed-off-by: Stewart Smith --- Makefile | 3 ++- hw/fsp/Makefile.inc | 3 +++ platforms/ibm-fsp/Makefile.inc | 3 +++ 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 68d4dc7deac0..fbd83bc01862 100644 --- a/Makefile +++ b/Makefile @@ -44,6 +44,8 @@ LITTLE_ENDIAN ?= 0 ELF_ABI_v2 ?= $(LITTLE_ENDIAN) # Discard unreferenced code and data at link-time DEAD_CODE_ELIMINATION ?= 0 +# Try to build without FSP code +CONFIG_FSP?=1 # # Where is the source directory, must be a full path (no ~) @@ -62,4 +64,3 @@ DEVSRC=hdata CONFIG := config.h include $(SRC)/Makefile.main - diff --git a/hw/fsp/Makefile.inc b/hw/fsp/Makefile.inc index bcb3f3b95528..b078a4d765bd 100644 --- a/hw/fsp/Makefile.inc +++ b/hw/fsp/Makefile.inc @@ -7,4 +7,7 @@ FSP_OBJS += fsp-elog-read.o fsp-elog-write.o fsp-epow.o fsp-dpo.o FSP_OBJS += fsp-dump.o fsp-mdst-table.o fsp-chiptod.o fsp-ipmi.o FSP_OBJS += fsp-attn.o fsp-occ.o fsp-psi.o FSP = hw/fsp/built-in.a + +ifeq ($(CONFIG_FSP),1) $(FSP): $(FSP_OBJS:%=hw/fsp/%) +endif diff --git a/platforms/ibm-fsp/Makefile.inc b/platforms/ibm-fsp/Makefile.inc index fc8f03341aec..8883f09c1815 100644 --- a/platforms/ibm-fsp/Makefile.inc +++ b/platforms/ibm-fsp/Makefile.inc @@ -3,4 +3,7 @@ SUBDIRS += $(PLATDIR)/ibm-fsp IBM_FSP_OBJS = common.o lxvpd.o hostservices.o fsp-vpd.o \ firenze.o firenze-pci.o zz.o IBM_FSP = $(PLATDIR)/ibm-fsp/built-in.a + +ifeq ($(CONFIG_FSP),1) $(IBM_FSP): $(IBM_FSP_OBJS:%=$(PLATDIR)/ibm-fsp/%) +endif