From patchwork Mon May 20 20:19:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102345 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579HM21q4z9sBV for ; Tue, 21 May 2019 06:19:59 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4579HM0GJrzDqKr for ; Tue, 21 May 2019 06:19:59 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=eajames@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4579H70gQbzDqJT for ; Tue, 21 May 2019 06:19:46 +1000 (AEST) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4KK7qTo008539 for ; Mon, 20 May 2019 16:19:44 -0400 Received: from e13.ny.us.ibm.com (e13.ny.us.ibm.com [129.33.205.203]) by mx0b-001b2d01.pphosted.com with ESMTP id 2sm0x6cyks-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 20 May 2019 16:19:44 -0400 Received: from localhost by e13.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 20 May 2019 21:19:40 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJcKf34079128 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:39 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC6E4B2066; Mon, 20 May 2019 20:19:38 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 35E26B205F; Mon, 20 May 2019 20:19:38 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:38 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 1/7] dt-bindings: soc: Add Aspeed XDMA engine binding documentation Date: Mon, 20 May 2019 15:19:19 -0500 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19052020-0064-0000-0000-000003E1A734 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011132; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01206180; UDB=6.00633348; IPR=6.00987139; MB=3.00026974; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-20 20:19:42 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19052020-0065-0000-0000-00003D8AA94E Message-Id: <1558383565-11821-2-git-send-email-eajames@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Document the bindings. Signed-off-by: Eddie James --- .../devicetree/bindings/soc/aspeed/xdma.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.txt diff --git a/Documentation/devicetree/bindings/soc/aspeed/xdma.txt b/Documentation/devicetree/bindings/soc/aspeed/xdma.txt new file mode 100644 index 0000000..85e82ea --- /dev/null +++ b/Documentation/devicetree/bindings/soc/aspeed/xdma.txt @@ -0,0 +1,23 @@ +* Device tree bindings for the Aspeed XDMA Engine + +The XDMA Engine embedded in the AST2500 SOC can perform automatic DMA +operations over PCI between the AST2500 (acting as a BMC) and a host processor. + +Required properties: + + - compatible "aspeed,ast2500-xdma" + - reg contains the offset and length of the memory region + assigned to the XDMA registers + - resets reset specifier for the syscon reset associated with + the XDMA engine + - interrupts the interrupt associated with the XDMA engine on this + platform + +Example: + + xdma@1e6e7000 { + compatible = "aspeed,ast2500-xdma"; + reg = <0x1e6e7000 0x100>; + resets = <&syscon ASPEED_RESET_XDMA>; + interrupts = <6>; + }; From patchwork Mon May 20 20:19:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102346 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579HT3BDTz9sCJ for ; Tue, 21 May 2019 06:20:05 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4579HT238LzDqKT for ; Tue, 21 May 2019 06:20:05 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=eajames@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4579H90GsPzDqKs for ; Tue, 21 May 2019 06:19:48 +1000 (AEST) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4KK7RFw056247 for ; Mon, 20 May 2019 16:19:46 -0400 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0b-001b2d01.pphosted.com with ESMTP id 2sm2fk9fgu-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 20 May 2019 16:19:46 -0400 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 20 May 2019 21:19:42 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJfY137159074 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:41 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 81A12B2066; Mon, 20 May 2019 20:19:41 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B9FE0B2065; Mon, 20 May 2019 20:19:40 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:40 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 2/7] drivers/soc: Add Aspeed XDMA Engine Driver Date: Mon, 20 May 2019 15:19:20 -0500 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19052020-0072-0000-0000-00000430885E X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011132; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01206180; UDB=6.00633347; IPR=6.00987139; MB=3.00026974; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-20 20:19:45 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19052020-0073-0000-0000-00004C4BCB7F Message-Id: <1558383565-11821-3-git-send-email-eajames@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" The XDMA engine embedded in the AST2500 SOC performs PCI DMA operations between the SOC (acting as a BMC) and a host processor in a server. This commit adds a driver to control the XDMA engine and adds functions to initialize the hardware and memory and start DMA operations. Signed-off-by: Eddie James --- MAINTAINERS | 9 + drivers/soc/aspeed/Kconfig | 8 + drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-xdma.c | 483 +++++++++++++++++++++++++++++++++++++++ include/uapi/linux/aspeed-xdma.h | 26 +++ 5 files changed, 527 insertions(+) create mode 100644 drivers/soc/aspeed/aspeed-xdma.c create mode 100644 include/uapi/linux/aspeed-xdma.h diff --git a/MAINTAINERS b/MAINTAINERS index a2cd369..bfa6df2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2583,6 +2583,15 @@ S: Maintained F: drivers/media/platform/aspeed-video.c F: Documentation/devicetree/bindings/media/aspeed-video.txt +ASPEED XDMA ENGINE DRIVER +M: Eddie James +L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers) +L: linux-kernel@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/misc/aspeed,xdma.txt +F: drivers/soc/aspeed/aspeed-xdma.c +F: include/uapi/linux/aspeed-xdma.h + ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS M: Corentin Chary L: acpi4asus-user@lists.sourceforge.net diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig index 765d101..5a379e8 100644 --- a/drivers/soc/aspeed/Kconfig +++ b/drivers/soc/aspeed/Kconfig @@ -28,4 +28,12 @@ config ASPEED_P2A_CTRL ioctl()s, the driver also provides an interface for userspace mappings to a pre-defined region. +config ASPEED_XDMA + tristate "Aspeed XDMA Engine Driver" + depends on SOC_ASPEED && REGMAP && MFD_SYSCON && HAS_DMA + help + Enable support for the Aspeed XDMA Engine found on the Aspeed AST2500 + SOC. The XDMA engine can perform automatic PCI DMA operations between + the AST2500 (acting as a BMC) and a host processor. + endmenu diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile index 2f7b6da..bae65af 100644 --- a/drivers/soc/aspeed/Makefile +++ b/drivers/soc/aspeed/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o +obj-$(CONFIG_ASPEED_XDMA) += aspeed-xdma.o diff --git a/drivers/soc/aspeed/aspeed-xdma.c b/drivers/soc/aspeed/aspeed-xdma.c new file mode 100644 index 0000000..0992d2a --- /dev/null +++ b/drivers/soc/aspeed/aspeed-xdma.c @@ -0,0 +1,483 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright IBM Corp 2019 + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DEVICE_NAME "aspeed-xdma" + +#define SCU_STRAP 0x070 +#define SCU_STRAP_VGA_MEM GENMASK(3, 2) + +#define SCU_PCIE_CONF 0x180 +#define SCU_PCIE_CONF_VGA_EN BIT(0) +#define SCU_PCIE_CONF_VGA_EN_MMIO BIT(1) +#define SCU_PCIE_CONF_VGA_EN_LPC BIT(2) +#define SCU_PCIE_CONF_VGA_EN_MSI BIT(3) +#define SCU_PCIE_CONF_VGA_EN_MCTP BIT(4) +#define SCU_PCIE_CONF_VGA_EN_IRQ BIT(5) +#define SCU_PCIE_CONF_VGA_EN_DMA BIT(6) +#define SCU_PCIE_CONF_BMC_EN BIT(8) +#define SCU_PCIE_CONF_BMC_EN_MMIO BIT(9) +#define SCU_PCIE_CONF_BMC_EN_MSI BIT(11) +#define SCU_PCIE_CONF_BMC_EN_MCTP BIT(12) +#define SCU_PCIE_CONF_BMC_EN_IRQ BIT(13) +#define SCU_PCIE_CONF_BMC_EN_DMA BIT(14) +#define SCU_PCIE_CONF_RSVD GENMASK(19, 18) + +#define SDMC_CONF 0x004 +#define SDMC_CONF_MEM GENMASK(1, 0) +#define SDMC_REMAP 0x008 +#define SDMC_REMAP_MAGIC GENMASK(17, 16) + +#define XDMA_CMD_SIZE 4 +#define XDMA_CMDQ_SIZE PAGE_SIZE +#define XDMA_BYTE_ALIGN 16 +#define XDMA_MAX_LINE_SIZE BIT(10) +#define XDMA_NUM_CMDS \ + (XDMA_CMDQ_SIZE / sizeof(struct aspeed_xdma_cmd)) +#define XDMA_NUM_DEBUGFS_REGS 6 + +#define XDMA_CMD_BMC_CHECK BIT(0) +#define XDMA_CMD_BMC_ADDR GENMASK(29, 4) +#define XDMA_CMD_BMC_DIR_US BIT(31) + +#define XDMA_CMD_COMM1_HI_HOST_PITCH GENMASK(14, 3) +#define XDMA_CMD_COMM1_HI_BMC_PITCH GENMASK(30, 19) + +#define XDMA_CMD_CONF_CHECK BIT(1) +#define XDMA_CMD_CONF_LINE_SIZE GENMASK(14, 4) +#define XDMA_CMD_CONF_IRQ_BMC BIT(15) +#define XDMA_CMD_CONF_NUM_LINES GENMASK(27, 16) +#define XDMA_CMD_CONF_IRQ BIT(31) + +#define XDMA_CMD_ID_UPDIR GENMASK(17, 16) +#define XDMA_CMD_ID_UPDIR_BMC 0 +#define XDMA_CMD_ID_UPDIR_HOST 1 +#define XDMA_CMD_ID_UPDIR_VGA 2 + +#define XDMA_DS_PCIE_REQ_SIZE_128 0 +#define XDMA_DS_PCIE_REQ_SIZE_256 1 +#define XDMA_DS_PCIE_REQ_SIZE_512 2 +#define XDMA_DS_PCIE_REQ_SIZE_1K 3 +#define XDMA_DS_PCIE_REQ_SIZE_2K 4 +#define XDMA_DS_PCIE_REQ_SIZE_4K 5 + +#define XDMA_BMC_CMD_QUEUE_ADDR 0x10 +#define XDMA_BMC_CMD_QUEUE_ENDP 0x14 +#define XDMA_BMC_CMD_QUEUE_WRITEP 0x18 +#define XDMA_BMC_CMD_QUEUE_READP 0x1c +#define XDMA_BMC_CMD_QUEUE_READP_MAGIC 0xee882266 +#define XDMA_CTRL 0x20 +#define XDMA_CTRL_US_COMP BIT(4) +#define XDMA_CTRL_DS_COMP BIT(5) +#define XDMA_CTRL_DS_DIRTY BIT(6) +#define XDMA_CTRL_DS_PCIE_REQ_SIZE GENMASK(19, 17) +#define XDMA_CTRL_DS_DATA_TIMEOUT BIT(28) +#define XDMA_CTRL_DS_CHECK_ID BIT(29) +#define XDMA_STATUS 0x24 +#define XDMA_STATUS_US_COMP BIT(4) +#define XDMA_STATUS_DS_COMP BIT(5) + +enum { + XDMA_IN_PRG, + XDMA_UPSTREAM, +}; + +struct aspeed_xdma_cmd { + u32 host_addr_lo; + u32 host_addr_hi; + u32 bmc_addr; + u32 comm1_hi; + u32 conf; + u32 id; + u32 resv0; + u32 resv1; +}; + +struct aspeed_xdma_client; + +struct aspeed_xdma { + struct device *dev; + void __iomem *base; + struct regmap *scu; + struct reset_control *reset; + + unsigned long flags; + unsigned int cmd_idx; + wait_queue_head_t wait; + struct aspeed_xdma_client *current_client; + + u32 vga_phys; + u32 vga_size; + dma_addr_t vga_dma; + void *cmdq; + void *vga_virt; +}; + +struct aspeed_xdma_client { + struct aspeed_xdma *ctx; + + unsigned long flags; + u32 phys; + u32 size; +}; + +static const u32 aspeed_xdma_bmc_pcie_conf = SCU_PCIE_CONF_BMC_EN | + SCU_PCIE_CONF_BMC_EN_MSI | SCU_PCIE_CONF_BMC_EN_MCTP | + SCU_PCIE_CONF_BMC_EN_IRQ | SCU_PCIE_CONF_BMC_EN_DMA | + SCU_PCIE_CONF_RSVD; + +static const u32 aspeed_xdma_vga_pcie_conf = SCU_PCIE_CONF_VGA_EN | + SCU_PCIE_CONF_VGA_EN_MSI | SCU_PCIE_CONF_VGA_EN_MCTP | + SCU_PCIE_CONF_VGA_EN_IRQ | SCU_PCIE_CONF_VGA_EN_DMA | + SCU_PCIE_CONF_RSVD; + +static void aspeed_scu_pcie_write(struct aspeed_xdma *ctx, u32 conf) +{ + u32 v = 0; + + regmap_write(ctx->scu, SCU_PCIE_CONF, conf); + regmap_read(ctx->scu, SCU_PCIE_CONF, &v); + + dev_dbg(ctx->dev, "write scu pcie_conf[%08x]\n", v); +} + +static u32 aspeed_xdma_reg_read(struct aspeed_xdma *ctx, u32 reg) +{ + u32 v = readl(ctx->base + reg); + + dev_dbg(ctx->dev, "read %02x[%08x]\n", reg, v); + return v; +} + +static void aspeed_xdma_reg_write(struct aspeed_xdma *ctx, u32 reg, u32 val) +{ + writel(val, ctx->base + reg); + dev_dbg(ctx->dev, "write %02x[%08x]\n", reg, readl(ctx->base + reg)); +} + +static void aspeed_xdma_init_eng(struct aspeed_xdma *ctx) +{ + const u32 ctrl = XDMA_CTRL_US_COMP | XDMA_CTRL_DS_COMP | + XDMA_CTRL_DS_DIRTY | FIELD_PREP(XDMA_CTRL_DS_PCIE_REQ_SIZE, + XDMA_DS_PCIE_REQ_SIZE_256) | + XDMA_CTRL_DS_DATA_TIMEOUT | XDMA_CTRL_DS_CHECK_ID; + + aspeed_xdma_reg_write(ctx, XDMA_BMC_CMD_QUEUE_ENDP, + XDMA_CMD_SIZE * XDMA_NUM_CMDS); + aspeed_xdma_reg_write(ctx, XDMA_BMC_CMD_QUEUE_READP, + XDMA_BMC_CMD_QUEUE_READP_MAGIC); + aspeed_xdma_reg_write(ctx, XDMA_BMC_CMD_QUEUE_WRITEP, 0); + aspeed_xdma_reg_write(ctx, XDMA_CTRL, ctrl); + + aspeed_xdma_reg_write(ctx, XDMA_BMC_CMD_QUEUE_ADDR, ctx->vga_phys); + + ctx->cmd_idx = 0; + ctx->flags = 0; +} + +static void aspeed_xdma_reset(struct aspeed_xdma *ctx) +{ + reset_control_assert(ctx->reset); + + msleep(10); + + reset_control_deassert(ctx->reset); + + msleep(10); + + aspeed_xdma_init_eng(ctx); +} + +static void aspeed_xdma_start(struct aspeed_xdma *ctx, + struct aspeed_xdma_op *op, u32 bmc_addr) +{ + u32 conf = XDMA_CMD_CONF_CHECK | XDMA_CMD_CONF_IRQ_BMC | + XDMA_CMD_CONF_IRQ; + unsigned int line_size = op->len / XDMA_BYTE_ALIGN; + unsigned int num_lines = 1; + unsigned int nidx = (ctx->cmd_idx + 1) % XDMA_NUM_CMDS; + unsigned int pitch = 1; + struct aspeed_xdma_cmd *cmd = + &(((struct aspeed_xdma_cmd *)ctx->cmdq)[ctx->cmd_idx]); + + if (line_size > XDMA_MAX_LINE_SIZE) { + unsigned int rem; + unsigned int total; + + num_lines = line_size / XDMA_MAX_LINE_SIZE; + total = XDMA_MAX_LINE_SIZE * num_lines; + rem = line_size - total; + line_size = XDMA_MAX_LINE_SIZE; + pitch = line_size; + + if (rem) { + unsigned int offs = total * XDMA_BYTE_ALIGN; + u32 r_bmc_addr = bmc_addr + offs; + u64 r_host_addr = op->host_addr + (u64)offs; + struct aspeed_xdma_cmd *r_cmd = + &(((struct aspeed_xdma_cmd *)ctx->cmdq)[nidx]); + + r_cmd->host_addr_lo = + (u32)(r_host_addr & 0xFFFFFFFFULL); + r_cmd->host_addr_hi = (u32)(r_host_addr >> 32ULL); + r_cmd->bmc_addr = (r_bmc_addr & XDMA_CMD_BMC_ADDR) | + XDMA_CMD_BMC_CHECK | + (op->upstream ? XDMA_CMD_BMC_DIR_US : 0); + r_cmd->conf = conf | + FIELD_PREP(XDMA_CMD_CONF_LINE_SIZE, rem) | + FIELD_PREP(XDMA_CMD_CONF_NUM_LINES, 1); + r_cmd->comm1_hi = + FIELD_PREP(XDMA_CMD_COMM1_HI_HOST_PITCH, 1) | + FIELD_PREP(XDMA_CMD_COMM1_HI_BMC_PITCH, 1); + + /* do not trigger IRQ for first command */ + conf = XDMA_CMD_CONF_CHECK; + + nidx = (nidx + 1) % XDMA_NUM_CMDS; + } + + /* undocumented formula to get required number of lines */ + num_lines = (num_lines * 2) - 1; + } + + /* ctrl == 0 indicates engine hasn't started properly; restart it */ + if (!aspeed_xdma_reg_read(ctx, XDMA_CTRL)) + aspeed_xdma_reset(ctx); + + cmd->host_addr_lo = (u32)(op->host_addr & 0xFFFFFFFFULL); + cmd->host_addr_hi = (u32)(op->host_addr >> 32ULL); + cmd->bmc_addr = (bmc_addr & XDMA_CMD_BMC_ADDR) | XDMA_CMD_BMC_CHECK | + (op->upstream ? XDMA_CMD_BMC_DIR_US : 0); + cmd->conf = conf | + FIELD_PREP(XDMA_CMD_CONF_LINE_SIZE, line_size) | + FIELD_PREP(XDMA_CMD_CONF_NUM_LINES, num_lines); + cmd->comm1_hi = FIELD_PREP(XDMA_CMD_COMM1_HI_HOST_PITCH, pitch) | + FIELD_PREP(XDMA_CMD_COMM1_HI_BMC_PITCH, pitch); + + memcpy(ctx->vga_virt, ctx->cmdq, XDMA_CMDQ_SIZE); + + if (op->upstream) + set_bit(XDMA_UPSTREAM, &ctx->flags); + else + clear_bit(XDMA_UPSTREAM, &ctx->flags); + + set_bit(XDMA_IN_PRG, &ctx->flags); + + aspeed_xdma_reg_write(ctx, XDMA_BMC_CMD_QUEUE_WRITEP, + nidx * XDMA_CMD_SIZE); + ctx->cmd_idx = nidx; +} + +static void aspeed_xdma_done(struct aspeed_xdma *ctx) +{ + if (ctx->current_client) { + clear_bit(XDMA_IN_PRG, &ctx->current_client->flags); + + ctx->current_client = NULL; + } + + clear_bit(XDMA_IN_PRG, &ctx->flags); + wake_up_interruptible_all(&ctx->wait); +} + +static irqreturn_t aspeed_xdma_irq(int irq, void *arg) +{ + struct aspeed_xdma *ctx = arg; + u32 status = aspeed_xdma_reg_read(ctx, XDMA_STATUS); + + if (status & XDMA_STATUS_US_COMP) { + if (test_bit(XDMA_UPSTREAM, &ctx->flags)) + aspeed_xdma_done(ctx); + } + + if (status & XDMA_STATUS_DS_COMP) { + if (!test_bit(XDMA_UPSTREAM, &ctx->flags)) + aspeed_xdma_done(ctx); + } + + aspeed_xdma_reg_write(ctx, XDMA_STATUS, status); + + return IRQ_HANDLED; +} + +static int aspeed_xdma_init_mem(struct aspeed_xdma *ctx) +{ + int rc; + u32 scu_conf = 0; + u32 mem_size = 0x20000000; + const u32 mem_sizes[4] = { 0x8000000, 0x10000000, 0x20000000, + 0x40000000 }; + const u32 vga_sizes[4] = { 0x800000, 0x1000000, 0x2000000, 0x4000000 }; + void __iomem *sdmc_base = ioremap(0x1e6e0000, 0x100); + + aspeed_scu_pcie_write(ctx, aspeed_xdma_vga_pcie_conf); + + regmap_read(ctx->scu, SCU_STRAP, &scu_conf); + ctx->vga_size = vga_sizes[FIELD_GET(SCU_STRAP_VGA_MEM, scu_conf)]; + + if (sdmc_base) { + u32 sdmc = readl(sdmc_base + SDMC_CONF); + u32 remap = readl(sdmc_base + SDMC_REMAP); + + remap |= SDMC_REMAP_MAGIC; + writel(remap, sdmc_base + SDMC_REMAP); + remap = readl(sdmc_base + SDMC_REMAP); + + mem_size = mem_sizes[sdmc & SDMC_CONF_MEM]; + iounmap(sdmc_base); + } + + ctx->vga_phys = (mem_size - ctx->vga_size) + 0x80000000; + + ctx->cmdq = devm_kzalloc(ctx->dev, XDMA_CMDQ_SIZE, GFP_KERNEL); + if (!ctx->cmdq) { + dev_err(ctx->dev, "Failed to allocate command queue.\n"); + return -ENOMEM; + } + + rc = dma_set_mask_and_coherent(ctx->dev, DMA_BIT_MASK(32)); + if (rc) { + dev_err(ctx->dev, "Failed to set DMA mask: %d.\n", rc); + return rc; + } + + rc = dma_declare_coherent_memory(ctx->dev, ctx->vga_phys, + ctx->vga_phys, ctx->vga_size); + if (rc) { + dev_err(ctx->dev, "Failed to declare coherent memory: %d.\n", + rc); + return rc; + } + + ctx->vga_virt = dma_alloc_coherent(ctx->dev, ctx->vga_size, + &ctx->vga_dma, GFP_KERNEL); + if (!ctx->vga_virt) { + dev_err(ctx->dev, "Failed to allocate DMA.\n"); + dma_release_declared_memory(ctx->dev); + return -ENOMEM; + } + + dev_dbg(ctx->dev, "VGA mapped at phys[%08x], size[%08x].\n", + ctx->vga_phys, ctx->vga_size); + + return 0; +} + +static int aspeed_xdma_probe(struct platform_device *pdev) +{ + int irq; + int rc; + struct resource *res; + struct device *dev = &pdev->dev; + struct aspeed_xdma *ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + + if (!ctx) + return -ENOMEM; + + ctx->dev = dev; + platform_set_drvdata(pdev, ctx); + init_waitqueue_head(&ctx->wait); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ctx->base = devm_ioremap_resource(dev, res); + if (IS_ERR(ctx->base)) { + dev_err(dev, "Unable to ioremap registers\n"); + return PTR_ERR(ctx->base); + } + + irq = irq_of_parse_and_map(dev->of_node, 0); + if (!irq) { + dev_err(dev, "Unable to find IRQ\n"); + return -ENODEV; + } + + rc = devm_request_irq(dev, irq, aspeed_xdma_irq, IRQF_SHARED, + DEVICE_NAME, ctx); + if (rc < 0) { + dev_err(dev, "Unable to request IRQ %d\n", irq); + return rc; + } + + ctx->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu"); + if (IS_ERR(ctx->scu)) { + dev_err(ctx->dev, "Unable to grab SCU regs\n"); + return PTR_ERR(ctx->scu); + } + + ctx->reset = devm_reset_control_get_exclusive(dev, NULL); + if (IS_ERR(ctx->reset)) { + dev_err(dev, "Unable to request reset control\n"); + return PTR_ERR(ctx->reset); + } + + reset_control_deassert(ctx->reset); + + msleep(10); + + rc = aspeed_xdma_init_mem(ctx); + if (rc) { + reset_control_assert(ctx->reset); + return rc; + } + + aspeed_xdma_init_eng(ctx); + + return 0; +} + +static int aspeed_xdma_remove(struct platform_device *pdev) +{ + struct aspeed_xdma *ctx = platform_get_drvdata(pdev); + + dma_free_coherent(ctx->dev, ctx->vga_size, ctx->vga_virt, + ctx->vga_dma); + dma_release_declared_memory(ctx->dev); + reset_control_assert(ctx->reset); + + return 0; +} + +static const struct of_device_id aspeed_xdma_match[] = { + { .compatible = "aspeed,ast2500-xdma" }, + { }, +}; + +static struct platform_driver aspeed_xdma_driver = { + .probe = aspeed_xdma_probe, + .remove = aspeed_xdma_remove, + .driver = { + .name = DEVICE_NAME, + .of_match_table = aspeed_xdma_match, + }, +}; + +module_platform_driver(aspeed_xdma_driver); + +MODULE_AUTHOR("Eddie James"); +MODULE_DESCRIPTION("Aspeed XDMA Engine Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/uapi/linux/aspeed-xdma.h b/include/uapi/linux/aspeed-xdma.h new file mode 100644 index 0000000..2a4bd13 --- /dev/null +++ b/include/uapi/linux/aspeed-xdma.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright IBM Corp 2019 */ + +#ifndef _UAPI_LINUX_ASPEED_XDMA_H_ +#define _UAPI_LINUX_ASPEED_XDMA_H_ + +#include + +/* + * aspeed_xdma_op + * + * upstream: boolean indicating the direction of the DMA operation; upstream + * means a transfer from the BMC to the host + * + * host_addr: the DMA address on the host side, typically configured by PCI + * subsystem + * + * len: the size of the transfer in bytes; it should be a multiple of 16 bytes + */ +struct aspeed_xdma_op { + __u32 upstream; + __u64 host_addr; + __u32 len; +}; + +#endif /* _UAPI_LINUX_ASPEED_XDMA_H_ */ From patchwork Mon May 20 20:19:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102348 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579Hg3Cl8z9s3Z for ; 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Mon, 20 May 2019 16:19:46 -0400 Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com with ESMTP id 2sm1f1brqu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 May 2019 16:19:46 -0400 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x4KJbV1C014547; Mon, 20 May 2019 19:38:01 GMT Received: from b01cxnp23032.gho.pok.ibm.com (b01cxnp23032.gho.pok.ibm.com [9.57.198.27]) by ppma01dal.us.ibm.com with ESMTP id 2sj9p3k7u2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 May 2019 19:38:01 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJiL334799640 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:44 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5C246B2064; Mon, 20 May 2019 20:19:44 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A0384B2066; Mon, 20 May 2019 20:19:43 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:43 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 3/7] drivers/soc: xdma: Add user interface Date: Mon, 20 May 2019 15:19:21 -0500 Message-Id: <1558383565-11821-4-git-send-email-eajames@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" This commits adds a miscdevice to provide a user interface to the XDMA engine. The interface provides the write operation to start DMA operations. The DMA parameters are passed as the data to the write call. The actual data to transfer is NOT passed through write. Note that both directions of DMA operation are accomplished through the write command; BMC to host and host to BMC. The XDMA engine is restricted to only accessing the reserved memory space on the AST2500, typically used by the VGA. For this reason, this commit also adds a simple memory manager for this reserved memory space which can then be allocated in pages by users calling mmap. The space allocated by a client will be the space used in the DMA operation. For an "upstream" (BMC to host) operation, the data in the client's area will be transferred to the host. For a "downstream" (host to BMC) operation, the host data will be placed in the client's memory area. Poll is also provided in order to determine when the DMA operation is complete for non-blocking IO. Signed-off-by: Eddie James --- drivers/soc/aspeed/aspeed-xdma.c | 301 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 301 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-xdma.c b/drivers/soc/aspeed/aspeed-xdma.c index 0992d2a..2162ca0 100644 --- a/drivers/soc/aspeed/aspeed-xdma.c +++ b/drivers/soc/aspeed/aspeed-xdma.c @@ -118,6 +118,12 @@ struct aspeed_xdma_cmd { u32 resv1; }; +struct aspeed_xdma_vga_blk { + u32 phys; + u32 size; + struct list_head list; +}; + struct aspeed_xdma_client; struct aspeed_xdma { @@ -128,6 +134,8 @@ struct aspeed_xdma { unsigned long flags; unsigned int cmd_idx; + struct mutex list_lock; + struct mutex start_lock; wait_queue_head_t wait; struct aspeed_xdma_client *current_client; @@ -136,6 +144,9 @@ struct aspeed_xdma { dma_addr_t vga_dma; void *cmdq; void *vga_virt; + struct list_head vga_blks_free; + + struct miscdevice misc; }; struct aspeed_xdma_client { @@ -325,6 +336,260 @@ static irqreturn_t aspeed_xdma_irq(int irq, void *arg) return IRQ_HANDLED; } +static u32 aspeed_xdma_alloc_vga_blk(struct aspeed_xdma *ctx, u32 req_size) +{ + u32 phys = 0; + u32 size = PAGE_ALIGN(req_size); + struct aspeed_xdma_vga_blk *free; + + mutex_lock(&ctx->list_lock); + + list_for_each_entry(free, &ctx->vga_blks_free, list) { + if (free->size >= size) { + phys = free->phys; + + if (size == free->size) { + dev_dbg(ctx->dev, + "Allocd %08x[%08x r(%08x)], del.\n", + phys, size, req_size); + list_del(&free->list); + kfree(free); + } else { + free->phys += size; + free->size -= size; + dev_dbg(ctx->dev, "Allocd %08x[%08x r(%08x)], " + "shrunk %08x[%08x].\n", phys, size, + req_size, free->phys, free->size); + } + + break; + } + } + + mutex_unlock(&ctx->list_lock); + + return phys; +} + +static void aspeed_xdma_free_vga_blk(struct aspeed_xdma *ctx, u32 phys, + u32 req_size) +{ + u32 min_free = UINT_MAX; + u32 size = PAGE_ALIGN(req_size); + const u32 end = phys + size; + struct aspeed_xdma_vga_blk *free; + + mutex_lock(&ctx->list_lock); + + list_for_each_entry(free, &ctx->vga_blks_free, list) { + if (end == free->phys) { + u32 fend = free->phys + free->size; + + dev_dbg(ctx->dev, + "Freed %08x[%08x r(%08x)], exp %08x[%08x].\n", + phys, size, req_size, free->phys, free->size); + + free->phys = phys; + free->size = fend - free->phys; + + mutex_unlock(&ctx->list_lock); + return; + } + + if (free->phys < min_free) + min_free = free->phys; + } + + free = kzalloc(sizeof(*free), GFP_KERNEL); + if (free) { + free->phys = phys; + free->size = size; + + dev_dbg(ctx->dev, "Freed %08x[%08x r(%08x)], new.\n", phys, + size, req_size); + + if (phys < min_free) + list_add(&free->list, &ctx->vga_blks_free); + else + list_add_tail(&free->list, &ctx->vga_blks_free); + } else { + dev_err(ctx->dev, "Failed to register freed block.\n"); + } + + mutex_unlock(&ctx->list_lock); +} + +static ssize_t aspeed_xdma_write(struct file *file, const char __user *buf, + size_t len, loff_t *offset) +{ + int rc; + struct aspeed_xdma_op op; + struct aspeed_xdma_client *client = file->private_data; + struct aspeed_xdma *ctx = client->ctx; + u32 offs = client->phys ? (client->phys - ctx->vga_phys) : + XDMA_CMDQ_SIZE; + + if (len != sizeof(struct aspeed_xdma_op)) + return -EINVAL; + + rc = copy_from_user(&op, buf, len); + if (rc) + return rc; + + if (op.len > (ctx->vga_size - offs) || op.len < XDMA_BYTE_ALIGN) + return -EINVAL; + + if (file->f_flags & O_NONBLOCK) { + if (!mutex_trylock(&ctx->start_lock)) + return -EAGAIN; + + if (test_bit(XDMA_IN_PRG, &ctx->flags)) { + mutex_unlock(&ctx->start_lock); + return -EAGAIN; + } + } else { + mutex_lock(&ctx->start_lock); + + rc = wait_event_interruptible(ctx->wait, + !test_bit(XDMA_IN_PRG, + &ctx->flags)); + if (rc) { + mutex_unlock(&ctx->start_lock); + return -EINTR; + } + } + + ctx->current_client = client; + set_bit(XDMA_IN_PRG, &client->flags); + + aspeed_xdma_start(ctx, &op, ctx->vga_phys + offs); + + mutex_unlock(&ctx->start_lock); + + if (!(file->f_flags & O_NONBLOCK)) { + rc = wait_event_interruptible(ctx->wait, + !test_bit(XDMA_IN_PRG, + &ctx->flags)); + if (rc) + return -EINTR; + } + + return len; +} + +static __poll_t aspeed_xdma_poll(struct file *file, + struct poll_table_struct *wait) +{ + __poll_t mask = 0; + __poll_t req = poll_requested_events(wait); + struct aspeed_xdma_client *client = file->private_data; + struct aspeed_xdma *ctx = client->ctx; + + if (req & (EPOLLIN | EPOLLRDNORM)) { + if (test_bit(XDMA_IN_PRG, &client->flags)) + poll_wait(file, &ctx->wait, wait); + + if (!test_bit(XDMA_IN_PRG, &client->flags)) + mask |= EPOLLIN | EPOLLRDNORM; + } + + if (req & (EPOLLOUT | EPOLLWRNORM)) { + if (test_bit(XDMA_IN_PRG, &ctx->flags)) + poll_wait(file, &ctx->wait, wait); + + if (!test_bit(XDMA_IN_PRG, &ctx->flags)) + mask |= EPOLLOUT | EPOLLWRNORM; + } + + return mask; +} + +static void aspeed_xdma_vma_close(struct vm_area_struct *vma) +{ + struct aspeed_xdma_client *client = vma->vm_private_data; + + aspeed_xdma_free_vga_blk(client->ctx, client->phys, client->size); + + client->phys = 0; + client->size = 0; +} + +static const struct vm_operations_struct aspeed_xdma_vm_ops = { + .close = aspeed_xdma_vma_close, +}; + +static int aspeed_xdma_mmap(struct file *file, struct vm_area_struct *vma) +{ + int rc; + struct aspeed_xdma_client *client = file->private_data; + struct aspeed_xdma *ctx = client->ctx; + + /* restrict file to one mapping */ + if (client->size) + return -ENOMEM; + + client->size = vma->vm_end - vma->vm_start; + client->phys = aspeed_xdma_alloc_vga_blk(ctx, client->size); + if (!client->phys) { + client->size = 0; + return -ENOMEM; + } + + vma->vm_pgoff = (client->phys - ctx->vga_phys) >> PAGE_SHIFT; + vma->vm_ops = &aspeed_xdma_vm_ops; + vma->vm_private_data = client; + + rc = dma_mmap_coherent(ctx->dev, vma, ctx->vga_virt, ctx->vga_dma, + ctx->vga_size); + if (rc) { + aspeed_xdma_free_vga_blk(ctx, client->phys, client->size); + + client->phys = 0; + client->size = 0; + return rc; + } + + dev_dbg(ctx->dev, "mmap: v[%08lx] to p[%08x], s[%08x]\n", + vma->vm_start, client->phys, client->size); + + return 0; +} + +static int aspeed_xdma_open(struct inode *inode, struct file *file) +{ + struct miscdevice *misc = file->private_data; + struct aspeed_xdma *ctx = container_of(misc, struct aspeed_xdma, misc); + struct aspeed_xdma_client *client = kzalloc(sizeof(*client), + GFP_KERNEL); + + if (!client) + return -ENOMEM; + + client->ctx = ctx; + file->private_data = client; + return 0; +} + +static int aspeed_xdma_release(struct inode *inode, struct file *file) +{ + struct aspeed_xdma_client *client = file->private_data; + + if (client->ctx->current_client == client) + client->ctx->current_client = NULL; + + kfree(client); + return 0; +} + +static const struct file_operations aspeed_xdma_fops = { + .owner = THIS_MODULE, + .write = aspeed_xdma_write, + .poll = aspeed_xdma_poll, + .mmap = aspeed_xdma_mmap, + .open = aspeed_xdma_open, + .release = aspeed_xdma_release, +}; + static int aspeed_xdma_init_mem(struct aspeed_xdma *ctx) { int rc; @@ -382,12 +647,26 @@ static int aspeed_xdma_init_mem(struct aspeed_xdma *ctx) return -ENOMEM; } + aspeed_xdma_free_vga_blk(ctx, ctx->vga_phys, ctx->vga_size); + aspeed_xdma_alloc_vga_blk(ctx, XDMA_CMDQ_SIZE); + dev_dbg(ctx->dev, "VGA mapped at phys[%08x], size[%08x].\n", ctx->vga_phys, ctx->vga_size); return 0; } +static void aspeed_xdma_free_vga_blks(struct aspeed_xdma *ctx) +{ + struct aspeed_xdma_vga_blk *free; + struct aspeed_xdma_vga_blk *tmp; + + list_for_each_entry_safe(free, tmp, &ctx->vga_blks_free, list) { + list_del(&free->list); + kfree(free); + } +} + static int aspeed_xdma_probe(struct platform_device *pdev) { int irq; @@ -402,6 +681,9 @@ static int aspeed_xdma_probe(struct platform_device *pdev) ctx->dev = dev; platform_set_drvdata(pdev, ctx); init_waitqueue_head(&ctx->wait); + mutex_init(&ctx->list_lock); + mutex_init(&ctx->start_lock); + INIT_LIST_HEAD(&ctx->vga_blks_free); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ctx->base = devm_ioremap_resource(dev, res); @@ -447,6 +729,22 @@ static int aspeed_xdma_probe(struct platform_device *pdev) aspeed_xdma_init_eng(ctx); + ctx->misc.minor = MISC_DYNAMIC_MINOR; + ctx->misc.fops = &aspeed_xdma_fops; + ctx->misc.name = "xdma"; + ctx->misc.parent = dev; + rc = misc_register(&ctx->misc); + if (rc) { + dev_err(dev, "Unable to register xdma miscdevice\n"); + + aspeed_xdma_free_vga_blks(ctx); + dma_free_coherent(dev, ctx->vga_size, ctx->vga_virt, + ctx->vga_dma); + dma_release_declared_memory(dev); + reset_control_assert(ctx->reset); + return rc; + } + return 0; } @@ -454,6 +752,9 @@ static int aspeed_xdma_remove(struct platform_device *pdev) { struct aspeed_xdma *ctx = platform_get_drvdata(pdev); + misc_deregister(&ctx->misc); + + aspeed_xdma_free_vga_blks(ctx); dma_free_coherent(ctx->dev, ctx->vga_size, ctx->vga_virt, ctx->vga_dma); dma_release_declared_memory(ctx->dev); From patchwork Mon May 20 20:19:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579Jv6WnVz9sBV for ; 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Mon, 20 May 2019 16:21:03 -0400 Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com with ESMTP id 2sm2m315hu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 May 2019 16:21:02 -0400 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x4KJbcLI014553; Mon, 20 May 2019 19:39:10 GMT Received: from b01cxnp23033.gho.pok.ibm.com (b01cxnp23033.gho.pok.ibm.com [9.57.198.28]) by ppma01dal.us.ibm.com with ESMTP id 2sj9p3k7w9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 May 2019 19:39:10 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJjFt34210286 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:45 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CA3C5B2068; Mon, 20 May 2019 20:19:45 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2DCD9B2064; Mon, 20 May 2019 20:19:45 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:45 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 4/7] drivers/soc: xdma: Add PCI device configuration sysfs Date: Mon, 20 May 2019 15:19:22 -0500 Message-Id: <1558383565-11821-5-git-send-email-eajames@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" The AST2500 has two PCI devices embedded. The XDMA engine can use either device to perform DMA transfers. Users need the capability to choose which device to use. This commit therefore adds two sysfs files that toggle the AST2500 and XDMA engine between the two PCI devices. Signed-off-by: Eddie James --- drivers/soc/aspeed/aspeed-xdma.c | 64 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-xdma.c b/drivers/soc/aspeed/aspeed-xdma.c index 2162ca0..002b571 100644 --- a/drivers/soc/aspeed/aspeed-xdma.c +++ b/drivers/soc/aspeed/aspeed-xdma.c @@ -667,6 +667,64 @@ static void aspeed_xdma_free_vga_blks(struct aspeed_xdma *ctx) } } +static int aspeed_xdma_change_pcie_conf(struct aspeed_xdma *ctx, u32 conf) +{ + int rc; + + mutex_lock(&ctx->start_lock); + rc = wait_event_interruptible_timeout(ctx->wait, + !test_bit(XDMA_IN_PRG, + &ctx->flags), + msecs_to_jiffies(1000)); + if (rc < 0) { + mutex_unlock(&ctx->start_lock); + return -EINTR; + } + + /* previous op didn't complete, wake up waiters anyway */ + if (!rc) + wake_up_interruptible_all(&ctx->wait); + + reset_control_assert(ctx->reset); + msleep(10); + + aspeed_scu_pcie_write(ctx, conf); + msleep(10); + + reset_control_deassert(ctx->reset); + msleep(10); + + aspeed_xdma_init_eng(ctx); + + mutex_unlock(&ctx->start_lock); + + return 0; +} + +static ssize_t aspeed_xdma_use_bmc(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int rc; + struct aspeed_xdma *ctx = dev_get_drvdata(dev); + + rc = aspeed_xdma_change_pcie_conf(ctx, aspeed_xdma_bmc_pcie_conf); + return rc ?: count; +} +static DEVICE_ATTR(use_bmc, 0200, NULL, aspeed_xdma_use_bmc); + +static ssize_t aspeed_xdma_use_vga(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int rc; + struct aspeed_xdma *ctx = dev_get_drvdata(dev); + + rc = aspeed_xdma_change_pcie_conf(ctx, aspeed_xdma_vga_pcie_conf); + return rc ?: count; +} +static DEVICE_ATTR(use_vga, 0200, NULL, aspeed_xdma_use_vga); + static int aspeed_xdma_probe(struct platform_device *pdev) { int irq; @@ -745,6 +803,9 @@ static int aspeed_xdma_probe(struct platform_device *pdev) return rc; } + device_create_file(dev, &dev_attr_use_bmc); + device_create_file(dev, &dev_attr_use_vga); + return 0; } @@ -752,6 +813,9 @@ static int aspeed_xdma_remove(struct platform_device *pdev) { struct aspeed_xdma *ctx = platform_get_drvdata(pdev); + device_remove_file(ctx->dev, &dev_attr_use_vga); + device_remove_file(ctx->dev, &dev_attr_use_bmc); + misc_deregister(&ctx->misc); aspeed_xdma_free_vga_blks(ctx); From patchwork Mon May 20 20:19:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102347 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579HZ0cwpz9sBp for ; Tue, 21 May 2019 06:20:10 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4579HY6fFzzDqKv for ; Tue, 21 May 2019 06:20:09 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=eajames@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4579HJ03NKzDqKw for ; Tue, 21 May 2019 06:19:55 +1000 (AEST) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4KK6wdE146979 for ; Mon, 20 May 2019 16:19:53 -0400 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0a-001b2d01.pphosted.com with ESMTP id 2skyusfduy-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 20 May 2019 16:19:53 -0400 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 20 May 2019 21:19:48 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJlPC18874424 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:47 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5DD1FB2065; Mon, 20 May 2019 20:19:47 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B62EBB2064; Mon, 20 May 2019 20:19:46 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:46 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 5/7] drivers/soc: xdma: Add debugfs entries Date: Mon, 20 May 2019 15:19:23 -0500 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19052020-0040-0000-0000-000004F20B03 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011132; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01206180; UDB=6.00633348; IPR=6.00987139; MB=3.00026974; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-20 20:19:50 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19052020-0041-0000-0000-000008FE1E00 Message-Id: <1558383565-11821-6-git-send-email-eajames@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Add debugfs entries for the relevant XDMA engine registers and for dumping the AST2500 reserved memory space. Signed-off-by: Eddie James --- drivers/soc/aspeed/aspeed-xdma.c | 96 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-xdma.c b/drivers/soc/aspeed/aspeed-xdma.c index 002b571..c083173 100644 --- a/drivers/soc/aspeed/aspeed-xdma.c +++ b/drivers/soc/aspeed/aspeed-xdma.c @@ -147,6 +147,12 @@ struct aspeed_xdma { struct list_head vga_blks_free; struct miscdevice misc; + struct dentry *debugfs_dir; + +#if IS_ENABLED(CONFIG_DEBUG_FS) + struct debugfs_regset32 regset; + struct debugfs_reg32 regs[XDMA_NUM_DEBUGFS_REGS]; +#endif /* IS_ENABLED(CONFIG_DEBUG_FS) */ }; struct aspeed_xdma_client { @@ -656,6 +662,92 @@ static int aspeed_xdma_init_mem(struct aspeed_xdma *ctx) return 0; } +#if IS_ENABLED(CONFIG_DEBUG_FS) +static ssize_t aspeed_xdma_debugfs_vga_read(struct file *file, + char __user *buf, size_t len, + loff_t *offset) +{ + int rc; + struct inode *inode = file_inode(file); + struct aspeed_xdma *ctx = inode->i_private; + void __iomem *vga = ioremap(ctx->vga_phys, ctx->vga_size); + loff_t offs = *offset; + void *tmp; + + if (!vga) + return -ENOMEM; + + if (len + offs > ctx->vga_size) { + iounmap(vga); + return -EINVAL; + } + + tmp = kzalloc(len, GFP_KERNEL); + if (!tmp) { + iounmap(vga); + return -ENOMEM; + } + + memcpy_fromio(tmp, vga + offs, len); + + rc = copy_to_user(buf, tmp, len); + if (rc) { + iounmap(vga); + kfree(tmp); + return rc; + } + + *offset = offs + len; + + kfree(tmp); + iounmap(vga); + + return len; +} + +static const struct file_operations aspeed_xdma_debugfs_vga_fops = { + .owner = THIS_MODULE, + .llseek = generic_file_llseek, + .read = aspeed_xdma_debugfs_vga_read, +}; + +static void aspeed_xdma_init_debugfs(struct aspeed_xdma *ctx) +{ + ctx->debugfs_dir = debugfs_create_dir(DEVICE_NAME, NULL); + if (IS_ERR_OR_NULL(ctx->debugfs_dir)) { + dev_warn(ctx->dev, "Failed to create debugfs directory.\n"); + return; + } + + debugfs_create_file("vga", 0444, ctx->debugfs_dir, ctx, + &aspeed_xdma_debugfs_vga_fops); + + ctx->regs[0].name = "addr"; + ctx->regs[0].offset = XDMA_BMC_CMD_QUEUE_ADDR; + ctx->regs[1].name = "endp"; + ctx->regs[1].offset = XDMA_BMC_CMD_QUEUE_ENDP; + ctx->regs[2].name = "writep"; + ctx->regs[2].offset = XDMA_BMC_CMD_QUEUE_WRITEP; + ctx->regs[3].name = "readp"; + ctx->regs[3].offset = XDMA_BMC_CMD_QUEUE_READP; + ctx->regs[4].name = "control"; + ctx->regs[4].offset = XDMA_CTRL; + ctx->regs[5].name = "status"; + ctx->regs[5].offset = XDMA_STATUS; + + ctx->regset.regs = ctx->regs; + ctx->regset.nregs = XDMA_NUM_DEBUGFS_REGS; + ctx->regset.base = ctx->base; + + debugfs_create_regset32("regs", 0444, ctx->debugfs_dir, &ctx->regset); +} +#else +static void aspeed_xdma_init_debugfs(struct aspeed_xdma *ctx) +{ +} + +#endif /* IS_ENABLED(CONFIG_DEBUG_FS) */ + static void aspeed_xdma_free_vga_blks(struct aspeed_xdma *ctx) { struct aspeed_xdma_vga_blk *free; @@ -806,6 +898,8 @@ static int aspeed_xdma_probe(struct platform_device *pdev) device_create_file(dev, &dev_attr_use_bmc); device_create_file(dev, &dev_attr_use_vga); + aspeed_xdma_init_debugfs(ctx); + return 0; } @@ -813,6 +907,8 @@ static int aspeed_xdma_remove(struct platform_device *pdev) { struct aspeed_xdma *ctx = platform_get_drvdata(pdev); + debugfs_remove_recursive(ctx->debugfs_dir); + device_remove_file(ctx->dev, &dev_attr_use_vga); device_remove_file(ctx->dev, &dev_attr_use_bmc); From patchwork Mon May 20 20:19:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102350 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579Hn3rFXz9s3Z for ; Tue, 21 May 2019 06:20:21 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4579Hn2g8vzDqLX for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 20 May 2019 21:19:50 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJnMl36044972 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:49 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 62A7DB205F; Mon, 20 May 2019 20:19:49 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BAC8DB2068; Mon, 20 May 2019 20:19:48 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:48 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 6/7] ARM: dts: aspeed: Add XDMA Engine Date: Mon, 20 May 2019 15:19:24 -0500 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19052020-0072-0000-0000-000004308865 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011132; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01206180; UDB=6.00633347; IPR=6.00987139; MB=3.00026974; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-20 20:19:53 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19052020-0073-0000-0000-00004C4BCB8F Message-Id: <1558383565-11821-7-git-send-email-eajames@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=928 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Add a node for the XDMA engine with all the necessary information. Signed-off-by: Eddie James --- arch/arm/boot/dts/aspeed-g5.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 4345c31..f9e9730 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -238,6 +238,14 @@ interrupts = <0x19>; }; + xdma: xdma@1e6e7000 { + compatible = "aspeed,ast2500-xdma"; + reg = <0x1e6e7000 0x100>; + resets = <&syscon ASPEED_RESET_XDMA>; + interrupts = <6>; + status = "disabled"; + }; + adc: adc@1e6e9000 { compatible = "aspeed,ast2500-adc"; reg = <0x1e6e9000 0xb0>; From patchwork Mon May 20 20:19:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1102349 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4579Hk1XQmz9s3Z for ; Tue, 21 May 2019 06:20:18 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4579Hk0NX4zDqL9 for ; Tue, 21 May 2019 06:20:18 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=eajames@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4579HK6m7tzDqKX for ; Tue, 21 May 2019 06:19:57 +1000 (AEST) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4KK7nCN046408 for ; Mon, 20 May 2019 16:19:55 -0400 Received: from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204]) by mx0b-001b2d01.pphosted.com with ESMTP id 2sm0wrvut3-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 20 May 2019 16:19:55 -0400 Received: from localhost by e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 20 May 2019 21:19:51 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x4KKJo9R35651736 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2019 20:19:51 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C926AB2065; Mon, 20 May 2019 20:19:50 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2D199B2064; Mon, 20 May 2019 20:19:50 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.179.222]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 20 May 2019 20:19:50 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Subject: [PATCH v2 7/7] ARM: dts: aspeed: witherspoon: Enable XDMA Engine Date: Mon, 20 May 2019 15:19:25 -0500 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> References: <1558383565-11821-1-git-send-email-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19052020-0052-0000-0000-000003C3B961 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011132; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01206180; UDB=6.00633348; IPR=6.00987139; MB=3.00026974; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-20 20:19:54 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19052020-0053-0000-0000-000060FA02E8 Message-Id: <1558383565-11821-8-git-send-email-eajames@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-20_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=728 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905200126 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, robh+dt@kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Enable the XDMA engine node. Signed-off-by: Eddie James --- arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts index f1356ca..9d02759 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts @@ -640,3 +640,7 @@ &vhub { status = "okay"; }; + +&xdma { + status = "okay"; +};