From patchwork Thu May 16 03:18:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100276 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="W5XLehzP"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454HNc4G4yz9sN6 for ; Thu, 16 May 2019 13:44:30 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 35540C21E13; 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Thu, 16 May 2019 03:18:52 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:18:52 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 01/15] mx7ulp: Add common plugin codes for mx7ulp Thread-Index: AQHVC5YV3jvNgUDJXkCXTDpxl97iuQ== Date: Thu, 16 May 2019 03:18:51 +0000 Message-ID: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6d93e6c8-c448-4eb8-63bb-08d6d9ad3844 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: qaTeusZV+Zf55mjF906vsD/H6EivuPL6GgswrStgKwgiOddK7jDs42aJDluWAKjc/MjYL3h8+SV0sOtV1cLNaXUOrCViRe+a/GNFDs25RP6R8YkXDlwAy46D+AzsC+TQwdpiUE6ZKAkHmHPmM/7TAAtNzIyWL4pZCwq9mW++m/Rec0aJFX8zHe9/VPFwZWwq5hwtBQiCFUNl3zTSInJcKMgFa169iHyqcCCylOHVHvaX4B5jhPwAFRkzhSak0Q6l1c3ltI9TlSjtsGanOJ53oqe+RnHEO/uDY78za48uuHTMKTzpFSpeqdPB1Hy0+N7FJ27UwWu+EOvH7NimJgk3I0+7pb17ZjTVwHegWAXXgSqIdED9G/9Rn69kKhOXwXqpIcZPT4QT/d8/kLUCAeSzu00Ky1rd0rv+NEdIblDtsl8= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6d93e6c8-c448-4eb8-63bb-08d6d9ad3844 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:18:51.9557 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 01/15] mx7ulp: Add common plugin codes for mx7ulp X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ye Li Add common plugin codes to call ROM's hwcnfg_setup and generate IVT2 header. Signed-off-by: Ye Li Signed-off-by: Peng Fan Tested-by: Fabio Estevam --- arch/arm/include/asm/arch-mx7ulp/mx7ulp_plugin.S | 93 ++++++++++++++++++++++++ arch/arm/mach-imx/Kconfig | 2 +- 2 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-mx7ulp/mx7ulp_plugin.S diff --git a/arch/arm/include/asm/arch-mx7ulp/mx7ulp_plugin.S b/arch/arm/include/asm/arch-mx7ulp/mx7ulp_plugin.S new file mode 100644 index 0000000000..bcc804b58f --- /dev/null +++ b/arch/arm/include/asm/arch-mx7ulp/mx7ulp_plugin.S @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#include + +#define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180 +#define ROM_VERSION_OFFSET 0x80 +#define ROM_API_HWCNFG_SETUP_OFFSET 0x08 + +plugin_start: + + push {r0-r4, lr} + + imx7ulp_ddr_setting + imx7ulp_clock_gating + imx7ulp_qos_setting + +normal_boot: + +/* + * The following is to fill in those arguments for this ROM function + * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data) + * This function is used to copy data from the storage media into DDR. + * start - Initial (possibly partial) image load address on entry. + * Final image load address on exit. + * bytes - Initial (possibly partial) image size on entry. + * Final image size on exit. + * boot_data - Initial @ref ivt Boot Data load address. + */ + adr r0, boot_data2 + adr r1, image_len2 + adr r2, boot_data2 + +/* + * check the _pu_irom_api_table for the address + */ +before_calling_rom___pu_irom_hwcnfg_setup: + ldr r3, =ROM_VERSION_OFFSET + ldr r4, [r3] + ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY + ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET] + blx r4 +after_calling_rom___pu_irom_hwcnfg_setup: + +/* + * To return to ROM from plugin, we need to fill in these argument. + * Here is what need to do: + * Need to construct the parameters for this function before return to ROM: + * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset) + */ + pop {r0-r4, lr} + push {r5} + ldr r5, boot_data2 + str r5, [r0] + ldr r5, image_len2 + str r5, [r1] + ldr r5, second_ivt_offset + str r5, [r2] + mov r0, #1 + pop {r5} + + /* return back to ROM code */ + bx lr + +/* make the following data right in the end of the output*/ +.ltorg + +#define FLASH_OFFSET 0x400 + +/* + * second_ivt_offset is the offset from the "second_ivt_header" to + * "image_copy_start", which involves FLASH_OFFSET, plus the first + * ivt_header, the plugin code size itself recorded by "ivt2_header" + */ + +second_ivt_offset: .long (ivt2_header + 0x2C + FLASH_OFFSET) + +/* + * The following is the second IVT header plus the second boot data + */ +ivt2_header: .long 0x0 +app2_code_jump_v: .long 0x0 +reserv3: .long 0x0 +dcd2_ptr: .long 0x0 +boot_data2_ptr: .long 0x0 +self_ptr2: .long 0x0 +app_code_csf2: .long 0x0 +reserv4: .long 0x0 +boot_data2: .long 0x0 +image_len2: .long 0x0 +plugin2: .long 0x0 diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index ec09ef240f..b6fd1595f0 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -29,7 +29,7 @@ config IMX_BOOTAUX config USE_IMXIMG_PLUGIN bool "Use imximage plugin code" - depends on ARCH_MX7 || ARCH_MX6 + depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX7ULP help i.MX6/7 supports DCD and Plugin. Enable this configuration to use Plugin, otherwise DCD will be used. From patchwork Thu May 16 03:18:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100275 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="bKxCN/bw"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454HNc4MCcz9sNC for ; Thu, 16 May 2019 13:44:30 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 6E65CC21C4A; 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Thu, 16 May 2019 03:18:54 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:18:54 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 02/15] imx: i.MX7ULP: add get_boot_device Thread-Index: AQHVC5YXFpULxuQteEubdae+aoJEYA== Date: Thu, 16 May 2019 03:18:54 +0000 Message-ID: <20190516033236.10594-2-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 531f691b-579d-45c8-2c8b-08d6d9ad399f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: qpikIOcEEXXH8HrvxfhYGjruhN5r/sfguJoF14DRNg33uYo9LF3E9F+H52iudtb7c2vgOKLTzEAFJqx0vps96my2Hba3zWHynSWo5lVscFdh6szRPmWdEL0ib92jXwSoJMb8weXfo+VkyGilZF4l3Rqa59snCwYzx+wrU45pN9Dk1lOix4cYuZ7TyHw34kEG6vrElqRzE9bAuygNMx3lB/v2dcNT07wbH2eWY0GcpZ2xNbaVk+pfivWhfetbmihSPDyfOVyxsJHB8cTBGbmKpG676d/3pLE+bdxAPlnf/QUUJwApnWWm2/CdXcF9sHwrQ3UfSlojFVbrAYbGiOpYfDvCDVWz3wr6FLtkgYz4YQi5qF3V2pts22c+lKZk1qB7XGhxol3DigiYwizfRdFjph2gJjFq4DumuH3pAf/95Q4= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 531f691b-579d-45c8-2c8b-08d6d9ad399f X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:18:54.1514 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 02/15] imx: i.MX7ULP: add get_boot_device X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add get_boot_device for i.MX7ULP Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 13 +++++++++++++ arch/arm/include/asm/arch-mx7ulp/sys_proto.h | 1 + arch/arm/mach-imx/mx7ulp/soc.c | 27 +++++++++++++++++++++++++++ 3 files changed, 41 insertions(+) diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index 63b02de087..d58ed43199 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -10,6 +10,8 @@ #define ARCH_MXC +#define ROM_SW_INFO_ADDR 0x000001E8 + #define CAAM_SEC_SRAM_BASE (0x26000000) #define CAAM_SEC_SRAM_SIZE (SZ_32K) #define CAAM_SEC_SRAM_END (CAAM_SEC_SRAM_BASE + CAAM_SEC_SRAM_SIZE - 1) @@ -1112,6 +1114,17 @@ struct usbphy_regs { u32 usb1_pfda_ctrl1_tog; /* 0x14c */ }; +struct bootrom_sw_info { + u8 reserved_1; + u8 boot_dev_instance; + u8 boot_dev_type; + u8 reserved_2; + u32 core_freq; + u32 axi_freq; + u32 ddr_freq; + u32 rom_tick_freq; + u32 reserved_3[3]; +}; #define is_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20))) #define disconnect_from_pc(void) writel(0x0, USBOTG0_RBASE + 0x140) diff --git a/arch/arm/include/asm/arch-mx7ulp/sys_proto.h b/arch/arm/include/asm/arch-mx7ulp/sys_proto.h index 6ecde7db93..0e4c8ad15d 100644 --- a/arch/arm/include/asm/arch-mx7ulp/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7ulp/sys_proto.h @@ -17,4 +17,5 @@ enum bt_mode { SINGLE_BOOT /* LP_BT = 0, DUAL_BT = 0 */ }; +enum boot_device get_boot_device(void); #endif diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index c72f0ed3fc..6015c11869 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -6,6 +6,7 @@ #include #include #include +#include #include static char *get_reset_cause(char *); @@ -244,3 +245,29 @@ int mmc_get_env_dev(void) return board_mmc_get_env_dev(devno); } #endif + +enum boot_device get_boot_device(void) +{ + struct bootrom_sw_info **p = + (struct bootrom_sw_info **)ROM_SW_INFO_ADDR; + + enum boot_device boot_dev = SD1_BOOT; + u8 boot_type = (*p)->boot_dev_type; + u8 boot_instance = (*p)->boot_dev_instance; + + switch (boot_type) { + case BOOT_TYPE_SD: + boot_dev = boot_instance + SD1_BOOT; + break; + case BOOT_TYPE_MMC: + boot_dev = boot_instance + MMC1_BOOT; + break; + case BOOT_TYPE_USB: + boot_dev = USB_BOOT; + break; + default: + break; + } + + return boot_dev; +} From patchwork Thu May 16 03:18:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100277 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; 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Thu, 16 May 2019 03:18:56 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 03/15] i.MX7ULP: evk: Modify FDT file to disable SD3.0 for usb boot Thread-Index: AQHVC5YYw+7M+lU5yEGYRtmY/dFc3g== Date: Thu, 16 May 2019 03:18:56 +0000 Message-ID: <20190516033236.10594-3-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 2dc89176-c026-48ac-7c70-08d6d9ad3af2 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: ZVX/fpb+PuIMg/r0P9ZeVwEq1w/TJpgTd1CFIPuhcdCJWMyCTK0y0HvtszDYelNLqfTOq9XQRRRFGTHoZ0gkzI/WusPNdWH4YoobI3LBhTqhbqiQc2LAdnsciSVwONkhIqHPcqi3TEfdoXxM8omifgp6uDhoigQStZHA5IjIDWvWFu+ZmSw5rU4JJ+CEnWo7GMRq84qcxb5cB1Nyy2AW1qSW5HRAnRwrOjuYn7wTcWuarbpYDr/kRGb+rbtOZv+DJYSxecCaiA+VDvpJXPX5Rm6LYFYECEga100/fbgpuLWXTeuBTHl9p8489euVNqPemDKac9kjrvxLbs4AWKExXfQU1XrVEh/sPOt61ZpRbeSXuEvOPBrlorphZBehZ4rJc5tPbaJnjuaf2L1RLWV8v6hqxNnbbKe+n2XksWAPDeQ= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2dc89176-c026-48ac-7c70-08d6d9ad3af2 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:18:56.4001 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 03/15] i.MX7ULP: evk: Modify FDT file to disable SD3.0 for usb boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Since the SD3.0 kernel driver needs M4 image support, this causes problem for usb boot booting into kernel. To decouple the relationship, we modify the FDT file in u-boot to disable SD3.0. So the kernel won't depend on M4 image. Signed-off-by: Peng Fan --- board/freescale/mx7ulp_evk/mx7ulp_evk.c | 47 +++++++++++++++++++++++++++++++++ configs/mx7ulp_evk_defconfig | 1 + 2 files changed, 48 insertions(+) diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c index 3a12fe1551..7527263577 100644 --- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c +++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c @@ -4,10 +4,12 @@ */ #include +#include #include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -45,3 +47,48 @@ int board_init(void) return 0; } + +#if IS_ENABLED(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, bd_t *bd) +{ + const char *path; + int rc, nodeoff; + + if (get_boot_device() == USB_BOOT) { + path = fdt_get_alias(blob, "mmc0"); + if (!path) { + puts("Not found mmc0\n"); + return 0; + } + + nodeoff = fdt_path_offset(blob, path); + if (nodeoff < 0) + return 0; + + printf("Found usdhc0 node\n"); + if (fdt_get_property(blob, nodeoff, "vqmmc-supply", + NULL) != NULL) { + rc = fdt_delprop(blob, nodeoff, "vqmmc-supply"); + if (!rc) { + puts("Removed vqmmc-supply property\n"); +add: + rc = fdt_setprop(blob, nodeoff, + "no-1-8-v", NULL, 0); + if (rc == -FDT_ERR_NOSPACE) { + rc = fdt_increase_size(blob, 32); + if (!rc) + goto add; + } else if (rc) { + printf("Failed to add no-1-8-v property, %d\n", rc); + } else { + puts("Added no-1-8-v property\n"); + } + } else { + printf("Failed to remove vqmmc-supply property, %d\n", rc); + } + } + } + + return 0; +} +#endif diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index d125ccc1af..c7af66b2e9 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX7ULP=y CONFIG_SYS_TEXT_BASE=0x67800000 CONFIG_TARGET_MX7ULP_EVK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOUNCE_BUFFER=y CONFIG_HUSH_PARSER=y From patchwork Thu May 16 03:18:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100264 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="baB7ahOD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454GwH5rmKz9sD4 for ; Thu, 16 May 2019 13:23:27 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 703D9C21DA1; Thu, 16 May 2019 03:19:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 36A0CC21C4A; Thu, 16 May 2019 03:19:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id ACC56C21DDC; Thu, 16 May 2019 03:19:04 +0000 (UTC) Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr150079.outbound.protection.outlook.com [40.107.15.79]) by lists.denx.de (Postfix) with ESMTPS id 29B74C21D4A for ; Thu, 16 May 2019 03:19:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0BhulCELVI/GFq6imrTK+N2hYQ+d5WaCtMUMqmOq0u0=; b=baB7ahODEgjYnpOt4Fi5p2G5k+utGABV9v9rZSxisqNNDXc32BAV72cM3fgbDn2RP4G9BZ8TysnL570CCMcqU9KZjBJd5gglB7/UidAw1zf/LLyH1d4HFQyYMutbI4uqZ1y7CpYYbumG+nEJZOt5qs7mymKygHMBwUTv83GaLTE= Received: from AM0PR04MB4481.eurprd04.prod.outlook.com (52.135.147.15) by AM0PR04MB6594.eurprd04.prod.outlook.com (20.179.255.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1878.24; Thu, 16 May 2019 03:18:59 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:18:59 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 04/15] i.MX7ULP: Fix system reset after a7 rtc alarm expired. Thread-Index: AQHVC5YarUPGkrLczkylFLgWGoR2jQ== Date: Thu, 16 May 2019 03:18:58 +0000 Message-ID: <20190516033236.10594-4-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 19ea6781-087b-4aed-a2ad-08d6d9ad3c69 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:AM0PR04MB6594; x-ms-traffictypediagnostic: AM0PR04MB6594: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:305; x-forefront-prvs: 0039C6E5C5 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(39860400002)(136003)(376002)(366004)(346002)(396003)(199004)(189003)(2906002)(3846002)(66556008)(6116002)(8676002)(73956011)(81166006)(186003)(66476007)(6436002)(81156014)(66066001)(86362001)(6486002)(2616005)(11346002)(446003)(26005)(64756008)(7736002)(305945005)(6512007)(486006)(44832011)(476003)(316002)(66946007)(5660300002)(102836004)(14444005)(256004)(8936002)(52116002)(54906003)(478600001)(1076003)(4326008)(71190400001)(71200400001)(36756003)(66446008)(14454004)(53936002)(110136005)(2501003)(386003)(68736007)(6506007)(76176011)(99286004)(25786009)(50226002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR04MB6594; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: c+qEGkAgzOEe5ZMokgjoAXQG3vxC1On7eN13vIqyk4PrATgdeFwFe4WNyoMpeIpuU0gSgxfMpNMNIWZV8xw5hTQyUei8ZpZS+rzEXYvlUadUgYY51XPuXD/VRe1QBy/UbxiOu8FzeTm9irFF1AizNJxLO3/k1ZGCwVv3mQ5zisgX9QgNlXL8OO+50lK52b6oNoLezzty5iOtq+X2rNxqdNXndgicb0BzedV1uadJTDK97/8wNcrXJpgOAVEYJ0dwUH83fS1/sGSaCeT6bQHmDQTTqlzvZ74682O1wieYZFb1P76L86VZ/1UlrUHtUp8tx0kgplNfaG+VfHVulitUqUDA/yIvyMZ84WqN7C2UngSR3gZELxfeTDeVsjSldNAlZlpGZaucWoijdYL/h6m1yfvNLZxqJY52GvTmBEju69s= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 19ea6781-087b-4aed-a2ad-08d6d9ad3c69 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:18:58.9696 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , Jacky Bai , dl-uboot-imx Subject: [U-Boot] [PATCH 04/15] i.MX7ULP: Fix system reset after a7 rtc alarm expired. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Bai Ping The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access it. So check the CPU rev and not apply the settings for B0. Signed-off-by: Bai Ping Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 7 +++++++ arch/arm/mach-imx/mx7ulp/soc.c | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index d58ed43199..3c82e9921e 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -58,6 +58,7 @@ #define USDHC1_AIPS2_SLOT (56) #define RGPIO2P0_AIPS0_SLOT (15) #define RGPIO2P1_AIPS2_SLOT (15) +#define SNVS_AIPS2_SLOT (35) #define IOMUXC0_AIPS0_SLOT (61) #define OCOTP_CTRL_AIPS1_SLOT (38) #define OCOTP_CTRL_PCC1_SLOT (38) @@ -177,6 +178,9 @@ #define USDHC0_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * USDHC0_AIPS2_SLOT))) #define USDHC1_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * USDHC1_AIPS2_SLOT))) +#define SNVS_BASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * SNVS_AIPS2_SLOT))) +#define SNVS_LP_LPCR (SNVS_BASE + 0x38) + #define RGPIO2P0_RBASE ((AIPS0_BASE + (AIPS0_SLOT_SIZE * RGPIO2P0_AIPS0_SLOT))) #define RGPIO2P1_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * RGPIO2P1_AIPS2_SLOT))) @@ -939,6 +943,9 @@ #define MMDC_MPWRDQBY3DL_WR_DQ25_DEL_MASK ((0x3f << MMDC_MPWRDQBY3DL_WR_DQ25_DEL)) #define MMDC_MPWRDQBY3DL_WR_DQ24_DEL_MASK ((0x3f << MMDC_MPWRDQBY3DL_WR_DQ24_DEL)) +#define SNVS_LPCR_DPEN (0x20) +#define SNVS_LPCR_SRTC_ENV (0x1) + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 6015c11869..7119ee4a07 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -106,6 +106,10 @@ void s_init(void) /* clock configuration. */ clock_init(); + if (soc_rev() < CHIP_REV_2_0) { + /* enable dumb pmic */ + writel((readl(SNVS_LP_LPCR) | SNVS_LPCR_DPEN), SNVS_LP_LPCR); + } return; } From patchwork Thu May 16 03:19:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100256 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="IZQ1wyuM"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454Gt426YRz9sD4 for ; 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bh=q7vKC/2FgXMD7RROyyTS9w2aZBTeEjvGd0OXiRupcl4=; b=IZQ1wyuMwAPSZ1gyi0SsR8sdxTEQCebiQWhL9zfNcRl0naIVUSZtHUQotq4mKgFJx+JnYz9l63CHWN72e5GD/nZYDnoYMAnotZpo3z+qPzqG8lMeLyIQ0YxAzgtgewL7P7v3lB9CFs8Oq4lygEtcpNWVh25iuVImgnIcTXJVNWY= Received: from AM0PR04MB4481.eurprd04.prod.outlook.com (52.135.147.15) by AM0PR04MB6594.eurprd04.prod.outlook.com (20.179.255.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1878.24; Thu, 16 May 2019 03:19:01 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:19:01 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 05/15] i.MX7ULP: Correct the clock index Thread-Index: AQHVC5Yb58z8+JhQCUSKsnOn5PvcCg== Date: Thu, 16 May 2019 03:19:01 +0000 Message-ID: <20190516033236.10594-5-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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Signed-off-by: Bai Ping Signed-off-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/scg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index b4f2ea875a..85d726fe30 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -440,7 +440,7 @@ static u32 scg_sys_get_rate(enum scg_clk clk) case SCG_SCS_SLOW_IRC: case SCG_SCS_FAST_IRC: case SCG_SCS_RTC_OSC: - rate = scg_src_get_rate(scg_scs_array[val]); + rate = scg_src_get_rate(scg_scs_array[val - 1]); break; case 5: rate = scg_apll_get_rate(); From patchwork Thu May 16 03:19:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100257 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; 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Thu, 16 May 2019 03:19:04 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 06/15] i.MX7ULP: Fix PCC register bits mask and offset issue Thread-Index: AQHVC5YdXaSawipk90+awcPWgMepAQ== Date: Thu, 16 May 2019 03:19:04 +0000 Message-ID: <20190516033236.10594-6-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: dc9b2510-8e59-4b4e-bbe9-08d6d9ad3f88 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: RzOKRaUpPOYru/hGtfS57/czmg7af5yp9G+ESaLJ3DfnIFHYNdGNhB6X/50byb9oucW76KQJGcH64eDLyTryZ7ENfwoAIHFZWJryT1wozebmGDXeMfaweWmIzyIxq4rhKm1QU5Cc4Pje44xoQie1DYIVL3oFKLrfwlLTcF2xw5k0wR0Mnlz2Rg0UODbUlfUEYnWkyuFD9Pug3sp5y+f8dVGnJKr19JMoUro4LHsUZViwdh6RI5XTDcJ5wXDKlC1L0QY3OjDzmTI16LF5aODB9XcsR6psPhjdLvb5pJAZjpHXenqBUCQ+gLC9kkxrCmlBi/ALn797zX1xzmKB/NzDnIAGXTPL87bPGI0qKekXay504UTpPrkmScvGLxM7oQZlJunKWArKUoOw6/ENfoyE07x05js3sk7pC8jZMDbb4M0= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: dc9b2510-8e59-4b4e-bbe9-08d6d9ad3f88 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:19:04.2466 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 06/15] i.MX7ULP: Fix PCC register bits mask and offset issue X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ye Li The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we can't get the right frequency. Fix them to correct value. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-mx7ulp/pcc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx7ulp/pcc.h b/arch/arm/include/asm/arch-mx7ulp/pcc.h index 67a0936150..dee3cfcdc0 100644 --- a/arch/arm/include/asm/arch-mx7ulp/pcc.h +++ b/arch/arm/include/asm/arch-mx7ulp/pcc.h @@ -289,10 +289,10 @@ enum pcc3_entry { #define PCC_INUSE_MASK (0x1 << PCC_INUSE_OFFSET) #define PCC_PCS_OFFSET 24 #define PCC_PCS_MASK (0x7 << PCC_PCS_OFFSET) -#define PCC_FRAC_OFFSET 4 +#define PCC_FRAC_OFFSET 3 #define PCC_FRAC_MASK (0x1 << PCC_FRAC_OFFSET) #define PCC_PCD_OFFSET 0 -#define PCC_PCD_MASK (0xf << PCC_PCD_OFFSET) +#define PCC_PCD_MASK (0x7 << PCC_PCD_OFFSET) enum pcc_clksrc_type { From patchwork Thu May 16 03:19:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100260 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Thu, 16 May 2019 03:19:06 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 07/15] i.MX7ULP: Add CONFIG_MX7ULP to kconfig Thread-Index: AQHVC5YeaFZjHmXbX0+RC8INmWbbqQ== Date: Thu, 16 May 2019 03:19:06 +0000 Message-ID: <20190516033236.10594-7-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 21f86194-3e16-4504-e4b8-08d6d9ad4118 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Add this entry to cpu's kconfig. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/Kconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig index d4b0299dbd..ed5f0aeb2d 100644 --- a/arch/arm/mach-imx/mx7ulp/Kconfig +++ b/arch/arm/mach-imx/mx7ulp/Kconfig @@ -3,12 +3,16 @@ if ARCH_MX7ULP config SYS_SOC default "mx7ulp" +config MX7ULP + bool + choice prompt "MX7ULP board select" optional config TARGET_MX7ULP_EVK - bool "Support mx7ulp EVK board" + bool "Support mx7ulp EVK board" + select MX7ULP select SYS_ARCH_TIMER endchoice From patchwork Thu May 16 03:19:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100265 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; 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Thu, 16 May 2019 03:19:09 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 08/15] i.MX7ULP: Fix wrong i2c configuration name Thread-Index: AQHVC5YgW8U+oRjZ/Uyj2RGEol/Ghg== Date: Thu, 16 May 2019 03:19:09 +0000 Message-ID: <20190516033236.10594-8-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 39183e12-843f-4f56-0534-08d6d9ad42a4 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Correct it. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-mx7ulp/clock.h | 2 +- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx7ulp/clock.h b/arch/arm/include/asm/arch-mx7ulp/clock.h index bf69785831..eb02a20fdc 100644 --- a/arch/arm/include/asm/arch-mx7ulp/clock.h +++ b/arch/arm/include/asm/arch-mx7ulp/clock.h @@ -26,7 +26,7 @@ enum mxc_clock { u32 mxc_get_clock(enum mxc_clock clk); u32 get_lpuart_clk(void); -#ifdef CONFIG_SYS_LPI2C_IMX +#ifdef CONFIG_SYS_I2C_IMX_LPI2C int enable_i2c_clk(unsigned char enable, unsigned i2c_num); u32 imx_get_i2cclk(unsigned i2c_num); #endif diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fac9011388..0a0165cad2 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -72,7 +72,7 @@ u32 get_lpuart_clk(void) return pcc_clock_get_rate(lpuart_pcc_clks[index - 4]); } -#ifdef CONFIG_SYS_LPI2C_IMX +#ifdef CONFIG_SYS_I2C_IMX_LPI2C int enable_i2c_clk(unsigned char enable, unsigned i2c_num) { /* Set parent to FIRC DIV2 clock */ diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index c7af66b2e9..62a1ed6393 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -21,6 +21,7 @@ CONFIG_DM_GPIO=y CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_ESDHC=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index fcead94f57..1c6f0e7590 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -20,6 +20,7 @@ CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set CONFIG_DM_I2C=y CONFIG_DM_MMC=y +CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_ESDHC=y CONFIG_PINCTRL=y From patchwork Thu May 16 03:19:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100271 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Thu, 16 May 2019 03:19:11 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 09/15] misc: Kconfig: make i.MX7ULP could use MXC_OCOTP Thread-Index: AQHVC5YhhC7ILWpWp0KR5DMceT/tXw== Date: Thu, 16 May 2019 03:19:11 +0000 Message-ID: <20190516033236.10594-9-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 56273d93-cc8b-40c6-2843-08d6d9ad440b x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Thu, 16 May 2019 03:19:14 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 10/15] i.MX7ULP: evk: Enable fuse comamnd Thread-Index: AQHVC5YjmZb86ZE590yPapbPW7LmZw== Date: Thu, 16 May 2019 03:19:14 +0000 Message-ID: <20190516033236.10594-10-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: e52aa330-a772-48b5-5c9a-08d6d9ad4573 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Thu, 16 May 2019 03:19:16 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 11/15] i.MX7ULP: Fix SPLL/APLL clock rate calculation issue Thread-Index: AQHVC5Ykw7MfGIARTE6nEZlRdtLDkQ== Date: Thu, 16 May 2019 03:19:16 +0000 Message-ID: <20190516033236.10594-11-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4d9c0e93-ea86-4790-193d-08d6d9ad46ff x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/scg.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index 85d726fe30..a28a2bc81b 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -503,7 +503,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -532,7 +535,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_USB: reg = readl(&scg1_regs->upllcsr); From patchwork Thu May 16 03:19:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100261 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Thu, 16 May 2019 03:19:19 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 12/15] i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz Thread-Index: AQHVC5YmDmFIJ97mG0iRCMmRZZly8w== Date: Thu, 16 May 2019 03:19:19 +0000 Message-ID: <20190516033236.10594-12-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b63c6460-154b-42df-da6a-08d6d9ad4888 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: xvG4MJ7iLMVa3kxypuY70HqQ4Zeff9DXa/PyxnHyk9ulemiaj9cUjGAZ0FVgLUF69rKyND4+beGJhxijkO670/4lJg+8AG6ziSsrjvk87nGZ2jAGBDUEYQZ4ajb57LU2qkWN4Uuv3AU+fOVindHIw9oAohB5XqJA65tMtC4GLFBqBNkkS0xxqSbOkwLa4h0LNV8HJD1o51DFlZsCeUmSAJuRsIjvRJ3/SMg8DPDmeQwfB4Za9+M9x2nJTtqEG9ESI/PvBKvwOJnXQAhP9JKOxJa3vlKmx4wqd3UIDWCjPPTArP7tEged7eSrr1Kuk2Us1qCCCCPMQaOvE1SOLtSe64nR+toGVSumfsOBqfZgTS4Stn4om9B1L31ggy5FxSQyoGocgsSQdVJhbYAKZgOmYrcTKcRtNcZh0nqXxiosATc= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b63c6460-154b-42df-da6a-08d6d9ad4888 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:19:19.3489 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 12/15] i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ye Li The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index 0a0165cad2..6d6697ad99 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -300,9 +300,9 @@ void clock_init(void) scg_a7_soscdiv_init(); - /* APLL PFD1 = 270Mhz, PFD2=480Mhz, PFD3=800Mhz */ + /* APLL PFD1 = 270Mhz, PFD2=345.6Mhz, PFD3=800Mhz */ scg_enable_pll_pfd(SCG_APLL_PFD1_CLK, 35); - scg_enable_pll_pfd(SCG_APLL_PFD2_CLK, 20); + scg_enable_pll_pfd(SCG_APLL_PFD2_CLK, 28); scg_enable_pll_pfd(SCG_APLL_PFD3_CLK, 12); init_clk_lpuart(); From patchwork Thu May 16 03:19:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100259 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Thu, 16 May 2019 03:19:21 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 13/15] i.MX7ULP: Add CPU revision check for B0 Thread-Index: AQHVC5YnwXXfo0MKkEGrESUytdkgMQ== Date: Thu, 16 May 2019 03:19:21 +0000 Message-ID: <20190516033236.10594-13-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c606f275-e67e-42a1-35c2-08d6d9ad49f1 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 2DdTONtd5n38EMPLka2/jcckDNuH3XpIQjTPRw3GXUhTk0r8JyIYEkAdNXZfFhJrJqGQNnH9fMy5LD3/sVkyCKLCQ4GUbsp8f0ygbcY1rM3MRlMWCxFG32l146aTeR6tc5A4JX5ev+Ai7JpuG65LoMXSQEpVjXY0LJdwkD+zAlyWrRb0YGfjXxN/UPpyU01NhaU0UCICb1yr9Hur/rvJ4FyhAdOeRcs9WIFaVKoW9YGLWfS8hOmL9h1ILMFAySQAbTfa7Y5FkjrNg+GJwkdo7ABrgBKFgzJyQ5Sb+StAH8/0LUzO9WS6gXCWbjOKOgTQG4s6YXFnPO2UFRNTCr8Z+4WHjCNvCmoZjr9tdOGJqE6TBDeVrq/1tHMbhwFj2UK3fzeTb0ZEDlVTbMnpJDx3EOrjFZ89GKPQ7MruMEYtQhE= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c606f275-e67e-42a1-35c2-08d6d9ad49f1 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:19:21.7195 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 13/15] i.MX7ULP: Add CPU revision check for B0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Since there is no register for CPU revision, we use ROM version to check the A0 or B0 chip. Signed-off-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/soc.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 7119ee4a07..6c53aa106e 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -18,10 +18,13 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = { }; #endif +#define ROM_VERSION_ADDR 0x80 u32 get_cpu_rev(void) { - /* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */ - return (MXC_CPU_MX7ULP << 12) | (1 << 4); + /* Check the ROM version for cpu revision */ + u32 rom_version = readl((void __iomem *)ROM_VERSION_ADDR); + + return (MXC_CPU_MX7ULP << 12) | (rom_version & 0xFF); } #ifdef CONFIG_REVISION_TAG From patchwork Thu May 16 03:19:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100258 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="jkRv0sUS"; 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a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=v/u2IjIdbEkuETnSFdfvztSZy0dMIBopulhcY9SSX8Y=; b=jkRv0sUStrgl10BMJs0pbwa6SBxQbjyPMeL3wP2pV/pD+O8gUjXiiKIwQp8qyhvFNVXNp5l+CAUzMOMyCRcsreCusNDCrVY/i2IzasiG3SfDXyduZBWM3dddKqazcrXMQkVOwILcH/6b7P4vptLcc0DpRQA7aaV9yELYnwOxYUQ= Received: from AM0PR04MB4481.eurprd04.prod.outlook.com (52.135.147.15) by AM0PR04MB6594.eurprd04.prod.outlook.com (20.179.255.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1878.24; Thu, 16 May 2019 03:19:24 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:19:24 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 14/15] i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chip Thread-Index: AQHVC5Ypz+oeMHg0aUWLC+1Ekk7jMQ== Date: Thu, 16 May 2019 03:19:24 +0000 Message-ID: <20190516033236.10594-14-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR04MB6594; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: l42ZztpPg7m27lNnbwMbOouPoj6EZXWNw+cRSaZ1XXmEZ9vqm6n/sEXhPAA09ohAZjYF0kQpOPvxKkDKlljG3iU1qc2WQh4Ot8QTyGUdQN+v+Do1ihMMTBOVInO7CPoa0Xsw7OyDa6r7sliqUvF2di1HKLaWaXJj/3HZd9TaQe7q34I+uex1S1Qt796Rgu4f54HI50LX+ixYxR9hFo2ipRq3N4+eUSMbRkYoPkOD0gLUK3GgH9Ya96FZvTufpPRo7nT6WXqBURcbIArpTc4q4nrQ4IACuNqDzpLMqabYldLsWawuPOcVxOfP2kTh4SBkBN5SoyzthKHmnoQaTv/Y+qvRMxWFpl4j5UBfQOUJzq4f51PHyyUpO6fJmGl+S+YjPqkCvTNtdJPByoTKBuhbcbGPTXaExhco/8VdHc/MYi4= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4416e6cf-f3be-43ff-dca5-08d6d9ad4b7d X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:19:24.1331 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 14/15] i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chip X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ye Li The normal target frequency for ULP A7 core is 500Mhz, but now ROM set the core frequency to 413Mhz. So change it to 500Mhz in u-boot. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-mx7ulp/scg.h | 1 + arch/arm/mach-imx/mx7ulp/clock.c | 2 ++ arch/arm/mach-imx/mx7ulp/scg.c | 41 ++++++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+) diff --git a/arch/arm/include/asm/arch-mx7ulp/scg.h b/arch/arm/include/asm/arch-mx7ulp/scg.h index f1fae010da..531d8f3a95 100644 --- a/arch/arm/include/asm/arch-mx7ulp/scg.h +++ b/arch/arm/include/asm/arch-mx7ulp/scg.h @@ -337,5 +337,6 @@ void scg_a7_nicclk_init(void); void scg_a7_sys_clk_sel(enum scg_sys_src clk); void scg_a7_info(void); void scg_a7_soscdiv_init(void); +void scg_a7_init_core_clk(void); #endif diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index 6d6697ad99..65d7fcfa39 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -300,6 +300,8 @@ void clock_init(void) scg_a7_soscdiv_init(); + scg_a7_init_core_clk(); + /* APLL PFD1 = 270Mhz, PFD2=345.6Mhz, PFD3=800Mhz */ scg_enable_pll_pfd(SCG_APLL_PFD1_CLK, 35); scg_enable_pll_pfd(SCG_APLL_PFD2_CLK, 28); diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index a28a2bc81b..0d31352c77 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -1091,3 +1091,44 @@ void scg_a7_info(void) debug("SCG RCCR Value: 0x%x\n", readl(&scg1_regs->rccr)); debug("SCG Clock Status: 0x%x\n", readl(&scg1_regs->csr)); } + +void scg_a7_init_core_clk(void) +{ + u32 val = 0; + + /* + * The normal target frequency for ULP B0 is 500Mhz, + * but ROM set it to 413Mhz, need to change SPLL PFD0 FRAC + */ + if (soc_rev() >= CHIP_REV_2_0) { + /* Switch RCCR SCG to SOSC, firstly check the SOSC is valid */ + if ((readl(&scg1_regs->sosccsr) & SCG_SOSC_CSR_SOSCVLD_MASK)) { + val = readl(&scg1_regs->rccr); + val &= (~SCG_CCR_SCS_MASK); + val |= ((SCG_SCS_SYS_OSC) << SCG_CCR_SCS_SHIFT); + writel(val, &scg1_regs->rccr); + + /* Switch the PLLS to SPLL clk */ + val = readl(&scg1_regs->spllcfg); + val &= ~SCG_PLL_CFG_PLLSEL_MASK; + writel(val, &scg1_regs->spllcfg); + + /* + * Re-configure PFD0 to 19, + * A7 SPLL(528MHz) * 18 / 19 = 500MHz + */ + scg_enable_pll_pfd(SCG_SPLL_PFD0_CLK, 19); + + /* Switch the PLLS to SPLL PFD0 */ + val = readl(&scg1_regs->spllcfg); + val |= SCG_PLL_CFG_PLLSEL_MASK; + writel(val, &scg1_regs->spllcfg); + + /* Set RCCR SCG to SPLL clk out */ + val = readl(&scg1_regs->rccr); + val &= (~SCG_CCR_SCS_MASK); + val |= ((SCG_SCS_SYS_PLL) << SCG_CCR_SCS_SHIFT); + writel(val, &scg1_regs->rccr); + } + } +} From patchwork Thu May 16 03:19:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100269 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="QjvjfkWd"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454GxP0Qzfz9sDn for ; Thu, 16 May 2019 13:24:24 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 89312C21E47; Thu, 16 May 2019 03:22:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EF29DC21DFB; Thu, 16 May 2019 03:22:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C3D97C21E1E; Thu, 16 May 2019 03:19:30 +0000 (UTC) Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr150047.outbound.protection.outlook.com [40.107.15.47]) by lists.denx.de (Postfix) with ESMTPS id 5576BC21CB1 for ; Thu, 16 May 2019 03:19:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RWMXJ5ADnX2E2+MI8Dsxg7rNX9aIaIL4EPDunkm4w+4=; b=QjvjfkWdUhybqRojIO6BBihqRDFg0aPzjBfej923CakWYzY9580501MTzM2gVv1nSTm8GehQBFF9s2LIZnfym/zAke4QxF+td2FC6i/eQeunnM4XH+2zp4N5rOkRNHntmmvyN6p78wLJFmKKAmZOSDamylEfb2oGcr95dSii2YM= Received: from AM0PR04MB4481.eurprd04.prod.outlook.com (52.135.147.15) by AM0PR04MB6594.eurprd04.prod.outlook.com (20.179.255.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1878.24; Thu, 16 May 2019 03:19:26 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:19:26 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 15/15] i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT Thread-Index: AQHVC5YqgAjaYNfr5UmcS3WmXkD91Q== Date: Thu, 16 May 2019 03:19:26 +0000 Message-ID: <20190516033236.10594-15-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR04MB6594; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: isyvhHfMcVQcviErB6xkFfxYbn46oH9/5iwLEx1dDzSfKodyOP2OGwgCzzTVEG/evP9vS67caYcoOvuB+i2dox/dNSZpYfxzctrXZOLeJRSDiiieZSy21x3jEUSQlUydvsyO7qkvpLCIBfAxKZolKtNpTKhxryo9l2MbAixXMfc+zKeeI4clSdEEAXTv9r0s1SnD2yqLv5kZScM/Gns+2Uv6xRVpZ5KT60JyEwgE9b5fYXhz0a0v1PTN0ZBKwnoNgiu4bffubqe86lR0sZW9HAPhWd1yu/nsT8OjlJCgvG3kTw/SjT5DU+BTjb6H1UfNhqGivt3p0ytv5R+ztydjTw2JBInrolvKRDwkks3c9sNFkKF7SsY/qvtYwW0RGhiO6kHkZ4KrfdGs2w46PzgUmatJTAuekDSoBKEWSPgf1vE= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0950a6fb-d236-4549-f432-08d6d9ad4ccf X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:19:26.3358 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 15/15] i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ye Li On i.MX7ULP B0, there is change in NIC clock dividers architecture. On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but on B0 they are parallel with NIC1 DIV. So now the dividers are independent. This patch modifies the scg_nic_get_rate function according to this change. Signed-off-by: Ye Li Acked-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/scg.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index 0d31352c77..819c90af6c 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -352,7 +352,7 @@ static u32 scg_ddr_get_rate(void) static u32 scg_nic_get_rate(enum scg_clk clk) { - u32 reg, val, rate; + u32 reg, val, rate, nic0_rate; u32 shift, mask; reg = readl(&scg1_regs->niccsr); @@ -370,6 +370,7 @@ static u32 scg_nic_get_rate(enum scg_clk clk) val = (reg & SCG_NICCSR_NIC0DIV_MASK) >> SCG_NICCSR_NIC0DIV_SHIFT; rate = rate / (val + 1); + nic0_rate = rate; clk_debug("scg_nic_get_rate NIC0 rate %u\n", rate); @@ -411,6 +412,13 @@ static u32 scg_nic_get_rate(enum scg_clk clk) return 0; } + /* + * On RevB, the nic_bus and nic_ext dividers are parallel + * not chained with nic div + */ + if (soc_rev() >= CHIP_REV_2_0) + rate = nic0_rate; + val = (reg & mask) >> shift; rate = rate / (val + 1);