From patchwork Tue Apr 9 19:02:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1082639 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Q0YPIuB+"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44dxW45H0yz9sSQ for ; Wed, 10 Apr 2019 05:02:40 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 71634C21E30; Tue, 9 Apr 2019 19:02:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D21EAC21E0D; Tue, 9 Apr 2019 19:02:20 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A2F1BC21C4A; Tue, 9 Apr 2019 19:02:19 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id 64D99C21C29 for ; Tue, 9 Apr 2019 19:02:19 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id s15so22232954wra.12 for ; Tue, 09 Apr 2019 12:02:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aN5QGQhupOn3lVLm8H9sNEzMPRcBNg3plfUMhQrrdpM=; b=Q0YPIuB+t+WFuxOn/rhjQVhjH6k/AULdfnNyf6cql9026WtPjD8gZAlXl0L4T9bc0N /tu99pBCe77lt1LSQTmSYVPJo92WIazs3HhkJ4VfuwttUikgJlfeKtdYRySdOJqSLEMR rIDNyzKdCStnT/wbhoNWUYpzjawLEnTpDFV1IMXt/lpmtW7VV9qxtViqXf678+V1BOl4 q+J9btGZ6BVvuL/006cp1UGLpNRX/MNixDtnXyJDo6qLwJsv6B3vlRpfMjnPMdRmDO+U Jy9/jtSXfuzXhMbjkhJ4S6wlyeoIMfaRkpssEkM+9NCokKIsOBPRTQQBj3bWQRliDiX6 HcuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aN5QGQhupOn3lVLm8H9sNEzMPRcBNg3plfUMhQrrdpM=; b=PefcYsyuT0H5E4odFMIXcorXSqWsP3C2EWfBMfgr51rZOujQFFD4smI3+9dpmVyFYX IAI3dMsn+UUcNasnMHn8bn5yZAm8ivAP9HmPKUSTIXXtU/KDeVDeHUFlKAA7Qnea88z7 6UygOd0peveDsscmO4d3bj/i+XVoo2gs8R43e2ZVypYRQfhW/LfpKO5JCbKKZPww+Ncy EXyTirec1nBnKjnsxf/G/ao3VI+ZBOGMJiXrMNfOr0l7fgr33x/sVYuKoEUF4wOylefK fZEH90GFj+jBuqhBcl9dYZLU1mFjea3fNzIG6eT48tfsuaMQUUseK/Kcp9Mu/FVSS6tt kwcw== X-Gm-Message-State: APjAAAXSY2WOrCI+2jg1qw24piyf790ORAI6JNraKUBx6Ex5z63llinj Q4fhMP7nZMbCAQZO4FEpPDY= X-Google-Smtp-Source: APXvYqyo207tztM0VtC10U/oj8kaL2NdP0U4DqpLRfWMA7G3A6MflCj83uYril8Tf7JBR8QyHfeT3w== X-Received: by 2002:a5d:698b:: with SMTP id g11mr24819781wru.65.1554836534296; Tue, 09 Apr 2019 12:02:14 -0700 (PDT) Received: from ubuntu.home (HSI-KBW-046-005-136-229.hsi8.kabel-badenwuerttemberg.de. [46.5.136.229]) by smtp.gmail.com with ESMTPSA id g84sm23922551wmf.25.2019.04.09.12.02.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Apr 2019 12:02:13 -0700 (PDT) From: Simon Goldschmidt To: Marek Vasut , u-boot@lists.denx.de Date: Tue, 9 Apr 2019 21:02:03 +0200 Message-Id: <20190409190206.19257-2-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> References: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee , Tom Rini , Stefan Roese Subject: [U-Boot] [PATCH v4 1/4] arm: socfpga: fix comment about SPL memory layout X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The comment about SPL memory layout for socfpga gen5 is outdated: the initial malloc memory is now at the end of the SRAM, gd is below it (see board_init_f_alloc_reserve). Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- Changes in v4: None Changes in v3: None Changes in v2: None include/configs/socfpga_common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f9e2cdc1b3..32ee7426b6 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -236,9 +236,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * * 0xFFFF_0000 ...... Start of SRAM * 0xFFFF_xxxx ...... Top of stack (grows down) - * 0xFFFF_yyyy ...... Malloc area - * 0xFFFF_zzzz ...... Global Data - * 0xFFFF_FF00 ...... End of SRAM + * 0xFFFF_yyyy ...... Global Data + * 0xFFFF_zzzz ...... Malloc area + * 0xFFFF_FFFF ...... End of SRAM * * SRAM Memory layout for Arria 10: * 0xFFE0_0000 ...... Start of SRAM (bottom) From patchwork Tue Apr 9 19:02:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1082641 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZbtyRNJ5"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44dxX502V5z9sSQ for ; Wed, 10 Apr 2019 05:03:32 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 8D456C21DED; Tue, 9 Apr 2019 19:03:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C81DDC21E73; Tue, 9 Apr 2019 19:02:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0D129C21E52; Tue, 9 Apr 2019 19:02:20 +0000 (UTC) Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by lists.denx.de (Postfix) with ESMTPS id 68560C21D8A for ; Tue, 9 Apr 2019 19:02:20 +0000 (UTC) Received: by mail-wr1-f65.google.com with SMTP id k11so22315828wro.5 for ; Tue, 09 Apr 2019 12:02:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hccyoWYWqvL/8CeZL1E25PjOJ869NfKrYd7RFhMmeXI=; b=ZbtyRNJ5rWN0LviRr7Vv+zGLl0u/8Z/phCZV9rYbswAjZOQPEWF9xddnm0RRjzrGiC jGYVGdog5m0XN9Ub/d5F6H/GBoXbO6JSpNfn7qzOWheTz63JqaakKXQIzo8tQ4x+95Wq UAAlA9/0JJWMxDvlMCTJTrtpHbdzsyzuEAKfWq52KQ+KP9+xU7wMYTV6hm+eY9YFnwoB Jec/1+fSyI513/dPwISv6+uqKxCedOn2fW9tHewdYXIvhlHegPSoQvomsJ8HOLWU2bhl noLVKPml+dIsXsZKXohL6rlCWFJqtxczm+ODr9UseMixBr2bO6SmRg+qzrTZSi60G4Zl pOZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hccyoWYWqvL/8CeZL1E25PjOJ869NfKrYd7RFhMmeXI=; b=uUdZav1PKT5FIcl6C+8HfklclWk822ekwe1K7VM6tGqUF9pDoDlOGVzKvpxzkJmCZt Z4/5uKGq9LJqwVjFQkKXaVE9MIVT1TjuorN2SB6sANmzr+OPNmp87mX57mfAB734wYIw R+rV3g5ep5GUjMMTItNgZNud6y2Yc9wcC/TIiV6uXBC/z8XGlsMHqtGhPz6Qr05B0DkQ a8OTrpIZoMIuhW4d1EtiwPGMSrsVqsWdtyh6+Tf0aIkVi+QAOVP4t6JAPNoErzHNr7Tt 9ZQrdyG8WucikwC+YUtpDZyV7RL3l6VhIvWh3S3+JfP3AE4zj15n3mbLPhM7BxPt3B9d jTIQ== X-Gm-Message-State: APjAAAWMF54fERKBn5bGfByZPpFaz7ojTH9tzLvLefkztsXDm7syyAHN SgGKXowGiPGSmGPmOuraHnI= X-Google-Smtp-Source: APXvYqxfnXY53wjzRGFqbYXskplccKL5JG3OYY6K/1eZvS2MnCH3soRk/e94zbh9Y1OAzVns2iP+jw== X-Received: by 2002:adf:e610:: with SMTP id p16mr23726514wrm.64.1554836535254; Tue, 09 Apr 2019 12:02:15 -0700 (PDT) Received: from ubuntu.home (HSI-KBW-046-005-136-229.hsi8.kabel-badenwuerttemberg.de. [46.5.136.229]) by smtp.gmail.com with ESMTPSA id g84sm23922551wmf.25.2019.04.09.12.02.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Apr 2019 12:02:14 -0700 (PDT) From: Simon Goldschmidt To: Marek Vasut , u-boot@lists.denx.de Date: Tue, 9 Apr 2019 21:02:04 +0200 Message-Id: <20190409190206.19257-3-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> References: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee , Tom Rini , Stefan Roese Subject: [U-Boot] [PATCH v4 2/4] arm: socfpga: put initial U-Boot stack into DDR X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to do that, too. The reason to do so is that this way, U-Boot initial stack can be larger than SPL initial stack. In situations where we want to save the SPL in SRAM for next boot without reloading, this prevents overwriting the SPL DTB in SRAM if U-Boot stack usage gets too high. To achieve this, the malloc definition for a10 is moved up and sligthly changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size. Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- Changes in v4: - make this patch 2/4 work without changing a10 heap allocation strategy (as the series doing that has been rejected) Changes in v3: - removed patch 2/5 from v2 (moved to patchwork #1067366, series #99561) Changes in v2: - fix commit message: "SPL post-reloc", not "SPL pre-reloc" include/configs/socfpga_common.h | 42 +++++++++++++++----------------- 1 file changed, 20 insertions(+), 22 deletions(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 32ee7426b6..a501b5209f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -26,7 +26,13 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */ +/* SPL memory allocation configuration, this is for FAT implementation */ +#ifndef CONFIG_SYS_SPL_MALLOC_SIZE +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000 +#endif +#define CONFIG_SYS_INIT_RAM_SIZE (0x40000 - CONFIG_SYS_SPL_MALLOC_SIZE) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE) #endif /* @@ -38,12 +44,23 @@ #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE))) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_BOOTCOUNT_ADDR +#define CONFIG_SPL_STACK CONFIG_SYS_BOOTCOUNT_ADDR #else -#define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SPL_STACK \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #endif +/* + * U-Boot stack setup: if SPL post-reloc uses DDR stack, use it in pre-reloc + * phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage + * in U-Boot pre-reloc is higher than in SPL. + */ +#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR +#else +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK +#endif + #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* @@ -252,16 +269,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #endif -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#endif -#endif - /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -292,15 +299,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #endif -/* - * Stack setup - */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif - /* Extra Environment */ #ifndef CONFIG_SPL_BUILD From patchwork Tue Apr 9 19:02:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1082640 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QLJ+exaP"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44dxWW3lp1z9sSQ for ; Wed, 10 Apr 2019 05:03:03 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id EC667C21E88; Tue, 9 Apr 2019 19:02:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2,T_DKIM_INVALID,UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4CCE2C21DF9; Tue, 9 Apr 2019 19:02:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 31976C21C4A; Tue, 9 Apr 2019 19:02:20 +0000 (UTC) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by lists.denx.de (Postfix) with ESMTPS id BF169C21C29 for ; Tue, 9 Apr 2019 19:02:19 +0000 (UTC) Received: by mail-wm1-f67.google.com with SMTP id h18so4592451wml.1 for ; Tue, 09 Apr 2019 12:02:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n2au33S2ArGCgZboL1XK0CJqgnkoXEQUGGWST3nDGjQ=; b=QLJ+exaPPO+PZxKccYtcEGRfBoT+g7PQ6jqsho2o9tFCXOQqmPP3b0/9waWhUhX75k M6UiK5fGz5U+1LjzMYPQu57xd0fs/fk0ayuzpzR5D/IFALdh91AAhO3EmxT+uFlqp8/u vt3ebf14WjD1awE4dSXjM9Fis0CBLda2He78dcV2YvJOjWa66lVJ/5zeW4FuAVeag4CR c0y9WLATmo+6WmmVC3mNxI0PInacooL99tfeqGTMLb8GueYlna+VARLhg8V7xqezZEp3 VgPB31085Hauv+nkaM9X1UjhpeWUHoEt6fPI0yBMINiBNSnN330Or+0zREhCJD4G7w/h S0yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n2au33S2ArGCgZboL1XK0CJqgnkoXEQUGGWST3nDGjQ=; b=KwnyRzh+b1AUKkGjEW+XxhSd7u0inL19tBmoChY55tk8ueNj/55RIUp0BCPw4Ct6t5 qlpiS9Y+FvzDfb4dlcvriOz6A5XASB7vc0eVBetV/H7o/pItvtXYGHwjSPlvQYqA03iH DKHtg6JO3x0LRHvQoWiEPCTrpphjX9crsaUSbd57sS3gKsJ6H2Ygos5/+FXT6S9p2PF3 41iQHBj2azBpheIDBB3nKl37qImx052xVhCeJUjIDe7bcf3S9XUYciWbgtsVpKhcFiys vtRFqb7yD1AfwHQdHUgWC+073afYcFrI7/f21PhW/xTYpJPMkDfmFIWEMObKYv72h0LU 8J2A== X-Gm-Message-State: APjAAAW+YVmdfxB8hMN9ZyyAJ5vG6M4YEyZEJmjEKcF+KW9WN4sAKrU9 IfzwRCaJLVcEX9WWksFKtTVWXkOw X-Google-Smtp-Source: APXvYqyQOfKYbYP8WBHUfwc8+9FQd78NKYvKVnLjf+gc1DHTdZyqmDhFe39JRJF0QSYmL6z6+ARwAg== X-Received: by 2002:a1c:3944:: with SMTP id g65mr22262269wma.34.1554836536245; Tue, 09 Apr 2019 12:02:16 -0700 (PDT) Received: from ubuntu.home (HSI-KBW-046-005-136-229.hsi8.kabel-badenwuerttemberg.de. [46.5.136.229]) by smtp.gmail.com with ESMTPSA id g84sm23922551wmf.25.2019.04.09.12.02.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Apr 2019 12:02:15 -0700 (PDT) From: Simon Goldschmidt To: Marek Vasut , u-boot@lists.denx.de Date: Tue, 9 Apr 2019 21:02:05 +0200 Message-Id: <20190409190206.19257-4-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> References: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini , Stefan Roese , Pavel Machek , Chin-Liang See Subject: [U-Boot] [PATCH v4 3/4] arm: socfpga: imply/default common config options X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit moves common config options used in all socfpga boards to select/imply in Kconfig. This both cleans up the defconfig files as well as makes future changes easier. Options implied/defaulted for all sub-arches: - SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS Options implied/defaulted for implied for A10 & gen5: - FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE Options implied/defaulted for gen5: - SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- Changes in v4: - adapt to socfpga-next Changes in v3: - adapt to socfpge-next: imply USE_TINY_PRINTF only for gen5 & a10, not s10 Changes in v2: - added patch to imply/default common config options arch/arm/Kconfig | 2 ++ arch/arm/mach-socfpga/Kconfig | 20 ++++++++++++++++++++ configs/socfpga_arria10_defconfig | 6 ------ configs/socfpga_arria5_defconfig | 10 ---------- configs/socfpga_cyclone5_defconfig | 10 ---------- configs/socfpga_dbm_soc1_defconfig | 10 ---------- configs/socfpga_de0_nano_soc_defconfig | 10 ---------- configs/socfpga_de10_nano_defconfig | 10 ---------- configs/socfpga_de1_soc_defconfig | 10 ---------- configs/socfpga_is1_defconfig | 8 -------- configs/socfpga_sockit_defconfig | 10 ---------- configs/socfpga_socrates_defconfig | 10 ---------- configs/socfpga_sr1500_defconfig | 10 ---------- configs/socfpga_stratix10_defconfig | 2 -- configs/socfpga_vining_fpga_defconfig | 10 ---------- 15 files changed, 22 insertions(+), 116 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 77a534f81f..6554ad94f8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -841,6 +841,8 @@ config ARCH_SOCFPGA imply DM_SPI imply DM_SPI_FLASH imply FAT_WRITE + imply SPL + imply SPL_DM imply SPL_LIBDISK_SUPPORT imply SPL_MMC_SUPPORT imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 5e87371f8c..3c6c63067d 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -1,8 +1,22 @@ if ARCH_SOCFPGA +config NR_DRAM_BANKS + default 1 + +config SPL_STACK_R_ADDR + default 0x00800000 if TARGET_SOCFPGA_GEN5 + config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE default 0xa2 +config SYS_MALLOC_F_LEN + default 0x2000 if TARGET_SOCFPGA_ARRIA10 + default 0x2000 if TARGET_SOCFPGA_GEN5 + +config SYS_TEXT_BASE + default 0x01000040 if TARGET_SOCFPGA_ARRIA10 + default 0x01000040 if TARGET_SOCFPGA_GEN5 + config TARGET_SOCFPGA_ARRIA5 bool select TARGET_SOCFPGA_GEN5 @@ -21,6 +35,8 @@ config TARGET_SOCFPGA_ARRIA10 select SYSCON select SPL_SYSCON if SPL select ETH_DESIGNWARE_SOCFPGA + imply FPGA_SOCFPGA + imply USE_TINY_PRINTF config TARGET_SOCFPGA_CYCLONE5 bool @@ -29,6 +45,10 @@ config TARGET_SOCFPGA_CYCLONE5 config TARGET_SOCFPGA_GEN5 bool select ALTERA_SDRAM + imply FPGA_SOCFPGA + imply SPL_STACK_R + imply SPL_SYS_MALLOC_SIMPLE + imply USE_TINY_PRINTF config TARGET_SOCFPGA_STRATIX10 bool diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index f321a0ac3b..b3540cfe42 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -1,12 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y -CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" # CONFIG_USE_BOOTCOMMAND is not set @@ -28,9 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_MMC=y @@ -42,4 +37,3 @@ CONFIG_SPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_DESIGNWARE_APB_TIMER=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 2f04092649..d514b14364 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -16,8 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_socdk.dtb" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -39,10 +32,8 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -72,4 +63,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 2625aadf40..2d1a20154a 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -16,8 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socdk.dtb" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -39,10 +32,8 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -73,4 +64,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index b6f4f8a3dd..233d1334b3 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -1,11 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -15,8 +10,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -41,9 +34,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -67,4 +58,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 9a89bb5d68..dfd2d0f504 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -17,8 +12,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -40,9 +33,7 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -68,4 +59,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index db516891ba..d02a8d7d87 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -16,8 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de10_nano.dtb" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -36,9 +29,7 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -64,4 +55,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 5bed755723..c860bb45ad 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -17,8 +12,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -36,8 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -55,5 +46,4 @@ CONFIG_SPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_DWC2=y -CONFIG_USE_TINY_PRINTF=y # CONFIG_EFI_LOADER is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index cd7211d202..7c81a83fc6 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_IS1=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -17,7 +12,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -36,11 +30,9 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 4c17d1a9e4..805bbe1a1a 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -16,8 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sockit.dtb" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -39,10 +32,8 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -73,4 +64,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 45fd78a15c..0ded246e78 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -16,8 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socrates.dtb" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -40,10 +33,8 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_ENV_IS_IN_MMC=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -73,4 +64,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index b8de47a4b1..6542045ca2 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_SR1500=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -18,8 +13,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -40,11 +33,9 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y @@ -64,4 +55,3 @@ CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y -CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 4848013b21..a6a28893ca 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y -CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y CONFIG_NR_DRAM_BANKS=2 @@ -30,7 +29,6 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 3eba09dcb1..7b47b111b7 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -1,12 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y -CONFIG_SYS_TEXT_BASE=0x01000040 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y -CONFIG_SPL=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -19,8 +14,6 @@ CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -45,12 +38,10 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y -CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_LED_STATUS=y @@ -90,4 +81,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USE_TINY_PRINTF=y From patchwork Tue Apr 9 19:02:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1082642 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="HXKEXOdr"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44dxY42Nrlz9sSQ for ; Wed, 10 Apr 2019 05:04:24 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 05042C21E1D; Tue, 9 Apr 2019 19:03:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 49F66C21E6A; Tue, 9 Apr 2019 19:02:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A653FC21EA6; Tue, 9 Apr 2019 19:02:25 +0000 (UTC) Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by lists.denx.de (Postfix) with ESMTPS id 73E21C21E3A for ; Tue, 9 Apr 2019 19:02:21 +0000 (UTC) Received: by mail-wm1-f68.google.com with SMTP id h18so4592532wml.1 for ; Tue, 09 Apr 2019 12:02:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KiQhuPvo6gR18FIvL/94Ez4YHlGqIpYWuJ+uTR+IlB0=; b=HXKEXOdr2X+rbSUTccfGrH2ISwfTd//M7psQOg8lauesF1ZSN5PoqdQZVrVEtkotYJ P1Kgo4yDfa22BStqsIAnTf4nr1xudpvAbaXjnadMjHQtfWVAHw/AYgQ+ibyR90JpfRRl UWO/XKIe44My/OX6wZRNkUpWVAGt5jcEGnGOe48PCuRE2d4kG30X4eoT5dfhnwKFX1JH TGxFjBwXgUdAy0427oe7YVyBz2C60q9A39Zw9cEYTSZf5VyB+f3huOpBsbkBNJtZuZV1 ec8otNEkcGXM8X9GyJ2Dd9l2XHYGkoDOvtybOG0iLrjIr0X7HDkC0PZ77lHrqhY9UJQe NlrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KiQhuPvo6gR18FIvL/94Ez4YHlGqIpYWuJ+uTR+IlB0=; b=mUa8Sj6N+axIAL9/KAkm7Mp1ZucRZu9hRham0PFwVM9yK+M8KkGm35m5GD4bAFfWZD K6gJEhTu7/dsiHG2N1+pQZtQF+5hPoI5gxiVn1N4BumD+ML8LVXda5KOE92ovupjZk4f ow4Lt67B59bBAEFTKb56qL9j6WjxfHqzZvrQQ16s6CK1C/A8G92sjroMgMpElgOJEhQp p1rtdr9VQ/0YC2Zo008Q2IKaHk0m4FXQHHWmSODIl+zDmD8RiVOxpJw1UtJw3rL1mcSv 36ERVXF+MqWksP58qCWSC9l3lcGXtfgMVpgHHZzd1WtzMQ8UkQFYSUOqzwZ52xTD+ppy fGfg== X-Gm-Message-State: APjAAAXRJUO17wkViY2kBlRUMnsvnvynWcWDnqAUZHZ7m1JhrrsdwSdx 2X+sbBzRGY6UynxwUXHJFR8Sga0F X-Google-Smtp-Source: APXvYqzOgbOn96fw6vR/8gTu6alptNePOrzPoh+CaC31Li8VspDbnh4F3l4vo2zBRz0Lgw1wxrGFlw== X-Received: by 2002:a1c:e912:: with SMTP id q18mr12903597wmc.137.1554836537095; Tue, 09 Apr 2019 12:02:17 -0700 (PDT) Received: from ubuntu.home (HSI-KBW-046-005-136-229.hsi8.kabel-badenwuerttemberg.de. [46.5.136.229]) by smtp.gmail.com with ESMTPSA id g84sm23922551wmf.25.2019.04.09.12.02.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Apr 2019 12:02:16 -0700 (PDT) From: Simon Goldschmidt To: Marek Vasut , u-boot@lists.denx.de Date: Tue, 9 Apr 2019 21:02:06 +0200 Message-Id: <20190409190206.19257-5-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> References: <20190409190206.19257-1-simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini Subject: [U-Boot] [PATCH v4 4/4] arm: socfpga: gen5: reduce SPL pre-reloc malloc X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" By enabling debug prints in malloc_simple, we can see that SPL for socfpga gen5 does by far not need the 8 KiB malloc pool currently allocated for SPL in pre-reloc phase. On socfpga_socrates, 1304 bytes are currently used (and this increases by ~200 bytes only for the sdram/reset fixes in socfpga-next). To prevent wasting precious SRAM space, let's reduce the initial heap used for SPL to 2 KiB. This is still some hundred bytes more than currently used. Also, the gen5 SPL enables stack and heap in DDR memory pretty early. Only the initial uclass/dm parsing, serial console and DDR initialization is done in the initial heap, so these 2 KiB should be enough for all boards. Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- Changes in v4: None Changes in v3: - adapt to socfpga-next Changes in v2: - added patch to reduce gen5 SPL initial malloc pool to 2 KiB arch/arm/mach-socfpga/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 3c6c63067d..8f7b79f586 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -6,6 +6,9 @@ config NR_DRAM_BANKS config SPL_STACK_R_ADDR default 0x00800000 if TARGET_SOCFPGA_GEN5 +config SPL_SYS_MALLOC_F_LEN + default 0x800 if TARGET_SOCFPGA_GEN5 + config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE default 0xa2