From patchwork Mon Apr 1 17:55:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kurz X-Patchwork-Id: 1073073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44Y0Qg63YNz9sNN for ; Tue, 2 Apr 2019 04:56:43 +1100 (AEDT) Received: from localhost ([127.0.0.1]:40599 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hB1An-0006kd-M6 for incoming@patchwork.ozlabs.org; Mon, 01 Apr 2019 13:56:41 -0400 Received: from eggs.gnu.org ([209.51.188.92]:34438) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hB19z-0006iM-Nr for qemu-devel@nongnu.org; Mon, 01 Apr 2019 13:55:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hB19r-00007q-Je for qemu-devel@nongnu.org; Mon, 01 Apr 2019 13:55:49 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:45536) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hB19n-0008Tz-MY for qemu-devel@nongnu.org; Mon, 01 Apr 2019 13:55:41 -0400 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x31HtWKc117121 for ; Mon, 1 Apr 2019 13:55:36 -0400 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0a-001b2d01.pphosted.com with ESMTP id 2rkpwr9u4q-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 01 Apr 2019 13:55:34 -0400 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 1 Apr 2019 18:55:04 +0100 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x31Ht3RA45940926 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 1 Apr 2019 17:55:03 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 55DA611C052; Mon, 1 Apr 2019 17:55:03 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 13ADA11C04A; Mon, 1 Apr 2019 17:55:03 +0000 (GMT) Received: from bahia.lan (unknown [9.145.25.6]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 1 Apr 2019 17:55:03 +0000 (GMT) From: Greg Kurz To: qemu-devel@nongnu.org Date: Mon, 01 Apr 2019 19:55:02 +0200 In-Reply-To: <155414129703.574858.5054152366329409898.stgit@bahia.lan> References: <155414129703.574858.5054152366329409898.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19040117-0028-0000-0000-0000035C07FD X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19040117-0029-0000-0000-0000241B0847 Message-Id: <155414130271.574858.4253514266378127489.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-01_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1904010117 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH for-4.0 1/2] pci: Allow PCI bus subtypes to support extended config space accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Alex Williamson , qemu-ppc@nongnu.org, =?utf-8?b?Q8OpZHJp?= =?utf-8?q?c?= Le Goater , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Some PHB implementations, eg. PAPR used on pseries machine, act like a regular PCI bus rather than a PCIe bus, but allow access to the PCIe extended config space anyway. Introduce a new PCI bus class method to modelize this behaviour and use it when adjusting the config space size limit during accesses. No behaviour change for existing PCI bus types. Signed-off-by: Greg Kurz --- hw/pci/pci.c | 24 ++++++++++++++++++++++++ hw/pci/pci_host.c | 2 +- include/hw/pci/pci.h | 2 ++ include/hw/pci/pci_bus.h | 1 + 4 files changed, 28 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 35451c1e9987..6d13ef877b42 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -147,6 +147,11 @@ static uint16_t pcibus_numa_node(PCIBus *bus) return NUMA_NODE_UNASSIGNED; } +static bool pcibus_allows_extended_config_space(PCIBus *bus) +{ + return false; +} + static void pci_bus_class_init(ObjectClass *klass, void *data) { BusClass *k = BUS_CLASS(klass); @@ -162,6 +167,7 @@ static void pci_bus_class_init(ObjectClass *klass, void *data) pbc->is_root = pcibus_is_root; pbc->bus_num = pcibus_num; pbc->numa_node = pcibus_numa_node; + pbc->allows_extended_config_space = pcibus_allows_extended_config_space; } static const TypeInfo pci_bus_info = { @@ -182,9 +188,22 @@ static const TypeInfo conventional_pci_interface_info = { .parent = TYPE_INTERFACE, }; +static bool pciebus_allows_extended_config_space(PCIBus *bus) +{ + return true; +} + +static void pcie_bus_class_init(ObjectClass *klass, void *data) +{ + PCIBusClass *pbc = PCI_BUS_CLASS(klass); + + pbc->allows_extended_config_space = pciebus_allows_extended_config_space; +} + static const TypeInfo pcie_bus_info = { .name = TYPE_PCIE_BUS, .parent = TYPE_PCI_BUS, + .class_init = pcie_bus_class_init, }; static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); @@ -401,6 +420,11 @@ bool pci_bus_is_root(PCIBus *bus) return PCI_BUS_GET_CLASS(bus)->is_root(bus); } +bool pci_bus_allows_extended_config_space(PCIBus *bus) +{ + return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus); +} + void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, MemoryRegion *address_space_mem, diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 5f5345dbac67..9d64b2e12f2c 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -54,7 +54,7 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr) static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit) { if (*limit > PCI_CONFIG_SPACE_SIZE) { - if (!pci_bus_is_express(bus)) { + if (!pci_bus_allows_extended_config_space(bus)) { *limit = PCI_CONFIG_SPACE_SIZE; return; } diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d87f5f93e9cd..0abb06b35747 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -396,6 +396,8 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin); bool pci_bus_is_express(PCIBus *bus); bool pci_bus_is_root(PCIBus *bus); +bool pci_bus_allows_extended_config_space(PCIBus *bus); + void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, MemoryRegion *address_space_mem, diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index dfb75752cbc1..f6df834170c5 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -18,6 +18,7 @@ typedef struct PCIBusClass { bool (*is_root)(PCIBus *bus); int (*bus_num)(PCIBus *bus); uint16_t (*numa_node)(PCIBus *bus); + bool (*allows_extended_config_space)(PCIBus *bus); } PCIBusClass; struct PCIBus { From patchwork Mon Apr 1 17:55:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kurz X-Patchwork-Id: 1073072 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44Y0QS0Xt2z9sNN for ; Tue, 2 Apr 2019 04:56:32 +1100 (AEDT) Received: from localhost ([127.0.0.1]:40572 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hB1Ac-0006f0-1K for incoming@patchwork.ozlabs.org; Mon, 01 Apr 2019 13:56:30 -0400 Received: from eggs.gnu.org ([209.51.188.92]:34366) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hB19r-0006aa-Kr for qemu-devel@nongnu.org; Mon, 01 Apr 2019 13:55:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hB19p-00005o-Jr for qemu-devel@nongnu.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 1 Apr 2019 18:55:10 +0100 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x31Ht9Ym52232360 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 1 Apr 2019 17:55:09 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E7F2AAE059; Mon, 1 Apr 2019 17:55:08 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A95C6AE045; Mon, 1 Apr 2019 17:55:08 +0000 (GMT) Received: from bahia.lan (unknown [9.145.25.6]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 1 Apr 2019 17:55:08 +0000 (GMT) From: Greg Kurz To: qemu-devel@nongnu.org Date: Mon, 01 Apr 2019 19:55:08 +0200 In-Reply-To: <155414129703.574858.5054152366329409898.stgit@bahia.lan> References: <155414129703.574858.5054152366329409898.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19040117-4275-0000-0000-000003230717 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19040117-4276-0000-0000-000038320729 Message-Id: <155414130834.574858.16502276132110219890.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-01_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=896 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1904010117 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH for-4.0 2/2] spapr_pci: Fix extended config space accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Alex Williamson , qemu-ppc@nongnu.org, =?utf-8?b?Q8OpZHJp?= =?utf-8?q?c?= Le Goater , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The PAPR PHB acts as a legacy PCI bus but it allows PCIe extended config space accesses anyway (for pseries-2.9 and newer machine types). Introduce a specific PCI bus subtype to inform the common PCI code about that. Fixes: c2077e2ca0da7 Signed-off-by: Greg Kurz --- hw/ppc/spapr_pci.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index bba3a86dda6c..68cc15d2f534 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1642,6 +1642,28 @@ static void spapr_phb_unrealize(DeviceState *dev, Error **errp) memory_region_del_subregion(get_system_memory(), &sphb->mem32window); } +static bool spapr_phb_allows_extended_config_space(PCIBus *bus) +{ + SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(BUS(bus)->parent); + + return sphb->pcie_ecs; +} + +static void spapr_phb_root_bus_class_init(ObjectClass *klass, void *data) +{ + PCIBusClass *pbc = PCI_BUS_CLASS(klass); + + pbc->allows_extended_config_space = spapr_phb_allows_extended_config_space; +} + +#define TYPE_SPAPR_PHB_ROOT_BUS "spapr-pci-host-bridge-root-bus" + +static const TypeInfo spapr_phb_root_bus_info = { + .name = TYPE_SPAPR_PHB_ROOT_BUS, + .parent = TYPE_PCI_BUS, + .class_init = spapr_phb_root_bus_class_init, +}; + static void spapr_phb_realize(DeviceState *dev, Error **errp) { /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user @@ -1746,7 +1768,8 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) bus = pci_register_root_bus(dev, NULL, pci_spapr_set_irq, pci_spapr_map_irq, sphb, &sphb->memspace, &sphb->iospace, - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS); + PCI_DEVFN(0, 0), PCI_NUM_PINS, + TYPE_SPAPR_PHB_ROOT_BUS); phb->bus = bus; qbus_set_hotplug_handler(BUS(phb->bus), OBJECT(sphb), NULL); @@ -2344,6 +2367,7 @@ void spapr_pci_rtas_init(void) static void spapr_pci_register_types(void) { type_register_static(&spapr_phb_info); + type_register_static(&spapr_phb_root_bus_info); } type_init(spapr_pci_register_types)