diff mbox series

[SRU,Zesty,1/2] powerpc/perf: Avoid spurious PMU interrupts after idle

Message ID a1088f188488122f9ec549e81cf3af707cb88840.1505244765.git.joseph.salisbury@canonical.com
State New
Headers show
Series Fixes for LP:1716491 | expand

Commit Message

Joseph Salisbury Sept. 20, 2017, 3:17 p.m. UTC 
From: Nicholas Piggin <npiggin@gmail.com>

BugLink: http://bugs.launchpad.net/bugs/1716491

POWER9 DD2 can see spurious PMU interrupts after state-loss idle in
some conditions.

A solution is to save and reload MMCR0 over state-loss idle.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Tested-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
(cherry picked from commit 101dd590a7fa37954540cf3149a1c502c0acc524)
Signed-off-by: Joseph Salisbury <joseph.salisbury@canonical.com>
---
 arch/powerpc/kernel/idle_book3s.S | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

Comments

Thadeu Lima de Souza Cascardo Oct. 9, 2017, 2:12 p.m. UTC | #1 
Superseded-by: 1502286296-27932-1-git-send-email-rosattig@linux.vnet.ibm.com

Hi, Joe.

This patch was applied to zesty 4.10.0-34.38, while your patches seemed
to be built on top of 4.10.0-33.37. While 4.10.0-34.38 was already in
-proposed when you built those patches, things like this can still
happen when patches are submitted in "parallel".

Anyway, thanks for all the work you put on getting those backports done,
kernels built, and bugs closed!

I just noticed this patch didn't apply, and thought we could elaborate
on why it happened and see if there's anything to improve on our part
here.

Thanks.
Cascardo.
diff mbox series

Patch

diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index fb762ee..e003fb9 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -29,6 +29,7 @@ 
  * Use unused space in the interrupt stack to save and restore
  * registers for winkle support.
  */
+#define _MMCR0	GPR0
 #define _SDR1	GPR3
 #define _RPR	GPR4
 #define _SPURR	GPR5
@@ -282,6 +283,14 @@  power_enter_stop:
 	b 	pnv_wakeup_noloss
 
 .Lhandle_esl_ec_set:
+	/*
+	 * POWER9 DD2 can incorrectly set PMAO when waking up after a
+	 * state-loss idle. Saving and restoring MMCR0 over idle is a
+	 * workaround.
+	 */
+	mfspr	r4,SPRN_MMCR0
+	std	r4,_MMCR0(r1)
+
 /*
  * Check if the requested state is a deep idle state.
  */
@@ -434,10 +443,14 @@  FTR_SECTION_ELSE_NESTED(70)
 ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_POWER9_DD1, 70)
 	/*
 	 * Workaround for POWER9, if we lost resources, the ERAT
-	 * might have been mixed up and needs flushing.
+	 * might have been mixed up and needs flushing. We also need
+	 * to reload MMCR0 (see comment above).
 	 */
 	blt	cr3,1f
 	PPC_INVALIDATE_ERAT
+	ld	r1,PACAR1(r13)
+	ld	r4,_MMCR0(r1)
+	mtspr	SPRN_MMCR0,r4
 1:
 	/*
 	 * POWER ISA 3. Use PSSCR to determine if we