From patchwork Mon Jan 17 15:19:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1580876 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Jcwcp3jfjz9ssD for ; Tue, 18 Jan 2022 02:22:18 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1n9Tpe-0000L4-Ek; Mon, 17 Jan 2022 15:22:06 +0000 Received: from mail-pl1-f172.google.com ([209.85.214.172]) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1n9TnX-0006xw-Pf for kernel-team@lists.ubuntu.com; Mon, 17 Jan 2022 15:19:55 +0000 Received: by mail-pl1-f172.google.com with SMTP id t18so21552082plg.9 for ; Mon, 17 Jan 2022 07:19:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MhE7DKmJCADt1ZcEGs8kwb2snk6WhXhaPPYhAVQTijE=; b=Z9DOufRi/e9BqKzuFwRvZcoNnj3/nWvP988EHFUOTn77aIVZgphGigP4rXeYDq0izg 4vPsWF/vMmQRUJ4+83vbfGXjTCsCSiFAZLZMWrHz1eoT1n/9C5KjCQZHjb/b8EmE4+HZ z3+fSzu555hgXlUVdU5pU+flPPgerGSZCehnjUFvMkcXxwVBngz6YJJEzAopOBsg6eHS KJbgshjDOU4woaabPZwF6Fx0qscK/sN7k7za1P7HmSpYdfZrQOl//BEIOBHdi7NRK/6m y/46S0nt8NbURCu1r3yFFjCbMQy/yBKJmdGSWNIJpmcGbKE25Ix7NeWT5z+ozltnHvAz mmaQ== X-Gm-Message-State: AOAM531CH5X81lGJicbggTSYM2w5rR3rAPR+R148dgQ1Z52fNxQxouhg 8RjjTiSSe1aK1QsY2GTJlBDbllOctNX4OQ== X-Google-Smtp-Source: ABdhPJzB5Z7WJPKHVZXYW8Ir/E/zoABA5wlP1W4ngdIIWDuSF2FQwt6NeC6vOi/M44jgSnFsXRx1mw== X-Received: by 2002:a17:90b:4d11:: with SMTP id mw17mr15800728pjb.100.1642432793721; Mon, 17 Jan 2022 07:19:53 -0800 (PST) Received: from localhost (218-173-149-51.dynamic-ip.hinet.net. [218.173.149.51]) by smtp.gmail.com with ESMTPSA id bo15sm18827796pjb.16.2022.01.17.07.19.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 07:19:53 -0800 (PST) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 10/30][SRU][Jammy] UBUNTU: SAUCE: Fix ov01a1s IQ issues Date: Mon, 17 Jan 2022 23:19:08 +0800 Message-Id: <20220117151928.954829-11-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220117151928.954829-1-vicamo.yang@canonical.com> References: <20220117151928.954829-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.172; envelope-from=vicamo@gmail.com; helo=mail-pl1-f172.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Wang Yating BugLink: https://bugs.launchpad.net/bugs/1955383 Signed-off-by: Wang Yating (cherry picked from commit f06a7aba2573b9ff53e7b186325c4e890066ee5d github.com/intel/ipu6-drivers) Signed-off-by: You-Sheng Yang --- drivers/media/i2c/ov01a1s.c | 91 ++++++++++++++++++------------------- 1 file changed, 43 insertions(+), 48 deletions(-) diff --git a/drivers/media/i2c/ov01a1s.c b/drivers/media/i2c/ov01a1s.c index 3fa3441de6f6..8c34c0da4bd4 100644 --- a/drivers/media/i2c/ov01a1s.c +++ b/drivers/media/i2c/ov01a1s.c @@ -12,7 +12,7 @@ #include #include "power_ctrl_logic.h" -#define OV01A1S_LINK_FREQ_400MHZ 400000000ULL +#define OV01A1S_LINK_FREQ_400MHZ 400000000ULL #define OV01A1S_SCLK 40000000LL #define OV01A1S_MCLK 19200000 #define OV01A1S_DATA_LANES 1 @@ -31,9 +31,6 @@ #define OV01A1S_VTS_MIN 0x0380 #define OV01A1S_VTS_MAX 0xffff -/* horizontal-timings from sensor */ -#define OV01A1S_REG_HTS 0x380c - /* Exposure controls from sensor */ #define OV01A1S_REG_EXPOSURE 0x3501 #define OV01A1S_EXPOSURE_MIN 4 @@ -43,13 +40,16 @@ /* Analog gain controls from sensor */ #define OV01A1S_REG_ANALOG_GAIN 0x3508 #define OV01A1S_ANAL_GAIN_MIN 0x100 -#define OV01A1S_ANAL_GAIN_MAX 0xfff +#define OV01A1S_ANAL_GAIN_MAX 0xffff #define OV01A1S_ANAL_GAIN_STEP 1 /* Digital gain controls from sensor */ -#define OV01A1S_REG_DGTL_GAIN 0x350A +#define OV01A1S_REG_DIGILAL_GAIN_B 0x350A +#define OV01A1S_REG_DIGITAL_GAIN_GB 0x3510 +#define OV01A1S_REG_DIGITAL_GAIN_GR 0x3513 +#define OV01A1S_REG_DIGITAL_GAIN_R 0x3516 #define OV01A1S_DGTL_GAIN_MIN 0 -#define OV01A1S_DGTL_GAIN_MAX 0xfff +#define OV01A1S_DGTL_GAIN_MAX 0x3ffff #define OV01A1S_DGTL_GAIN_STEP 1 #define OV01A1S_DGTL_GAIN_DEFAULT 1024 @@ -178,9 +178,9 @@ static const struct ov01a1s_reg sensor_1296x800_setting[] = { {0x3808, 0x05}, {0x3809, 0x00}, {0x380a, 0x03}, - {0x380b, 0x20}, - {0x380c, 0x02}, - {0x380d, 0xe8}, + {0x380b, 0x1e}, + {0x380c, 0x05}, + {0x380d, 0xd0}, {0x380e, 0x03}, {0x380f, 0x80}, {0x3810, 0x00}, @@ -237,11 +237,7 @@ static const struct ov01a1s_reg sensor_1296x800_setting[] = { {0x3808, 0x05}, {0x3809, 0x10}, {0x380a, 0x03}, - {0x380b, 0x20}, - {0x380c, 0x02}, - {0x380d, 0xe8}, - {0x380e, 0x03}, - {0x380f, 0x80}, + {0x380b, 0x1e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -274,8 +270,8 @@ static const struct ov01a1s_link_freq_config link_freq_configs[] = { static const struct ov01a1s_mode supported_modes[] = { { .width = 1296, - .height = 800, - .hts = 744, + .height = 798, + .hts = 1488, .vts_def = OV01A1S_VTS_DEF, .vts_min = OV01A1S_VTS_MIN, .reg_list = { @@ -313,24 +309,6 @@ static inline struct ov01a1s *to_ov01a1s(struct v4l2_subdev *subdev) return container_of(subdev, struct ov01a1s, sd); } -static u64 to_pixel_rate(u32 f_index) -{ - u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV01A1S_DATA_LANES; - - do_div(pixel_rate, OV01A1S_RGB_DEPTH); - - return pixel_rate; -} - -static u64 to_pixels_per_line(u32 hts, u32 f_index) -{ - u64 ppl = hts * to_pixel_rate(f_index); - - do_div(ppl, OV01A1S_SCLK); - - return ppl; -} - static int ov01a1s_read_reg(struct ov01a1s *ov01a1s, u16 reg, u16 len, u32 *val) { struct i2c_client *client = v4l2_get_subdevdata(&ov01a1s->sd); @@ -403,11 +381,32 @@ static int ov01a1s_write_reg_list(struct ov01a1s *ov01a1s, static int ov01a1s_update_digital_gain(struct ov01a1s *ov01a1s, u32 d_gain) { - u32 real = d_gain; + struct i2c_client *client = v4l2_get_subdevdata(&ov01a1s->sd); + u32 real = d_gain << 6; + int ret = 0; - real = (real << 6); + ret = ov01a1s_write_reg(ov01a1s, OV01A1S_REG_DIGILAL_GAIN_B, 3, real); + if (ret) { + dev_err(&client->dev, "failed to set OV01A1S_REG_DIGITAL_GAIN_B"); + return ret; + } + ret = ov01a1s_write_reg(ov01a1s, OV01A1S_REG_DIGITAL_GAIN_GB, 3, real); + if (ret) { + dev_err(&client->dev, "failed to set OV01A1S_REG_DIGITAL_GAIN_GB"); + return ret; + } + ret = ov01a1s_write_reg(ov01a1s, OV01A1S_REG_DIGITAL_GAIN_GR, 3, real); + if (ret) { + dev_err(&client->dev, "failed to set OV01A1S_REG_DIGITAL_GAIN_GR"); + return ret; + } - return ov01a1s_write_reg(ov01a1s, OV01A1S_REG_DGTL_GAIN, 3, real); + ret = ov01a1s_write_reg(ov01a1s, OV01A1S_REG_DIGITAL_GAIN_R, 3, real); + if (ret) { + dev_err(&client->dev, "failed to set OV01A1S_REG_DIGITAL_GAIN_R"); + return ret; + } + return ret; } static int ov01a1s_test_pattern(struct ov01a1s *ov01a1s, u32 pattern) @@ -445,7 +444,7 @@ static int ov01a1s_set_ctrl(struct v4l2_ctrl *ctrl) switch (ctrl->id) { case V4L2_CID_ANALOGUE_GAIN: ret = ov01a1s_write_reg(ov01a1s, OV01A1S_REG_ANALOG_GAIN, 2, - ctrl->val << 4); + ctrl->val); break; case V4L2_CID_DIGITAL_GAIN: @@ -484,7 +483,7 @@ static int ov01a1s_init_controls(struct ov01a1s *ov01a1s) { struct v4l2_ctrl_handler *ctrl_hdlr; const struct ov01a1s_mode *cur_mode; - s64 exposure_max, h_blank, pixel_rate; + s64 exposure_max, h_blank; u32 vblank_min, vblank_max, vblank_default; int size; int ret = 0; @@ -506,10 +505,9 @@ static int ov01a1s_init_controls(struct ov01a1s *ov01a1s) if (ov01a1s->link_freq) ov01a1s->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; - pixel_rate = to_pixel_rate(OV01A1S_LINK_FREQ_400MHZ_INDEX); ov01a1s->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a1s_ctrl_ops, V4L2_CID_PIXEL_RATE, 0, - pixel_rate, 1, pixel_rate); + OV01A1S_SCLK, 1, OV01A1S_SCLK); vblank_min = cur_mode->vts_min - cur_mode->height; vblank_max = OV01A1S_VTS_MAX - cur_mode->height; @@ -518,8 +516,7 @@ static int ov01a1s_init_controls(struct ov01a1s *ov01a1s) V4L2_CID_VBLANK, vblank_min, vblank_max, 1, vblank_default); - h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index); - h_blank -= cur_mode->width; + h_blank = cur_mode->hts - cur_mode->width; ov01a1s->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov01a1s_ctrl_ops, V4L2_CID_HBLANK, h_blank, h_blank, 1, h_blank); @@ -699,8 +696,7 @@ static int ov01a1s_set_format(struct v4l2_subdev *sd, } else { ov01a1s->cur_mode = mode; __v4l2_ctrl_s_ctrl(ov01a1s->link_freq, mode->link_freq_index); - __v4l2_ctrl_s_ctrl_int64(ov01a1s->pixel_rate, - to_pixel_rate(mode->link_freq_index)); + __v4l2_ctrl_s_ctrl_int64(ov01a1s->pixel_rate, OV01A1S_SCLK); /* Update limits and set FPS to default */ vblank_def = mode->vts_def - mode->height; @@ -709,8 +705,7 @@ static int ov01a1s_set_format(struct v4l2_subdev *sd, OV01A1S_VTS_MAX - mode->height, 1, vblank_def); __v4l2_ctrl_s_ctrl(ov01a1s->vblank, vblank_def); - h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) - - mode->width; + h_blank = mode->hts - mode->width; __v4l2_ctrl_modify_range(ov01a1s->hblank, h_blank, h_blank, 1, h_blank); }