diff mbox series

[I/linux] UBUNTU: SAUCE: arm: Fix instruction set selection for GCC 11

Message ID 20210809152238.712588-1-juergh@canonical.com
State New
Headers show
Series [I/linux] UBUNTU: SAUCE: arm: Fix instruction set selection for GCC 11 | expand

Commit Message

Juerg Haefliger Aug. 9, 2021, 3:22 p.m. UTC
BugLink: https://bugs.launchpad.net/bugs/1939308

GCC 11 on ARM now complains like the following when trying to determine if
an arch is supported. Presumably because it enforces the default option
which (in our case) is '--with-float=hard'?
  $ arm-linux-gnueabihf-gcc-11 -march=armv7-a -c -x c /dev/null
  cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU

Due to that, the kernel build system selects the wrong compiler options
which throws errros like this:
  /tmp/ccrHfZPj.s: Assembler messages:
  /tmp/ccrHfZPj.s:116: Error: selected processor does not support `dmb ish' in ARM mode
  /tmp/ccrHfZPj.s:150: Error: selected processor does not support `isb ' in ARM mode
  /tmp/ccrHfZPj.s:160: Error: selected processor does not support `mrrc p15,1,r4,r5,c14' in ARM mode
  /tmp/ccrHfZPj.s:245: Error: selected processor does not support `dmb ish' in ARM mode
  /tmp/ccrHfZPj.s:503: Error: selected processor does not support `dmb ish' in ARM mode
  /tmp/ccrHfZPj.s:527: Error: selected processor does not support `dmb ish' in ARM mode
  /tmp/ccrHfZPj.s:698: Error: selected processor does not support `dmb ish' in ARM mode
  /tmp/ccrHfZPj.s:731: Error: selected processor does not support `isb ' in ARM mode

Fix that by moving the option '-msoft-float' up before the
'arch-$(CONFIG_CPU_<foo>)' instruction selection macros.

Signed-off-by: Juerg Haefliger <juergh@canonical.com>
---
 arch/arm/Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Dimitri John Ledkov Aug. 9, 2021, 3:26 p.m. UTC | #1
Acked-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>

It would be nice to still open an LP bug task against gcc-11 to double
check with toolchain maintainer if that is expected behaviour change /
feature or a bug.

On Mon, Aug 9, 2021 at 4:23 PM Juerg Haefliger
<juerg.haefliger@canonical.com> wrote:
>
> BugLink: https://bugs.launchpad.net/bugs/1939308
>
> GCC 11 on ARM now complains like the following when trying to determine if
> an arch is supported. Presumably because it enforces the default option
> which (in our case) is '--with-float=hard'?
>   $ arm-linux-gnueabihf-gcc-11 -march=armv7-a -c -x c /dev/null
>   cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU
>
> Due to that, the kernel build system selects the wrong compiler options
> which throws errros like this:
>   /tmp/ccrHfZPj.s: Assembler messages:
>   /tmp/ccrHfZPj.s:116: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:150: Error: selected processor does not support `isb ' in ARM mode
>   /tmp/ccrHfZPj.s:160: Error: selected processor does not support `mrrc p15,1,r4,r5,c14' in ARM mode
>   /tmp/ccrHfZPj.s:245: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:503: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:527: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:698: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:731: Error: selected processor does not support `isb ' in ARM mode
>
> Fix that by moving the option '-msoft-float' up before the
> 'arch-$(CONFIG_CPU_<foo>)' instruction selection macros.
>
> Signed-off-by: Juerg Haefliger <juergh@canonical.com>
> ---
>  arch/arm/Makefile | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 415c3514573a..efa9518223b0 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -56,6 +56,9 @@ endif
>  #
>  KBUILD_CFLAGS  += $(call cc-option,-fno-ipa-sra)
>
> +# Need -msoft-float for gcc 11 for the below instruction set selection
> +KBUILD_CFLAGS  += -msoft-float
> +
>  # This selects which instruction set is used.
>  # Note that GCC does not numerically define an architecture version
>  # macro, but instead defines a whole series of macros which makes
> @@ -125,7 +128,7 @@ AFLAGS_ISA  :=$(CFLAGS_ISA)
>  endif
>
>  # Need -Uarm for gcc < 3.x
> -KBUILD_CFLAGS  +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
> +KBUILD_CFLAGS  +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm
>  KBUILD_AFLAGS  +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
>
>  CHECKFLAGS     += -D__arm__
> --
> 2.30.2
>
>
> --
> kernel-team mailing list
> kernel-team@lists.ubuntu.com
> https://lists.ubuntu.com/mailman/listinfo/kernel-team
Kamal Mostafa Aug. 9, 2021, 4:01 p.m. UTC | #2
Yup, that fixes it (whew, thanks!)

Acked-by: Kamal Mostafa <kamal@canonical.com>

 -Kamal

On Mon, Aug 09, 2021 at 05:22:38PM +0200, Juerg Haefliger wrote:
> BugLink: https://bugs.launchpad.net/bugs/1939308
> 
> GCC 11 on ARM now complains like the following when trying to determine if
> an arch is supported. Presumably because it enforces the default option
> which (in our case) is '--with-float=hard'?
>   $ arm-linux-gnueabihf-gcc-11 -march=armv7-a -c -x c /dev/null
>   cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU
> 
> Due to that, the kernel build system selects the wrong compiler options
> which throws errros like this:
>   /tmp/ccrHfZPj.s: Assembler messages:
>   /tmp/ccrHfZPj.s:116: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:150: Error: selected processor does not support `isb ' in ARM mode
>   /tmp/ccrHfZPj.s:160: Error: selected processor does not support `mrrc p15,1,r4,r5,c14' in ARM mode
>   /tmp/ccrHfZPj.s:245: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:503: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:527: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:698: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:731: Error: selected processor does not support `isb ' in ARM mode
> 
> Fix that by moving the option '-msoft-float' up before the
> 'arch-$(CONFIG_CPU_<foo>)' instruction selection macros.
> 
> Signed-off-by: Juerg Haefliger <juergh@canonical.com>
> ---
>  arch/arm/Makefile | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 415c3514573a..efa9518223b0 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -56,6 +56,9 @@ endif
>  #
>  KBUILD_CFLAGS	+= $(call cc-option,-fno-ipa-sra)
>  
> +# Need -msoft-float for gcc 11 for the below instruction set selection
> +KBUILD_CFLAGS	+= -msoft-float
> +
>  # This selects which instruction set is used.
>  # Note that GCC does not numerically define an architecture version
>  # macro, but instead defines a whole series of macros which makes
> @@ -125,7 +128,7 @@ AFLAGS_ISA	:=$(CFLAGS_ISA)
>  endif
>  
>  # Need -Uarm for gcc < 3.x
> -KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
> +KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm
>  KBUILD_AFLAGS	+=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
>  
>  CHECKFLAGS	+= -D__arm__
> -- 
> 2.30.2
> 
> 
> -- 
> kernel-team mailing list
> kernel-team@lists.ubuntu.com
> https://lists.ubuntu.com/mailman/listinfo/kernel-team
Kamal Mostafa Aug. 9, 2021, 5:06 p.m. UTC | #3
Applied to impish/master-next.  Thanks!

 -Kamal

On Mon, Aug 09, 2021 at 05:22:38PM +0200, Juerg Haefliger wrote:
> BugLink: https://bugs.launchpad.net/bugs/1939308
> 
> GCC 11 on ARM now complains like the following when trying to determine if
> an arch is supported. Presumably because it enforces the default option
> which (in our case) is '--with-float=hard'?
>   $ arm-linux-gnueabihf-gcc-11 -march=armv7-a -c -x c /dev/null
>   cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU
> 
> Due to that, the kernel build system selects the wrong compiler options
> which throws errros like this:
>   /tmp/ccrHfZPj.s: Assembler messages:
>   /tmp/ccrHfZPj.s:116: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:150: Error: selected processor does not support `isb ' in ARM mode
>   /tmp/ccrHfZPj.s:160: Error: selected processor does not support `mrrc p15,1,r4,r5,c14' in ARM mode
>   /tmp/ccrHfZPj.s:245: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:503: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:527: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:698: Error: selected processor does not support `dmb ish' in ARM mode
>   /tmp/ccrHfZPj.s:731: Error: selected processor does not support `isb ' in ARM mode
> 
> Fix that by moving the option '-msoft-float' up before the
> 'arch-$(CONFIG_CPU_<foo>)' instruction selection macros.
> 
> Signed-off-by: Juerg Haefliger <juergh@canonical.com>
> ---
>  arch/arm/Makefile | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 415c3514573a..efa9518223b0 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -56,6 +56,9 @@ endif
>  #
>  KBUILD_CFLAGS	+= $(call cc-option,-fno-ipa-sra)
>  
> +# Need -msoft-float for gcc 11 for the below instruction set selection
> +KBUILD_CFLAGS	+= -msoft-float
> +
>  # This selects which instruction set is used.
>  # Note that GCC does not numerically define an architecture version
>  # macro, but instead defines a whole series of macros which makes
> @@ -125,7 +128,7 @@ AFLAGS_ISA	:=$(CFLAGS_ISA)
>  endif
>  
>  # Need -Uarm for gcc < 3.x
> -KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
> +KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm
>  KBUILD_AFLAGS	+=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
>  
>  CHECKFLAGS	+= -D__arm__
> -- 
> 2.30.2
> 
> 
> -- 
> kernel-team mailing list
> kernel-team@lists.ubuntu.com
> https://lists.ubuntu.com/mailman/listinfo/kernel-team
Juerg Haefliger Aug. 10, 2021, 6:18 a.m. UTC | #4
On Mon, 9 Aug 2021 16:26:13 +0100
Dimitri John Ledkov <dimitri.ledkov@canonical.com> wrote:

> Acked-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>
> 
> It would be nice to still open an LP bug task against gcc-11 to double
> check with toolchain maintainer if that is expected behaviour change /
> feature or a bug.

Will do.

...Juerg


> On Mon, Aug 9, 2021 at 4:23 PM Juerg Haefliger
> <juerg.haefliger@canonical.com> wrote:
> >
> > BugLink: https://bugs.launchpad.net/bugs/1939308
> >
> > GCC 11 on ARM now complains like the following when trying to determine if
> > an arch is supported. Presumably because it enforces the default option
> > which (in our case) is '--with-float=hard'?
> >   $ arm-linux-gnueabihf-gcc-11 -march=armv7-a -c -x c /dev/null
> >   cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU
> >
> > Due to that, the kernel build system selects the wrong compiler options
> > which throws errros like this:
> >   /tmp/ccrHfZPj.s: Assembler messages:
> >   /tmp/ccrHfZPj.s:116: Error: selected processor does not support `dmb ish' in ARM mode
> >   /tmp/ccrHfZPj.s:150: Error: selected processor does not support `isb ' in ARM mode
> >   /tmp/ccrHfZPj.s:160: Error: selected processor does not support `mrrc p15,1,r4,r5,c14' in ARM mode
> >   /tmp/ccrHfZPj.s:245: Error: selected processor does not support `dmb ish' in ARM mode
> >   /tmp/ccrHfZPj.s:503: Error: selected processor does not support `dmb ish' in ARM mode
> >   /tmp/ccrHfZPj.s:527: Error: selected processor does not support `dmb ish' in ARM mode
> >   /tmp/ccrHfZPj.s:698: Error: selected processor does not support `dmb ish' in ARM mode
> >   /tmp/ccrHfZPj.s:731: Error: selected processor does not support `isb ' in ARM mode
> >
> > Fix that by moving the option '-msoft-float' up before the
> > 'arch-$(CONFIG_CPU_<foo>)' instruction selection macros.
> >
> > Signed-off-by: Juerg Haefliger <juergh@canonical.com>
> > ---
> >  arch/arm/Makefile | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> > index 415c3514573a..efa9518223b0 100644
> > --- a/arch/arm/Makefile
> > +++ b/arch/arm/Makefile
> > @@ -56,6 +56,9 @@ endif
> >  #
> >  KBUILD_CFLAGS  += $(call cc-option,-fno-ipa-sra)
> >
> > +# Need -msoft-float for gcc 11 for the below instruction set selection
> > +KBUILD_CFLAGS  += -msoft-float
> > +
> >  # This selects which instruction set is used.
> >  # Note that GCC does not numerically define an architecture version
> >  # macro, but instead defines a whole series of macros which makes
> > @@ -125,7 +128,7 @@ AFLAGS_ISA  :=$(CFLAGS_ISA)
> >  endif
> >
> >  # Need -Uarm for gcc < 3.x
> > -KBUILD_CFLAGS  +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
> > +KBUILD_CFLAGS  +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm
> >  KBUILD_AFLAGS  +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
> >
> >  CHECKFLAGS     += -D__arm__
> > --
> > 2.30.2
> >
> >
> > --
> > kernel-team mailing list
> > kernel-team@lists.ubuntu.com
> > https://lists.ubuntu.com/mailman/listinfo/kernel-team  
> 
> 
>
Paolo Pisati Aug. 17, 2021, 3:24 p.m. UTC | #5
On Mon, Aug 09, 2021 at 05:22:38PM +0200, Juerg Haefliger wrote:
> BugLink: https://bugs.launchpad.net/bugs/1939308
diff mbox series

Patch

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 415c3514573a..efa9518223b0 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -56,6 +56,9 @@  endif
 #
 KBUILD_CFLAGS	+= $(call cc-option,-fno-ipa-sra)
 
+# Need -msoft-float for gcc 11 for the below instruction set selection
+KBUILD_CFLAGS	+= -msoft-float
+
 # This selects which instruction set is used.
 # Note that GCC does not numerically define an architecture version
 # macro, but instead defines a whole series of macros which makes
@@ -125,7 +128,7 @@  AFLAGS_ISA	:=$(CFLAGS_ISA)
 endif
 
 # Need -Uarm for gcc < 3.x
-KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
+KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm
 KBUILD_AFLAGS	+=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
 
 CHECKFLAGS	+= -D__arm__