From patchwork Tue Jul 27 13:14:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri John Ledkov X-Patchwork-Id: 1510500 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=mhsIg+p2; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GYy1W4Krbz9sWS; Tue, 27 Jul 2021 23:14:23 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1m8MuW-0003us-IZ; Tue, 27 Jul 2021 13:14:16 +0000 Received: from smtp-relay-canonical-0.internal ([10.131.114.83] helo=smtp-relay-canonical-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1m8MuU-0003ue-Nh for kernel-team@lists.ubuntu.com; Tue, 27 Jul 2021 13:14:14 +0000 Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-0.canonical.com (Postfix) with ESMTPS id 931083F343 for ; Tue, 27 Jul 2021 13:14:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1627391654; bh=v9jtk5eYtdQ8hKzK/2PrItIVw/VCsfTuEPcyOlHnGpQ=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=mhsIg+p2kUNNA0QI3r1gCJo6UIPVwTfWL9JYSl5KET/VX1QkIndN6DMKM1fA6Yn/m NhX0clvmQzBTOjE53kjE3mkL2LJ8mHs8e7a/Zh77LTV0qIiEPho3S4RYtKzhKRr92s JoTLco8Qg57zOx0H47/Axc8AuiLtuWE++sZriUdrd4WQuaXArtzKw6QsY/JA/Kjtkg Dp9V1z2ENYHOpqCLVohcD7ajUn7PG+FwxdNE5zO/Itx9gftdwQIUJkeW2kJRPxM8aE bjTyGFEHWeZsbaYWgrcWC64QtTFd6N1lju8LmsJhqA+LJr1xPZORgGnzVevC0AYWPF vS6vFN4f2P8Xg== Received: by mail-pj1-f69.google.com with SMTP id r23-20020a17090aa097b0290176fc47a8b7so3152304pjp.6 for ; Tue, 27 Jul 2021 06:14:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=v9jtk5eYtdQ8hKzK/2PrItIVw/VCsfTuEPcyOlHnGpQ=; b=kYf3Jw7FEsY1JOVexe0Gl2cPpZMK/5ebxXeOiv5yaOXTo4yRuvr3MyOvYE1jocR3hb q2iioSOBlIRMHXcbGoIVBG5k/s5nq0MyGETYx6HB/RwlkkALd6GIfOe7Jt6HwMLzbr/u Ug7wimUCR3urHbADmMLz+H6IzZUwK+VqKJE02WR33+dJHmmyZFxz5/sfOYwPAt9C0sm+ qq9Lf4Fnp8K7MbiCWuUEJDWZLdfQOXC/KyFY8A0IdVvV9CpV0poTulcJ3GNPONfI1KRW jo9wm2C9Bu75ISbrMhQzgYTY7lPwA+WrSP8CU9VLLsxH2VbfM96+JSLJ74osXS1PbSzJ VJ/A== X-Gm-Message-State: AOAM5318kdQrQJfFC4mkXb274bLypHjqoautmLU+WyozAlfrqNr8nfWq SKXMmPo0I8Hye5umxL0XINL1P1Lho4+W6r93UyPsT/CElpkprjW47RAYpm4ls2AeecUKRxolyko ub2rnZd2HW0/ld3rcSm0MYCyP1Q0Q+ErGWfJNAIJYWA== X-Received: by 2002:a62:7754:0:b029:35f:f70d:11cb with SMTP id s81-20020a6277540000b029035ff70d11cbmr23289720pfc.2.1627391652876; Tue, 27 Jul 2021 06:14:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzhXJ42y7xnUXIfsZy0vqS5LINwo5lDU16114KhOlvgeLb+LtnOEYc5Ud70wkc3rJzINZAg/w== X-Received: by 2002:a62:7754:0:b029:35f:f70d:11cb with SMTP id s81-20020a6277540000b029035ff70d11cbmr23289705pfc.2.1627391652570; Tue, 27 Jul 2021 06:14:12 -0700 (PDT) Received: from localhost ([2a01:4b00:85fd:d700:8be0:2105:960b:9b23]) by smtp.gmail.com with ESMTPSA id l8sm3015775pjc.17.2021.07.27.06.14.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jul 2021 06:14:12 -0700 (PDT) From: Dimitri John Ledkov To: kernel-team@lists.ubuntu.com Subject: [UNSTABLE][IMPISH][PATCH v5.13] Revert "riscv: Get CPU manufacturer information" Date: Tue, 27 Jul 2021 14:14:04 +0100 Message-Id: <20210727131404.29543-1-dimitri.ledkov@canonical.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" This reverts commit 58ed2afd01ffeb45f2db71ab13a2046e5bb0c1dd. Superseded by upstream change 6f4eea9046 ("riscv: Introduce alternative mechanism to apply errata solution") and the riscv_fill_cpu_mfr_info() function it implements. Signed-off-by: Dimitri John Ledkov --- arch/riscv/include/asm/hwcap.h | 6 ------ arch/riscv/include/asm/processor.h | 2 -- arch/riscv/include/asm/soc.h | 1 - arch/riscv/kernel/cpufeature.c | 17 ----------------- arch/riscv/kernel/setup.c | 2 -- arch/riscv/kernel/soc.c | 1 - 6 files changed, 29 deletions(-) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index b7409487c9..5ce50468af 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -44,12 +44,6 @@ bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit); #define riscv_isa_extension_available(isa_bitmap, ext) \ __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) -struct cpu_manufacturer_info_t { - unsigned long vendor_id; - unsigned long arch_id; - unsigned long imp_id; -}; - #endif #endif /* _ASM_RISCV_HWCAP_H */ diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index e15fbf9e9b..021ed64ee6 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -73,8 +73,6 @@ int riscv_of_parent_hartid(struct device_node *node); extern void riscv_fill_hwcap(void); extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); -void riscv_fill_cpu_manufacturer_info(void); - #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_PROCESSOR_H */ diff --git a/arch/riscv/include/asm/soc.h b/arch/riscv/include/asm/soc.h index 03dee6db40..f494066051 100644 --- a/arch/riscv/include/asm/soc.h +++ b/arch/riscv/include/asm/soc.h @@ -10,7 +10,6 @@ #include #include #include -#include #define SOC_EARLY_INIT_DECLARE(name, compat, fn) \ static const struct of_device_id __soc_early_init__##name \ diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 389162ee19..ac202f44a6 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -12,8 +12,6 @@ #include #include #include -#include -#include unsigned long elf_hwcap __read_mostly; @@ -24,8 +22,6 @@ static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; bool has_fpu __read_mostly; #endif -struct cpu_manufacturer_info_t cpu_mfr_info; - /** * riscv_isa_extension_base() - Get base extension word * @@ -153,16 +149,3 @@ void riscv_fill_hwcap(void) has_fpu = true; #endif } - -void riscv_fill_cpu_manufacturer_info(void) -{ -#ifndef CONFIG_RISCV_M_MODE - cpu_mfr_info.vendor_id = sbi_get_vendorid(); - cpu_mfr_info.arch_id = sbi_get_archid(); - cpu_mfr_info.imp_id = sbi_get_impid(); -#else - cpu_mfr_info.vendor_id = csr_read(CSR_MVENDORID); - cpu_mfr_info.arch_id = csr_read(CSR_MARCHID); - cpu_mfr_info.imp_id = csr_read(CSR_MIMPID); -#endif -} diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index e75352ed7d..9a1b7a0603 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -309,8 +309,6 @@ void __init setup_arch(char **cmdline_p) #endif riscv_fill_hwcap(); - - riscv_fill_cpu_manufacturer_info(); } static int __init topology_init(void) diff --git a/arch/riscv/kernel/soc.c b/arch/riscv/kernel/soc.c index 58f6fd9174..a0516172a3 100644 --- a/arch/riscv/kernel/soc.c +++ b/arch/riscv/kernel/soc.c @@ -6,7 +6,6 @@ #include #include #include -#include /* * This is called extremly early, before parse_dtb(), to allow initializing