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[OEM-5.10/OEM-5.13,09/17] PCI: quirks: Quirk PCI d3hot delay for AMD xhci

Message ID 20210622172352.3975782-11-kai.heng.feng@canonical.com
State New
Headers show
Series Add s2idle support for AMD Cezzane | expand

Commit Message

Kai-Heng Feng June 22, 2021, 5:23 p.m. UTC 
From: Marcin Bachry <hegel666@gmail.com>

BugLink: https://bugs.launchpad.net/bugs/1932577                                                     

Renoir needs a similar delay.

[Alex: I talked to the AMD USB hardware team and the
 AMD windows team and they are not aware of any HW
 errata or specific issues.  The HW works fine in
 windows.  That said, we don't have the source to
 relevant general windows code so I don't know exactly
 what windows does there. Apparently windows uses a
 rather generous default delay for PCI state transitions,
 but I have not been able to confirm what it is yet.]

Signed-off-by: Marcin Bachry <hegel666@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mario.limonciello@amd.com
Cc: prike.liang@amd.com
Cc: shyam-sundar.s-k@amd.com
(cherry picked from commit 3a71e0a1a0186e9d03bfc13c9b54dedc7adafba5 linux-next)
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
---
 drivers/pci/quirks.c | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 25d17ff39361..2a41ed4d665b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1919,6 +1919,7 @@  static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1639, quirk_ryzen_xhci_d3hot);
 
 #ifdef CONFIG_X86_IO_APIC
 static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)