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[v4,1/1,SRU,OEM-5.6] UBUNTU: SAUCE: pci: s3 resume takes too long time, around 7s

Message ID 20200513061356.20174-2-koba.ko@canonical.com
State New
Headers show
Series UBUNTU: SAUCE: pci: Speed up the process of s3 resume | expand

Commit Message

Koba Ko May 13, 2020, 6:13 a.m. UTC
From https://lore.kernel.org/linux-pci/20200416083245.73957-1-mika.westerberg@linux.intel.com/

BugLink: https://bugs.launchpad.net/bugs/1876844

Since PCIe spec mandates that all downstream ports that support
speeds greater than 5 GT/s must support data link layer active
reporting so use that here to determine when the delay should
be issued.

Tested-by: Kai-Heng Feng <kai.heng.feng at canonical.com>
Signed-off-by: Mika Westerberg <mika.westerberg at linux.intel.com>
Signed-off-by: Koba Ko <koba.ko@canonical.com>
---
 drivers/pci/pci.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Aaron Ma May 13, 2020, 8:05 a.m. UTC | #1
Please keep the author:
Mika Westerberg <mika.westerberg@linux.intel.com>

Aaron

On 5/13/20 2:13 PM, Koba Ko wrote:
> From https://lore.kernel.org/linux-pci/20200416083245.73957-1-mika.westerberg@linux.intel.com/
Koba Ko May 14, 2020, 7:02 a.m. UTC | #2
On Wed, May 13, 2020 at 4:06 PM Aaron Ma <aaron.ma@canonical.com> wrote:

> Please keep the author:
> Mika Westerberg <mika.westerberg@linux.intel.com>
>
> Aaron
>
Aaron,
Will update another run to modify this error.


> On 5/13/20 2:13 PM, Koba Ko wrote:
> > From
> https://lore.kernel.org/linux-pci/20200416083245.73957-1-mika.westerberg@linux.intel.com/
>
> --
> kernel-team mailing list
> kernel-team@lists.ubuntu.com
> https://lists.ubuntu.com/mailman/listinfo/kernel-team
>
diff mbox series

Patch

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d828ca835a98..aa4d4de1e2e1 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4765,7 +4765,13 @@  void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
 	if (!pcie_downstream_port(dev))
 		return;
 
-	if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
+	/*
+	 * Since PCIe spec mandates that all downstream ports that
+	 * support speeds greater than 5 GT/s must support data link
+	 * layer active reporting we use that here to determine when the
+	 * delay should be issued.
+	 */
+	if (!dev->link_active_reporting) {
 		pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
 		msleep(delay);
 	} else {