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[artful] x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping

Message ID 20171019173838.13382-1-dan.streetman@canonical.com
State New
Headers show
Series [artful] x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping | expand

Commit Message

Dan Streetman Oct. 19, 2017, 5:38 p.m. UTC 
From: Len Brown <len.brown@intel.com>

BugLink: http://bugs.launchpad.net/bugs/1724612

SKX stepping-3 fixed the TSC_DEADLINE issue in a different ucode
version number than stepping-4.  Linux needs to know this stepping-3
specific version number to also enable the TSC_DEADLINE on stepping-3.

The steppings and ucode versions are documented in the SKX BIOS update:
https://downloadmirror.intel.com/26978/eng/ReleaseNotes_R00.01.0004.txt

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: peterz@infradead.org
Link: https://lkml.kernel.org/r/60f2bbf7cf617e212b522e663f84225bfebc50e5.1507756305.git.len.brown@intel.com
(cherry-picked from commit 616dd5872e52493863b0202632703eebd51243dc upstream)
Signed-off-by: Dan Streetman <dan.streetman@canonical.com>

---
 arch/x86/kernel/apic/apic.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

Comments

Marcelo Henrique Cerri Oct. 20, 2017, 12:09 p.m. UTC | #1 
Straightforward fix with clean cherry pick.

Acked-by: Marcelo Henrique Cerri <marcelo.cerri@canonical.com>
Kleber Sacilotto de Souza Oct. 30, 2017, 4:17 p.m. UTC | #2 
Applied to artful/master-next branch. Thanks.
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Patch

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 98b3dd8cf2bf..2044c3fc874a 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -575,11 +575,21 @@  static u32 bdx_deadline_rev(void)
 	return ~0U;
 }
 
+static u32 skx_deadline_rev(void)
+{
+	switch (boot_cpu_data.x86_mask) {
+	case 0x03: return 0x01000136;
+	case 0x04: return 0x02000014;
+	}
+
+	return ~0U;
+}
+
 static const struct x86_cpu_id deadline_match[] = {
 	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X,	hsx_deadline_rev),
 	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X,	0x0b000020),
 	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D,	bdx_deadline_rev),
-	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_X,	0x02000014),
+	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X,	skx_deadline_rev),
 
 	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_CORE,	0x22),
 	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_ULT,	0x20),