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[U-Boot,02/10] arm: mvebu: clearfog: enable both DDR clocks

Message ID f7d06997e263d19e77e45d8aecd9bd34f908a199.1574676560.git.baruch@tkos.co.il
State Superseded
Delegated to: Stefan Roese
Headers show
Series ARM: clearfog: add run-time board detect | expand

Commit Message

Baruch Siach Nov. 25, 2019, 10:30 a.m. UTC 
Enabled both DDR clock signals to support Clearfog variants (currently,
Clearfog GTR) that need both clocks.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 board/solidrun/clearfog/clearfog.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Stefan Roese Jan. 13, 2020, 6:59 a.m. UTC | #1 
On 25.11.19 11:30, Baruch Siach wrote:
> Enabled both DDR clock signals to support Clearfog variants (currently,
> Clearfog GTR) that need both clocks.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>   board/solidrun/clearfog/clearfog.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
> index 03724fee10c1..8b6381194688 100644
> --- a/board/solidrun/clearfog/clearfog.c
> +++ b/board/solidrun/clearfog/clearfog.c
> @@ -68,7 +68,10 @@ static struct mv_ddr_topology_map board_topology_map = {
>   	BUS_MASK_32BIT,			/* Busses mask */
>   	MV_DDR_CFG_DEFAULT,		/* ddr configuration data source */
>   	{ {0} },			/* raw spd data */
> -	{0}				/* timing parameters */
> +	{0},				/* timing parameters */
> +	{ {0} },			/* electrical configuration */
> +	{0,},				/* electrical parameters */
> +	0x3,				/* clock enable mask */
>   };
>   
>   struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
> 

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan
diff mbox series

Patch

diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 03724fee10c1..8b6381194688 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -68,7 +68,10 @@  static struct mv_ddr_topology_map board_topology_map = {
 	BUS_MASK_32BIT,			/* Busses mask */
 	MV_DDR_CFG_DEFAULT,		/* ddr configuration data source */
 	{ {0} },			/* raw spd data */
-	{0}				/* timing parameters */
+	{0},				/* timing parameters */
+	{ {0} },			/* electrical configuration */
+	{0,},				/* electrical parameters */
+	0x3,				/* clock enable mask */
 };
 
 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)