Message ID | f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com |
---|---|
State | Accepted |
Commit | 686c2bbb4429088b21b7dc281e43f7ea0c3080d1 |
Delegated to: | Michal Simek |
Headers | show |
Series | arm64: zynqmp: Some DT updates | expand |
diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index 85790551d0b5..2271a6a49065 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -190,10 +190,6 @@ compatible = "ti,tps544b25"; reg = <0x1e>; }; - reg_vpp_2v5_ddr4: tps544@1x { /* u3007 */ - compatible = "ti,tps544b25"; - reg = <0x17>; /* FIXME wrong in schematics */ - }; }; i2c@1 { /* PMBUS_INA226 */ #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 21ef1a5e82b0..a89046a818fd 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -190,9 +190,9 @@ compatible = "ti,tps544b25"; reg = <0x1e>; }; - reg_vpp_2v5_ddr4: tps544@1x { /* u3007 */ + reg_vcc1v2_ddr4: tps544@18 { /* u3022 */ compatible = "ti,tps544b25"; - reg = <0x17>; /* FIXME wrong in schematics */ + reg = <0x18>; }; }; i2c@1 { /* PMBUS_INA226 */