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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id h11sm214461wrb.68.2020.07.24.00.06.12 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Jul 2020 00:06:12 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: T Karthik Reddy , Ashok Reddy Soma Subject: [PATCH] arm64: zynqmp: Fix zynqmp mini qspi max frequency Date: Fri, 24 Jul 2020 09:06:11 +0200 Message-Id: X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: T Karthik Reddy For zynqmp qspi, frequencies up to 40MHz will work irrespective of feedback clock enabled or disabled. If we want higher than 40Mhz the feedback clock should be enabled. With spi-max-frequency 108MHz it is not working when the feedback clock is disabled. Change it to 40MHz so that it works irrespective of feedback clock enabled or disabled. Signed-off-by: T Karthik Reddy Acked-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index a76e6404661e..9b4320fe6e20 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -70,7 +70,7 @@ reg = <0x0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-max-frequency = <108000000>; + spi-max-frequency = <40000000>; }; };